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AgeCommit message (Expand)AuthorFilesLines
2017-02-06[ARC] Provide an interface to decode ARC instructions.Claudiu Zissulescu1-0/+4
2017-01-30MIPS: Add options to control branch ISA checksMaciej W. Rozycki1-0/+22
2017-01-23Fix spelling mistakes and typos in the GAS sources.Nick Clifton68-355/+355
2017-01-20Fix potential array overrun in x86 assembler.Nick Clifton1-1/+1
2017-01-18PR gas/20649: MIPS: Fix GOT16/LO16 reloc pairing with comdat sectionsMaciej W. Rozycki1-5/+6
2017-01-18Add support for processing lex source files with flex v 2.6.3Bernhard Rosenkranzer1-9/+2
2017-01-12Enable Intel AVX512_VPOPCNTDQ instructionsIgor Tsimbalist1-0/+3
2017-01-09RISC-V/GAS: Support more relocs against constant addressesAndrew Waterman1-3/+2
2017-01-09RISC-V/GAS: Improve handling of invalid relocsAndrew Waterman1-1/+9
2017-01-09RISC-V/GAS: Correct branch relaxation for weak symbols.Andrew Waterman1-0/+1
2017-01-04[AArch64] Add separate feature flag for weaker release consistent load insnsSzabolcs Nagy1-0/+2
2017-01-03Add support for the Q extension to the RISCV ISA.Kito Cheng1-2/+12
2017-01-03Fix PRU GAS for 32-bit hostsDimitar Dimitrov1-7/+12
2017-01-02Update year range in copyright notice of all files.Alan Modra242-242/+242
2016-12-31PRU GAS PortDimitar Dimitrov3-0/+2104
2016-12-23MIPS16: Simplify extended operand handlingMaciej W. Rozycki1-1/+1
2016-12-23MIPS16/GAS: Clean up invalid unextended operand handlingMaciej W. Rozycki1-2/+5
2016-12-23MIPS16: Reassign `0' and `4' operand codesMaciej W. Rozycki1-5/+5
2016-12-23MIPS16: Handle non-extensible instructions correctlyMaciej W. Rozycki1-0/+2
2016-12-23MIPS16: Remove "extended" BREAK/SDBBP handlingMaciej W. Rozycki1-8/+1
2016-12-23MIPS16/GAS: Fix forced size suffixes with argumentless instructionsMaciej W. Rozycki1-10/+15
2016-12-23[msp430] Sync tc-msp430.c with devices.csvJoe Seymour1-6/+5
2016-12-22Support aligning text section from odd addressesAndrew Waterman1-6/+16
2016-12-22Fix a const-safety issue on GCC-4.9 and aboveTim Newsome1-1/+1
2016-12-20MIPS16: Switch to 32-bit opcode table interpretationMaciej W. Rozycki1-24/+68
2016-12-20Don't define RISC-V .p2alignAndrew Waterman2-42/+68
2016-12-20Re-work RISC-V gas flags: now we just support -mabi and -marchAndrew Waterman2-105/+93
2016-12-20Rework RISC-V relocationsAndrew Waterman2-54/+166
2016-12-20Formatting changes for RISC-VAndrew Waterman1-27/+28
2016-12-14MIPS16/GAS: Fix assertion failures with relocations on 16-bit instructionsMaciej W. Rozycki1-3/+6
2016-12-13[Binutils][AARCH64]Remove Cn register for coprocessor CRn, CRm fieldRenlin Li1-15/+15
2016-12-09MIPS16: Remove unused `>' operand codeMaciej W. Rozycki1-1/+0
2016-12-08ARC/GAS: Correct a `spaces' global shadowing errorMaciej W. Rozycki1-5/+5
2016-12-08ARM/GAS: Correct an `index' global shadowing errorMaciej W. Rozycki1-4/+4
2016-12-07MIPS/GAS: Use local `isa' consistently in `is_opcode_valid'Maciej W. Rozycki1-1/+1
2016-12-05[ARM] Add ARMv8.3 VCMLA and VCADD instructionsSzabolcs Nagy1-0/+80
2016-12-05[ARC] Don't check extAuxRegister second argument for sign.Claudiu Zissulescu1-11/+16
2016-12-05[ARM] Add ARMv8.3 VJCVT instructionSzabolcs Nagy1-0/+18
2016-12-05[ARM] Add ARMv8.3 command line option and feature flagSzabolcs Nagy1-0/+1
2016-12-02[ARC] Sync cpu names with the ones accepted by GCC.Claudiu Zissulescu1-22/+85
2016-11-29[ARC] Add checking for LP_COUNT reg usage, improve error reporting.Claudiu Zissulescu1-15/+20
2016-11-27Fix spelling in comments in .l files (gas)Ambrogino Modigliani1-1/+1
2016-11-27Fix spelling in comments in C source files (gas)Ambrogino Modigliani34-67/+67
2016-11-25gas: fix CBCOND diagnostics for invalid immediate operands.Jose E. Marchesi1-2/+3
2016-11-23RISCV/GAS Add missing break in md_apply_fix.Kuan-Lin Chen1-0/+1
2016-11-22gas,opcodes: fix hardware capabilities bumping in the sparc assembler.Jose E. Marchesi1-58/+54
2016-11-22PR20744, Incorrect PowerPC VLE relocsAlan Modra1-18/+2
2016-11-21[GAS][ARM][PR20827]Fix gas error for two register form instruction (pre-UAL s...Renlin Li1-2/+5
2016-11-18[ARC] Fix and extend features of .cpu directive.Claudiu Zissulescu1-18/+59
2016-11-18[AArch64] Add ARMv8.3 FCMLA and FCADD instructionsSzabolcs Nagy1-0/+3
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