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2010-11-05 * config/obj-coff.c (weak_altname2name): Don't infer from the presenceDave Korn1-11/+1
2010-11-04 * config/tc-ppc.c (nop_limit): New var.Alan Modra1-0/+42
2010-11-03Properly fold _GLOBAL_OFFSET_TABLE_ in Intel syntax.H.J. Lu1-1/+6
2010-11-02bfd:Joseph Myers1-0/+72
2010-11-01 * config/tc-mips.c (macro)[M_LD_OB, M_SD_OB]: Use the offsetMaciej W. Rozycki1-2/+9
2010-10-29bfd:Joseph Myers1-1/+19
2010-10-282010-10-28 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel1-6/+11
2010-10-28 * config/tc-d30v.c (d30v_cons_align): Don't align .eh_frame.Alan Modra1-1/+2
2010-10-26 * config/obj-coff.c (coff_format_ops): Fix typo.Alan Modra1-1/+1
2010-10-25gas/Richard Sandiford1-63/+0
2010-10-25 bfd/Nathan Sidwell1-0/+2
2010-10-25 * obj.h (struct format_ops): Add adjust_symtab.Alan Modra5-7/+16
2010-10-232010-10-23 Mark Mitchell <mark@codesourcery.com>Mark Mitchell3-24/+36
2010-10-22 ld:Rainer Orth1-1/+6
2010-10-21bfd:Joseph Myers1-22/+22
2010-10-18 * config/tc-mips.c (macro)[ldd_std]: Fix the relaxation variantMaciej W. Rozycki1-20/+1
2010-10-18 opcodes/Maciej W. Rozycki1-5/+8
2010-10-18 * config/tc-mips.c (mips_pseudo_table): Add "sbss".Maciej W. Rozycki1-0/+14
2010-10-15gas: blackfin: fix encoding of BYTEOP2M insnMike Frysinger1-2/+2
2010-10-14Add CheckRegSize to instructions which require register size check.H.J. Lu1-3/+2
2010-10-14Add .d32 encoding suffix.H.J. Lu1-7/+17
2010-10-11gas: blackfin: reign in overeager insn flag handlingMike Frysinger1-7/+8
2010-10-11gas: blackfin: support numeric local labels with LOOP_BEGIN/LOOP_END pseudo i...Mike Frysinger3-0/+32
2010-10-11gas: blackfin: fix LOOP_BEGIN/LOOP_END pseudo insns handling of local labelsMike Frysinger1-2/+5
2010-10-08Fix build with -DDEBUG=7Alan Modra1-0/+4
2010-10-07gas/Bernd Schmidt1-1/+8
2010-10-06 bfd/Nathan Sidwell1-8/+7
2010-10-042010-10-04 David Daney <ddaney@caviumnetworks.com>David Daney1-1/+36
2010-09-27gas/Bernd Schmidt2-0/+22
2010-09-272010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel1-0/+2
2010-09-272010-09-27 Tejas Belagod <tejas.belagod@arm.com>Matthew Gretton-Dann1-0/+12
2010-09-23 * bfd/bfd-in2.h (BFD_RELOC_ARM_HVC): New enum value.Matthew Gretton-Dann1-31/+152
2010-09-23 * gas/config/tc-arm.c (arm_ext_adiv): New variable.Matthew Gretton-Dann1-9/+32
2010-09-23 * config/tc-arm.c (arm_ext_v6m): New variable.Matthew Gretton-Dann1-3/+18
2010-09-23 * gas/config/tc-arm.c (arm_ext_v6z): Remove.Matthew Gretton-Dann1-7/+23
2010-09-23 * gas/config/tc-arm.c (arm_ext_mp): Add.Matthew Gretton-Dann1-5/+20
2010-09-23 * gas/config/tc-arm.c (md_pseduo_table): Add .arch_extension directive.Matthew Gretton-Dann1-18/+152
2010-09-23 * config/tc-mn10300.c (tc_gen_reloc): Replace absolute symbolsAlan Modra1-8/+9
2010-09-22gas: blackfin: fix typo in BYTEOP16P commentMike Frysinger1-1/+1
2010-09-22gas: blackfin: reject multiple store insns in parallel insnsMike Frysinger1-0/+33
2010-09-22gas: blackfin: add missing register move insnsMike Frysinger2-2/+5
2010-09-22gas: blackfin: clarify some errors with register usage in insnsMike Frysinger1-3/+3
2010-09-22gas: blackfin: fix DBG/DBGCMPLX insn encodingMike Frysinger1-2/+2
2010-09-22gas: blackfin: handle multibyte symbolsMike Frysinger1-1/+1
2010-09-22opcodes/gas: blackfin: handle more ASTAT flagsMike Frysinger2-1/+7
2010-09-22opcodes/gas: blackfin: support OUTC debug insnMike Frysinger3-0/+27
2010-09-22gas: blackfin: support ABORT debug insnMike Frysinger2-1/+7
2010-09-22gas: blackfin: add support for BF51x-0.2 processorsMike Frysinger1-0/+4
2010-09-22gas: blackfin: add support for BF592 processorsMike Frysinger1-1/+5
2010-09-22gas: blackfin: allow end-of-line comments via #Mike Frysinger1-2/+2