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AgeCommit message (Expand)AuthorFilesLines
2020-10-30x86: Support GNU_PROPERTY_X86_ISA_1_BASELINE markerH.J. Lu1-42/+50
2020-10-29aarch64: Fix DSB instruction 'missing immediate expression' errorsPrzemyslaw Wirkus1-1/+5
2020-10-28aarch64: Add CSR PDEC instructionPrzemyslaw Wirkus1-0/+31
2020-10-28aarch64: Add DSB instruction Armv8.7-a variantPrzemyslaw Wirkus1-0/+47
2020-10-28aarch64: Add basic support for armv8.7-a architecturePrzemyslaw Wirkus1-0/+1
2020-10-26C-SKY: Fix the literal dump of big vector constant.Cooper Qu1-1/+2
2020-10-26CSKY: Add version flag in eflag and fix bug in disassembling register.Cooper Qu1-1/+1
2020-10-26CSKY: Fix and add some instructions for VDSPV1.Cooper Qu1-0/+12
2020-10-22arm: Fix the wrong error message string for mve vldr/vstr (PR26763).Srinath Parvathaneni1-1/+9
2020-10-22Fix printf formatting errors where "0x" is used as a prefix for a decimal num...Dr. David Alan Gilbert1-1/+1
2020-10-20Add AMD znver3 processor supportGanesh Gopalasubramanian1-0/+2
2020-10-16Enhancement for avx-vnni patchCui,Lili1-8/+8
2020-10-14x86: Support Intel AVX VNNIH.J. Lu1-1/+11
2020-10-14x86: Add support for Intel HRESET instructionLili Cui1-0/+3
2020-10-14x86: Support Intel UINTRLili Cui1-0/+3
2020-10-14x86: Remove the prefix byte from non-VEX/EVEX base_opcodeH.J. Lu1-24/+19
2020-10-13x86: Rename VexOpcode to OpcodePrefixH.J. Lu1-30/+45
2020-10-09x86: Support GNU_PROPERTY_X86_ISA_1_V[234] markerH.J. Lu1-61/+65
2020-10-06aarch64: Fix bogus type punning in parse_barrier() [PR26699]Alex Coplan1-7/+1
2020-10-06A small set of code improvements for the Z80 assembler.Sergey Belyashav1-7/+21
2020-10-05[PATCH][GAS][AArch64] Update Cortex-X1 feature flagsPrzemyslaw Wirkus1-2/+6
2020-10-05[PATCH][GAS][arm] Update Cortex-X1 feature flagsPrzemyslaw Wirkus1-1/+1
2020-10-05i386: Allow non-absolute segment values for lcall/ljmpT.K. Chia1-4/+7
2020-10-05GAS: Update the .section directive so that a numeric section index can be pro...Nick Clifton2-14/+35
2020-10-03x86: Update register operand check for AddrPrefixOpRegH.J. Lu1-5/+9
2020-10-02arm: add support for Cortex-A78 and Cortex-A78AEPrzemyslaw Wirkus1-0/+6
2020-10-01Add new directive to GAS: .attach_to_group.Nick Clifton1-0/+24
2020-09-30x86: Check register operand for AddrPrefixOpRegH.J. Lu1-0/+13
2020-09-30[GAS][AArch64] Add support for Cortex-A78 and Cortex-A78AEPrzemyslaw Wirkus1-0/+14
2020-09-30aarch64: Add support for Neoverse N2 CPUAlex Coplan1-0/+10
2020-09-30gcc-4.4.7 warning fixesAlan Modra1-2/+2
2020-09-28This patch adds support for Cortex-X1 for ARM.Przemyslaw Wirkus1-0/+3
2020-09-28This patch adds support for Cortex-X1Przemyslaw Wirkus1-0/+3
2020-09-28arm: Add missing Neoverse V1 featureAlex Coplan1-1/+3
2020-09-28aarch64: Neoverse V1 tweaksAlex Coplan1-8/+9
2020-09-26ubsan: opcodes/csky-opc.h:929 shift exponent 536870912Alan Modra1-5/+3
2020-09-24RISC-V: Error for relaxable branch in absolute section.Jim Wilson1-0/+7
2020-09-24arm: Add support for Neoverse V1 CPUAlex Coplan1-0/+3
2020-09-24aarch64: Add support for Neoverse V1 CPUAlex Coplan1-0/+8
2020-09-24arm: Add support for Neoverse N2 CPUAlex Coplan1-0/+5
2020-09-24Add support for Intel TDX instructions.Cui,Lili1-0/+3
2020-09-23CSKY: Add objdump option -M abi-names.Cooper Qu1-379/+262
2020-09-23Enable support to Intel Keylocker instructionsTerry Guo1-1/+9
2020-09-21PR26569, R_RISCV_RVC_JUMP results in buffer overflowAlan Modra1-3/+7
2020-09-16Tidy elf_symbol_fromAlan Modra5-11/+8
2020-09-15PR26610, ARM's "VFPv3 vldr to vmov" gas testcase failAlan Modra1-19/+20
2020-09-15Fix the assembler's new .nop directive so that the input line pointer is pres...Nick Clifton1-6/+3
2020-09-15Change the /nop directive for the BPF port of the assembler to use the encodi...David Faust1-1/+3
2020-09-14Fix support for theassembler's new ".nop" directive on the IA64 target.Nick Clifton1-0/+2
2020-09-14Add a new ".nop" directive to the assembler to allow the creation of no-op in...Nick Clifton4-3/+11
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