| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2024-05-24 | x86: simplify VexVVVV_SRC2 handling for the XOP case | Jan Beulich | 1 | -9/+5 |
| 2024-05-24 | x86: simplify / consolidate check_{word,long,qword}_reg() | Jan Beulich | 1 | -16/+4 |
| 2024-05-24 | x86: correct VCVT{,U}SI2SD | Jan Beulich | 1 | -5/+47 |
| 2024-05-22 | Support APX zero-upper | Cui, Lili | 1 | -2/+3 |
| 2024-05-22 | X86: Remove "i.rex" to eliminate extra conditional branch | Cui, Lili | 1 | -1/+1 |
| 2024-05-22 | Add check for 8-bit old registers in EVEX format | Cui, Lili | 1 | -3/+4 |
| 2024-05-22 | x86: Split REX/REX2 old registers judgment. | Cui, Lili | 1 | -16/+14 |
| 2024-05-21 | gas: drop remnants of ia64-*-aix* | Jan Beulich | 1 | -23/+0 |
| 2024-05-20 | RISC-V: PR31733, Change initial CFI operation from DW_CFA_def_cfa_register to... | Sung-hun Kim | 1 | -1/+1 |
| 2024-05-17 | LoongArch: gas: Adjust DWARF CIE alignment factors | mengqinggang | 1 | -5/+9 |
| 2024-05-16 | aarch64: fp8 convert and scale - add feature flags and related structures | Victor Do Nascimento | 1 | -0/+1 |
| 2024-05-16 | arm: remove incorrect handling of FP bignums in move_or_literal_pool | Richard Earnshaw | 1 | -6/+24 |
| 2024-05-15 | aarch64: Add sysreg features to +d128 dependencies | Andrew Carlotti | 1 | -2/+5 |
| 2024-05-15 | aarch64: Add simd dependency to +sha2 | Andrew Carlotti | 1 | -1/+1 |
| 2024-05-14 | arm: remove Maverick support from the assembler. | Richard Earnshaw | 1 | -179/+4 |
| 2024-05-06 | x86: Drop using extension_opcode to encode vvvv register | Cui, Lili | 1 | -6/+3 |
| 2024-05-06 | x86: Drop SwapSources | Cui, Lili | 1 | -8/+11 |
| 2024-05-06 | x86: Use vexvvvv as the switch state to encode the vvvv register | Cui, Lili | 1 | -15/+17 |
| 2024-05-03 | x86/APX: extend SSE2AVX coverage | Jan Beulich | 1 | -2/+7 |
| 2024-04-25 | bpf: fix calculation when deciding to relax branch | David Faust | 1 | -4/+33 |
| 2024-04-25 | LoongArch: gas: Simplify relocations in sections without code flag | Jinyang He | 1 | -3/+1 |
| 2024-04-23 | arm: Fix MVE vmla encoding | Claudio Bantaloukas | 1 | -2/+2 |
| 2024-04-22 | x86/APX: Add invalid check for APX EVEX.X4. | Cui, Lili | 1 | -1/+4 |
| 2024-04-20 | LoongArch: Add -mignore-start-align option | mengqinggang | 1 | -20/+50 |
| 2024-04-16 | x86: Fix a memory leak in md_assemble | H.J. Lu | 1 | -5/+8 |
| 2024-04-10 | x86-64: Use long NOPs for Intel Core processors | H.J. Lu | 1 | -5/+35 |
| 2024-04-09 | arm: Fix encoding of MVE vqshr[u]n | Alex Coplan | 1 | -4/+4 |
| 2024-04-09 | RISC-V: Support Zcmp push/pop instructions. | Jiawei | 1 | -0/+181 |
| 2024-04-07 | Support APX NF | Cui, Lili | 1 | -4/+31 |
| 2024-04-03 | x86/APX: Remove KEYLOCKER and SHA promotions from EVEX MAP4 | Cui, Lili | 1 | -7/+0 |
| 2024-04-01 | LoongArch: gas: Ignore .align if it is at the start of a section | mengqinggang | 1 | -25/+109 |
| 2024-03-31 | BFD: Fix the bug of R_LARCH_AGLIN caused by discard section | mengqinggang | 1 | -4/+1 |
| 2024-03-28 | x86/SSE2AVX: move checking | Jan Beulich | 1 | -11/+10 |
| 2024-03-28 | x86/SSE2AVX: respect prefixes | Jan Beulich | 1 | -2/+3 |
| 2024-03-28 | RISC-V: Removed privileged spec 1.9.1 support in assembler. | Nelson Chu | 1 | -2/+3 |
| 2024-03-22 | x86: fix Solaris testsuite failures | Jan Beulich | 1 | -6/+3 |
| 2024-03-19 | gas, aarch64: Add faminmax extension | Saurabh Jha | 1 | -0/+1 |
| 2024-03-19 | LoongArch: Add relaxation for R_LARCH_CALL36 | mengqinggang | 1 | -1/+18 |
| 2024-03-18 | aarch64: Add support for (M)ADDPT and (M)SUBPT instructions | Yury Khrustalev | 1 | -0/+47 |
| 2024-03-15 | x86/APX: legacy promoted insns can't access %xmm16-%xmm31 | Jan Beulich | 1 | -0/+7 |
| 2024-03-13 | RISC-V: Add -march=help for gas | Hau Hsu | 1 | -0/+6 |
| 2024-03-12 | LoongArch: Scan all illegal operand instructions without interruption | Lulu Cai | 1 | -5/+6 |
| 2024-03-11 | x86: KeyLocker insn interaction with -msse-check / .sse_check | Jan Beulich | 1 | -1/+2 |
| 2024-03-11 | x86/APX: permit wider than 4-bit immediates with V{EXTRACT,INSERT}{F,I}128 | Jan Beulich | 1 | -1/+3 |
| 2024-03-11 | x86: don't open-code REG_{SP,FP} | Jan Beulich | 1 | -2/+2 |
| 2024-03-08 | gas: Fix x86 build with GCC 6.4 | H.J. Lu | 1 | -1/+1 |
| 2024-03-06 | LoongArch: Delete extra instructions when TLS type transition | Lulu Cai | 1 | -5/+26 |
| 2024-03-01 | s390: Be more verbose about missing operand type | Jens Remus | 1 | -1/+37 |
| 2024-03-01 | s390: Provide operand number in assembler warning and error messages | Jens Remus | 1 | -33/+74 |
| 2024-03-01 | s390: Allow to explicitly omit base register operand in assembly | Jens Remus | 1 | -3/+7 |
