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AgeCommit message (Expand)AuthorFilesLines
1998-02-24 * config/tc-dvp.c (assemble_dma): Do alignment before parsing insn.Doug Evans1-20/+40
1998-02-23Instead of changing the names of .bss etc, add .vubss etc viaJames Lemke2-8/+56
1998-02-23 * cgen.c: #include symcat.h.Doug Evans1-17/+114
1998-02-23 * config/tc-mips.c (mips_ip, case 'P'): Make 'P' arguments beJeff Law1-12/+27
1998-02-21 (vu_count): New static local.Doug Evans1-10/+67
1998-02-21 (cur_mach): New static local.Doug Evans1-28/+78
1998-02-21 (asm_state_stack): Maintain stack of parsing states.Doug Evans1-91/+165
1998-02-21 (asm_state): New state ASM_GIF.Doug Evans1-39/+156
1998-02-20 * confirg/tc-dvp.c (md_assemble): Handle ASM_DIRECT state.Doug Evans1-65/+18
1998-02-20* tc-ppc.c (ppc_biei): Cache the last symbol we insertedRichard Henderson1-15/+64
1998-02-20 * config/tc-d30v.c (parallel_ok): For the explicitly parallelFred Fish1-8/+36
1998-02-19 * config/tc-dvp.c (LOCAL_LABEL_PREFIX,END_LABEL_PREFIX): New macros.Doug Evans1-191/+194
1998-02-19 * config/tc-dvp.c: Include stdarg.h/varargs.h.Doug Evans1-227/+325
1998-02-19Allow FAKE arguments to have a parser handler.Doug Evans1-2/+11
1998-02-18fix thinko in last patchDoug Evans1-2/+5
1998-02-18 * config/tc-dvp.c (parse_float): New function.Doug Evans1-55/+63
1998-02-18remove #ifdef HAVE_CPU_M32RX uses. tweak some commentsDoug Evans1-15/+4
1998-02-16Only parallelise instructions when assembling for the m32rx, and whenNick Clifton1-12/+13
1998-02-13Do not bother checking the operands of instructions which have no operands!Nick Clifton1-17/+32
1998-02-13Reverted writes_to_pc() back to old version of code until PC operands areNick Clifton1-2/+7
1998-02-13Parallelisation code changed to used cgen's new ins operands feature.Nick Clifton1-126/+68
1998-02-12 * config/tc-mips.c (load_address): Don't use mips III or mips IVJeff Law1-84/+232
1998-02-12opcodes:Joern Rennecke1-12/+11
1998-02-12(check_parallel_io_clash): Add #if 0'd out code that uses new operandDoug Evans1-19/+30
1998-02-11(insert_operand): Bring over possible change from branch.Doug Evans1-74/+89
1998-02-11Handle xxx@word + N. Treat it as xxx >> 2 + N.Andrew Cagney1-18/+56
1998-02-06 * config/tc-mips.c (append_insn): Make sure that if we have aIan Lance Taylor1-1/+15
1998-02-04Add checks for side effects of instructions preventing their parallelisation.Nick Clifton1-16/+56
1998-02-04 * config/tc-sparc.h (tc_fix_adjustable) [OBJ_ELF]: A reloc againstIan Lance Taylor1-8/+13
1998-02-03fix commentDoug Evans1-1/+1
1998-02-03Mon Feb 2 18:30:34 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>Ian Lance Taylor3-0/+1964
1998-02-02Improve error reporting for PR14724Nick Clifton1-35/+73
1998-02-02Mon Feb 2 12:39:05 1998 Geoff Keating <geoffk@ozemail.com.au>Ian Lance Taylor1-15/+27
1998-01-31 (md_pcrel_from_section): Add offset to delay slot forDoug Evans1-4/+4
1998-01-31Implement DMAcnt, DMAret & DMAend with explicit count args.James Lemke1-105/+151
1998-01-30 * config/vms-conf.h: Don't undef VERSION.Ian Lance Taylor1-1/+2
1998-01-30fix typo in last changeDoug Evans1-5/+3
1998-01-30 * config/tc-dvp.c (md_longopts): Add -no-dma, -no-dma-pke.Doug Evans1-68/+127
1998-01-29Thu Jan 29 14:42:44 1998 Pat Rankin <rankin@eql.caltech.edu>Ian Lance Taylor1-3/+35
1998-01-29add more direct/unpack codeDoug Evans1-2/+19
1998-01-29 * config/tc-m32r.c (allow_m32rx): Must compile with K&R C.Doug Evans1-1/+15
1998-01-29Fuxed sanitization (again!)Nick Clifton1-5/+1
1998-01-29checkpointDoug Evans1-41/+135
1998-01-29checkpointDoug Evans1-6/+128
1998-01-29checkpointDoug Evans1-26/+144
1998-01-29Sanitization fixes.Nick Clifton1-1/+7
1998-01-29Fix determination of when two instructions can be combined in parallel.Nick Clifton1-12/+10
1998-01-28 * config/obj-aout.h (S_IS_LOCAL): Correct typo--pass argument toIan Lance Taylor1-1/+1
1998-01-28checkpointDoug Evans1-35/+59
1998-01-28 * config/obj-coff.h (RESOLVE_SYMBOL_REDEFINITION): Define.Ian Lance Taylor1-0/+12
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