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Switch MIPS to 32-bit DWARF format.
* config/tc-mips.h (DWARF2_FORMAT): Only define for [TE_IRIX].
* config/tc-mips.c (mips_dwarf2_format): Likewise.
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mips_fix_loongson2f_jump): New variables.
(md_longopts): Add New options -mfix-loongson2f-nop/jump,
-mno-fix-loongson2f-nop/jump.
(md_parse_option): Initialize variables via above options.
(options): New enums for the above options.
(md_begin): Initialize nop_insn from LOONGSON2F_NOP_INSN.
(fix_loongson2f, fix_loongson2f_nop, fix_loongson2f_jump):
New functions.
(append_insn): call fix_loongson2f().
(mips_handle_align): Replace the implicit nops.
* config/tc-mips.h (MAX_MEM_FOR_RS_ALIGN_CODE): Modified
for the new mips_handle_align().
* doc/c-mips.texi: Document the new options.
* gas/mips/loongson-2f-2.s: New test of -mfix-loongson2f-nop.
* gas/mips/loongson-2f-2.d: Likewise.
* gas/mips/loongson-2f-3.s: New test of -mfix-loongson2f-jump.
* gas/mips/loongson-2f-3.d: Likewise.
* gas/mips/mips.exp: Run the new tests.
* opcode/mips.h (LOONGSON2F_NOP_INSN): New macro.
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* config/tc-mips.h (DWARF2_FDE_RELOC_SIZE): Define.
gas/testsuite/
* gas/mips/cfi-n64-1.s, gas/mips/cfi-n64-1.d: New test.
* gas/mips/mips.exp: Run it.
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(DWARF2_FORMAT): Add section arg.
(out_header): New function, split out from..
(out_debug_line): ..here.
(out_debug_aranges): Use out_header.
(out_debug_abbrev): Add info_seg and line_seg args. Use
DW_FORM_data8 (for DW_AT_stmt_list) if line_seg is 64-bit.
(out_debug_info): Use out_header. Output 8 byte DW_AT_stmt_list
if line_seg is 64-bit.
(dwarf2_finish): Adjust out_debug_abbrev call.
* config/tc-mips.h (DWARF2_FORMAT, mips_dwarf2_format): Add sec arg.
* config/tc-mips.c (mips_dwarf2_format): Likewise.
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* config/tc-mips.h (mips_nop_opcode): Declare.
(NOP_OPCODE): Define.
(mips_segment_info): New structure.
(TC_SEGMENT_INFO_TYPE): Use it instead of insn_label_list.
* config/tc-mips.c (label_list): Adjust for new TC_SEGMENT_INFO_TYPE.
(mips_record_mips16_mode): New function.
(install_insn): Call it.
(mips_align): Likewise. Turn the fill argument into an "int *".
Use frag_align_code for code segments if no fill data is given.
(s_align): Adjust call accordingly.
(mips_nop_opcode): New function.
(mips_handle_align): Use the first variable byte to decide which
nop sequence is needed. Use md_number_to_chars and mips16_nop_insn.
gas/testsuite/
* gas/mips/align2.s, gas/mips/align2.d, gas/mips/align2-el.d: New
tests.
* gas/mips/mips.exp: Run them.
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* elfxx-mips.c (mips_elf_calculate_relocation): Allow local stubs
to be used for calls from MIPS16 code.
gas/
* config/tc-mips.h (TC_SYMFIELD_TYPE): New.
* config/tc-mips.c (append_insn): Record which symbols have
R_MIPS16_26 relocations against them.
(mips_fix_adjustable): Don't reduce relocations against such symbols.
ld/testsuite/
* ld-mips-elf/mips16-local-stubs-1.s,
* ld-mips-elf/mips16-local-stubs-1.d: New tests.
* ld-mips-elf/mips-elf.exp: Run them.
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* config/tc-mips.h (enum dwarf2_format): Forward declare.
(DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
* config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
* config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
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label_list.
* config/tc-mips.c (label_list): Define per-segment label_list.
(mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
mips_from_file_after_relocs, mips_define_label): Use per-segment
label_list.
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* config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
(regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
reg_names_o32, reg_names_n32n64): Define register classes.
(reg_lookup): New function, use register classes.
(md_begin): Reserve register names in the symbol table. Simplify
OBJ_ELF defines.
(mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
Use reg_lookup.
(mips16_ip): Use reg_lookup.
(tc_get_register): Likewise.
(tc_mips_regname_to_dw2regnum): New function.
-------------------------------------------------------------------
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Daniel Jacobowitz <dan@codesourcery.com>
Phil Edwards <phil@codesourcery.com>
Zack Weinberg <zack@codesourcery.com>
Mark Mitchell <mark@codesourcery.com>
Nathan Sidwell <nathan@codesourcery.com>
bfd/
* bfd-in2.h: Regenerate.
* config.bfd (mips*-*-vxworks*, mips*el-*-vxworks*): New stanzas.
* configure.in (bfd_elf32_bigmips_vxworks_vec): New stanza.
(bfd_elf32_littlemips_vxworks_vec): Likewise.
(bfd_elf32_bigmips_vec): Add elf-vxworks.lo.
(bfd_elf32_littlemips_vec): Likewise.
(bfd_elf32_nbigmips_vec): Likewise.
(bfd_elf32_nlittlemips_vec): Likewise.
(bfd_elf32_ntradbigmips_vec): Likewise.
(bfd_elf32_ntradlittlemips_vec): Likewise.
(bfd_elf32_tradbigmips_vec): Likewise.
(bfd_elf32_tradlittlemips_vec): Likewise.
(bfd_elf64_bigmips_vec): Likewise.
(bfd_elf64_littlemips_vec): Likewise.
(bfd_elf64_tradbigmips_vec): Likewise.
(bfd_elf64_tradlittlemips_vec): Likewise.
* elf32-mips.c: Include elf-vxworks.h.
(mips_info_to_howto_rel): Use elf_backend_mips_rtype_to_howto
instead of calling mips_elf32_rtype_to_howto directly.
(mips_vxworks_copy_howto_rela): New reloc howto.
(mips_vxworks_jump_slot_howto_rela): Likewise.
(mips_vxworks_bfd_reloc_type_lookup): New function.
(mips_vxworks_rtype_to_howto): Likewise.
(mips_vxworks_final_write_processing): Likewise.
(TARGET_LITTLE_SYM, TARGET_LITTLE_NAME): Override for VxWorks.
(TARGET_BIG_SYM, TARGET_BIG_NAME, elf_bed, ELF_MAXPAGESIZE): Likewise.
(elf_backend_want_got_plt): Likewise.
(elf_backend_want_plt_sym): Likewise.
(elf_backend_got_symbol_offset): Likewise.
(elf_backend_want_dynbss): Likewise.
(elf_backend_may_use_rel_p): Likewise.
(elf_backend_may_use_rela_p): Likewise.
(elf_backend_default_use_rela_p): Likewise.
(elf_backend_got_header_size: Likewise.
(elf_backend_plt_readonly): Likewise.
(bfd_elf32_bfd_reloc_type_lookup): Likewise.
(elf_backend_mips_rtype_to_howto): Likewise.
(elf_backend_adjust_dynamic_symbol): Likewise.
(elf_backend_finish_dynamic_symbol): Likewise.
(bfd_elf32_bfd_link_hash_table_create): Likewise.
(elf_backend_add_symbol_hook): Likewise.
(elf_backend_link_output_symbol_hook): Likewise.
(elf_backend_emit_relocs): Likewise.
(elf_backend_final_write_processing: Likewise.
(elf_backend_additional_program_headers): Likewise.
(elf_backend_modify_segment_map): Likewise.
(elf_backend_symbol_processing): Likewise.
* elfxx-mips.c: Include elf-vxworks.h.
(mips_elf_link_hash_entry): Add is_relocation_target and
is_branch_target fields.
(mips_elf_link_hash_table): Add is_vxworks, srelbss, sdynbss, srelplt,
srelplt2, sgotplt, splt, plt_header_size and plt_entry_size fields.
(MIPS_ELF_RELA_SIZE, MIPS_ELF_REL_DYN_NAME): New macros.
(MIPS_RESERVED_GOTNO): Take a mips_elf_link_hash_table argument.
Return 3 for VxWorks.
(ELF_MIPS_GP_OFFSET): Change the argument from a bfd to a
mips_elf_link_hash_table. Return 0 for VxWorks.
(MIPS_ELF_GOT_MAX_SIZE): Change the argument from a bfd to a
mips_elf_link_hash_table. Update the call to ELF_MIPS_GP_OFFSET.
(mips_vxworks_exec_plt0_entry): New variable.
(mips_vxworks_exec_plt_entry): Likewise.
(mips_vxworks_shared_plt0_entry): Likewise.
(mips_vxworks_shared_plt_entry): Likewise.
(mips_elf_link_hash_newfunc): Initialize the new hash_entry fields.
(mips_elf_rel_dyn_section): Change the bfd argument to a
mips_elf_link_hash_table. Use MIPS_ELF_REL_DYN_NAME to get
the name of the section.
(mips_elf_initialize_tls_slots): Update the call to
mips_elf_rel_dyn_section.
(mips_elf_gotplt_index): New function.
(mips_elf_local_got_index): Add an input_section argument.
Update the call to mips_elf_create_local_got_entry.
(mips_elf_got_page): Likewise.
(mips_elf_got16_entry): Likewise.
(mips_elf_create_local_got_entry): Add bfd_link_info and input_section
arguments. Create dynamic relocations for each entry on VxWorks.
(mips_elf_merge_gots): Update the use of MIPS_ELF_GOT_MAX_SIZE.
(mips_elf_multi_got): Update the uses of MIPS_ELF_GOT_MAX_SIZE
and MIPS_RESERVED_GOTNO.
(mips_elf_create_got_section): Update the uses of
MIPS_ELF_GOT_MAX_SIZE. Create .got.plt on VxWorks.
(is_gott_symbol): New function.
(mips_elf_calculate_relocation): Use a dynobj local variable.
Update the calls to mips_elf_local_got_index, mips_elf_got16_entry and
mips_elf_got_page_entry. Set G to the .got.plt entry when calculating
VxWorks R_MIPS_CALL* relocations. Calculate and use G for all GOT
relocations on VxWorks. Add dynamic relocations for references
to the VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols. Don't
create dynamic relocations for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64
in VxWorks executables.
(mips_elf_allocate_dynamic_relocations): Add a bfd_link_info argument.
Use MIPS_ELF_RELA_SIZE to calculate the size of a VxWorks entry.
Don't allocate a null entry on VxWorks.
(mips_elf_create_dynamic_relocation): Update the call to
mips_elf_rel_dyn_section. Use absolute rather than relative
relocations for VxWorks, and make them RELA rather than REL.
(_bfd_mips_elf_create_dynamic_sections): Don't make .dynamic
read-only on VxWorks. Update the call to mips_elf_rel_dyn_section.
Create the .plt, .rela.plt, .dynbss and .rela.bss sections on
VxWorks. Likewise create the _PROCEDURE_LINKAGE_TABLE symbol.
Call elf_vxworks_create_dynamic_sections for VxWorks and
initialize the plt_header_size and plt_entry_size fields.
(_bfd_mips_elf_check_relocs): Don't allow GOT relocations to be
used in VxWorks executables. Don't allocate dynamic relocations
for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 in VxWorks executables.
Set is_relocation_target for each symbol referenced by a relocation.
Allocate .rela.dyn entries for relocations against the special
VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols. Create GOT
entries for all VxWorks R_MIPS_GOT16 relocations. Don't allocate
a global GOT entry for symbols mentioned in VxWorks R_MIPS_CALL*,
R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 relocations. Update the calls
to mips_elf_rel_dyn_section and mips_elf_allocate_dynamic_relocations.
Set is_branch_target for symbols mentioned in R_MIPS_PC16 or R_MIPS_26
relocations. Don't set no_fn_stub on VxWorks.
(_bfd_mips_elf_adjust_dynamic_symbol): Update the call to
mips_elf_allocate_dynamic_relocations.
(_bfd_mips_vxworks_adjust_dynamic_symbol): New function.
(_bfd_mips_elf_always_size_sections): Do not allocate GOT page
entries for VxWorks, and do not create multiple GOTs.
(_bfd_mips_elf_size_dynamic_sections): Use MIPS_ELF_REL_DYN_NAME.
Handle .got specially for VxWorks. Update the uses of
MIPS_RESERVED_GOTNO and mips_elf_allocate_dynamic_relocations.
Check for sgotplt and splt. Allocate the .rel(a).dyn contents last,
once its final size is known. Set DF_TEXTREL for VxWorks. Add
DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL, DT_PLTRELSZ and DT_JMPREL
tags on VxWorks. Do not add the MIPS-specific tags for VxWorks.
(_bfd_mips_vxworks_finish_dynamic_symbol): New function.
(mips_vxworks_finish_exec_plt): Likewise.
(mips_vxworks_finish_shared_plt): Likewise.
(_bfd_mips_elf_finish_dynamic_sections): Remove an unncessary call
to mips_elf_rel_dyn_section. Use a VxWorks-specific value of
DT_PLTGOT. Handle DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL,
DT_PLTRELSZ and DT_JMPREL. Update the uses of MIPS_RESERVED_GOTNO
and mips_elf_rel_dyn_section. Use a different GOT header for
VxWorks. Don't sort .rela.dyn on VxWorks. Finish the PLT on VxWorks.
(_bfd_mips_elf_link_hash_table_create): Initialize the new
mips_elf_link_hash_table fields.
(_bfd_mips_vxworks_link_hash_table_create): New function.
(_bfd_mips_elf_final_link): Set the GP value to _GLOBAL_OFFSET_TABLE_
on VxWorks. Update the call to ELF_MIPS_GP_OFFSET.
* elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Declare.
(_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
(_bfd_mips_vxworks_link_hash_table_create): Likewise.
* libbfd.h: Regenerate.
* Makefile.am (elfxx-mips.lo): Depend on elf-vxworks.h.
(elf32-mips.lo): Likewise.
* Makefile.in: Regenerate.
* reloc.c (BFD_RELOC_MIPS_COPY, BFD_RELOC_MIPS_JUMP_SLOT): Declare.
* targets.c (bfd_elf32_bigmips_vxworks_vec): Declare.
(bfd_elf32_littlemips_vxworks_vec): Likewise.
(_bfd_target_vector): Add entries for them.
gas/
* config/tc-mips.c (mips_target_format): Handle vxworks targets.
(md_begin): Complain about -G being used for PIC. Don't change
the text, data and bss alignments on VxWorks.
(reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
generating VxWorks PIC.
(load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
(macro): Likewise, but do not treat la $25 specially for
VxWorks PIC, and do not handle jal.
(OPTION_MVXWORKS_PIC): New macro.
(md_longopts): Add -mvxworks-pic.
(md_parse_option): Don't complain about using PIC and -G together here.
Handle OPTION_MVXWORKS_PIC.
(md_estimate_size_before_relax): Always use the first relaxation
sequence on VxWorks.
* config/tc-mips.h (VXWORKS_PIC): New.
gas/testsuite/
* gas/mips/vxworks1.s, gas/mips/vxworks1.d,
* gas/mips/vxworks1-xgot.d: New tests.
* gas/mips/mips.exp: Run them. Do not run other tests on VxWorks.
include/elf/
* mips.h (R_MIPS_COPY, R_MIPS_JUMP_SLOT): New relocs.
ld/
* configure.tgt (mips*el-*-vxworks*, mips*-*-vxworks*): Use
separate VxWorks emulations.
* emulparams/elf32ebmipvxworks.sh: New file.
* emulparams/elf32elmipvxworks.sh: New file.
* Makefile.am (ALL_EMULATIONS): Add eelf32ebmipvxworks.o and
eelf32elmipvxworks.o.
(eelf32ebmipvxworks.c, eelf32elmipvxworks.c): New rules.
* Makefile.in: Regenerate.
ld/testsuite/
* ld-mips/vxworks1.dd, ld-mips/vxworks1.ld, ld-mips/vxworks1-lib.dd,
* ld-mips/vxworks1-lib.nd, ld-mips/vxworks1-lib.rd,
* ld-mips/vxworks1-lib.s, ld-mips/vxworks1.rd, ld-mips/vxworks1.s,
* ld-mips/vxworks1-static.d, ld-mips/vxworks2.s, ld-mips/vxworks2.sd,
* ld-mips/vxworks2-static.sd: New tests.
* ld-mips/mips-elf.exp: Run them.
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* elf32-mips.c (elf_mips_howto_table_rel): Use rightshift 2 for
R_MIPS_PC16.
(mips_reloc_map): Map BFD_RELOC_16_PCREL_S2 to R_MIPS_PC16.
(bfd_elf32_bfd_reloc_type_lookup): Don't handle
BFD_RELOC_16_PCREL_S2.
* elf64-mips.c (mips_elf64_howto_table_rel): Use rightshift 2 for
R_MIPS_PC16.
(mips_elf64_howto_table_rela): Likewise.
(mips_reloc_map): Map BFD_RELOC_16_PCREL_S2 to R_MIPS_PC16.
(bfd_elf64_bfd_reloc_type_lookup): Don't handle
BFD_RELOC_16_PCREL_S2.
* elfn32-mips.c (elf_mips_howto_table_rel): Use rightshift 2 for
R_MIPS_PC16.
(elf_mips_howto_table_rela): Likewise.
(mips_reloc_map): Map BFD_RELOC_16_PCREL_S2 to R_MIPS_PC16.
(bfd_elf32_bfd_reloc_type_lookup): Don't handle
BFD_RELOC_16_PCREL_S2.
* elfxx-mips.c: Formatting fixes.
(mips_elf_calculate_relocation): Handle R_MIPS_GNU_REL16_S2
and R_MIPS_PC16 identically.
gas/
* config/tc-mips.c (append_insn): Handle BFD_RELOC_16_PCREL_S2.
(macro_build): Complain for invalid branch displacements.
(mips_validate_fix): Delete.
(md_apply_fix): Re-add pcrel support for branches. Use consistent
text for misaligned branch targets.
(tc_gen_reloc: Re-add pcrel support for branches. Handle strange
BFD pcrel processing. Remove error for unresolved branches.
* config/tc-mips.h (TC_VALIDATE_FIX, mips_validate_fix): Delete.
gas/testsuite/
* gas/mips/bge.d, gas/mips/bge.s, gas/mips/bgeu.d, gas/mips/bgeu.s,
gas/mips/blt.d, gas/mips/blt.s, gas/mips/bltu.d,
gas/mips/bltu.s: Reactivate external branch tests.
* gas/mips/branch-misc-2.d, gas/mips/branch-misc-2pic.d,
gas/mips/branch-misc-2-64.d, gas/mips/branch-misc-2pic-64.d: New
tests.
* gas/mips/branch-misc-2.l, gas/mips/branch-misc-2pic.l,
gas/testsuite/gas/mips/branch-misc-2pic.s: Remove.
* gas/mips/mips.exp: Adjust branch-misc-2 tests. Add 64-bit
variants.
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* cgen.c, cgen.h, tc.h, write.c, config/obj-coff.c
* config/tc-a29k.c, config/tc-alpha.c, config/tc-alpha.h
* config/tc-arc.c, config/tc-arc.h, config/tc-arm.c
* config/tc-arm.h, config/tc-avr.c, config/tc-avr.h
* config/tc-cris.c, config/tc-crx.c, config/tc-d10v.c
* config/tc-d10v.h, config/tc-d30v.c, config/tc-d30v.h
* config/tc-dlx.c, config/tc-dlx.h, config/tc-fr30.h
* config/tc-frv.c, config/tc-frv.h, config/tc-h8300.c
* config/tc-h8500.c, config/tc-hppa.c, config/tc-hppa.h
* config/tc-i370.c, config/tc-i370.h, config/tc-i386.c
* config/tc-i386.h, config/tc-i860.c, config/tc-i860.h
* config/tc-i960.c, config/tc-i960.h, config/tc-ia64.c
* config/tc-ip2k.c, config/tc-ip2k.h, config/tc-iq2000.c
* config/tc-iq2000.h, config/tc-m32r.c, config/tc-m32r.h
* config/tc-m68hc11.c, config/tc-m68hc11.h, config/tc-m68k.c
* config/tc-m68k.h, config/tc-m88k.c, config/tc-maxq.c
* config/tc-mcore.c, config/tc-mcore.h, config/tc-mips.c
* config/tc-mips.h, config/tc-mmix.c, config/tc-mn10200.c
* config/tc-mn10300.c, config/tc-msp430.c, config/tc-ns32k.c
* config/tc-openrisc.h, config/tc-or32.c, config/tc-or32.h
* config/tc-pdp11.c, config/tc-pj.c, config/tc-pj.h
* config/tc-ppc.c, config/tc-ppc.h, config/tc-s390.c
* config/tc-s390.h, config/tc-sh64.c, config/tc-sh.c
* config/tc-sh.h, config/tc-sparc.c, config/tc-sparc.h
* config/tc-tahoe.c, config/tc-tic30.c, config/tc-tic4x.c
* config/tc-tic54x.c, config/tc-tic80.c, config/tc-v850.c
* config/tc-v850.h, config/tc-vax.c, config/tc-vax.h
* config/tc-w65.c, config/tc-xstormy16.c, config/tc-xstormy16.h
* config/tc-xtensa.c, config/tc-z8k.c:
Replace all instances of the string "_apply_fix3" with
"_apply_fix".
* po/POTFILES.in, po/gas.pot: Regenerate.
bfd:
* coff-i386.c: Change md_apply_fix3 to md_apply_fix in comment.
cgen:
* doc/porting.texi: Change all mention of md_apply_fix3 and
gas_cgen_md_apply_fix3 to md_apply_fix and gas_cgen_md_apply_fix
respectively.
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2005-03-14 Eric Christopher <echristo@redhat.com>
* config/tc-mips.c: Include dw2gencfi.h.
(mips_cfi_frame_initial_instructions): New.
* config/tc-mips.h (TARGET_USE_CFIPOP): Define.
(tc_cfi_frame_initial_instructions): Ditto.
(DWARF2_DEFAULT_RETURN_COLUMN): Ditto.
(DWARF2_CIE_DATA_ALIGNMENT): Ditto.
* Makefile.am: Update dependencies.
* Makefile.in: Regenerate.
==> testsuite/ChangeLog <==
2005-03-14 Eric Christopher <echristo@redhat.com>
* gas/cfi/cfi-mips-1.d, gas/cfi/cfi-mips-1.s: New dump test.
* gas/cfi/cfi.exp: Run it.
* gas/cfi/cfi-common-1.d: Update.
* gas/cfi/cfi-common-2.d: Ditto.
* gas/cfi/cfi-common-3.d: Ditto.
* gas/cfi/cfi-common-4.d: Ditto.
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(mips_emit_delays): Declare.
(md_flush_pending_output): Use mips_emit_delays.
* config/tc-mips.c (mips_no_prev_insn): Remove parameter; always forget
the previous instructions.
(md_begin, append_insn, md_parse_option): Update callers.
(mips_emit_delay): Remove parameter. Move INSNS != 0 code to
start_noreorder.
(mips_align, s_change_sec, s_cons, s_float_cons, s_gpword)
(s_gpdword): Update callers.
(start_noreorder, end_noreorder): New functions.
(macro, macro2, mips16_macro, s_mipsset): Use them instead of
manipulating mips_opts or prev_nop_frag directly.
(mips_flush_pending_output): Delete.
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* config/tc-mips.c (mips_cl_insn): ...here. Add new fields:
frag, where, fixp, reloc_type, valid_p, noreorder_p, delay_slot_p
and extended_p.
(history): New variable.
(prev_insn, prev_prev_insn, prev_insn_valid, prev_insn_frag)
(prev_insn_where, prev_insn_reloc_type, prev_insn_fixp)
(prev_insn_is_delay_slot, prev_insn_unreordered, prev_insn_extended)
(prev_prev_insn_unreordered): Delete.
(reg_needs_delay, append_insn, mips_no_prev_insn, mips_emit_delays)
(macro_start): Replace uses of prev_insn* with the equivalent history[]
field.
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2004-04-28 Chris Demetriou <cgd@broadcom.com>
* reloc.c: Remove BFD_RELOC_PCREL_HI16_S and BFD_RELOC_PCREL_LO16.
* bfd-in2.h: Regenerate.
* libbfd.h: Likewise.
[ gas/ChangeLog ]
2004-04-28 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c (HAVE_32BIT_ADDRESSES, append_insn, macro_build)
(load_address, macro, mips_ip, md_parse_option)
(mips_force_relocation, mips_validate_fix, md_apply_fix3)
(s_change_sec, pic_need_relax, tc_gen_reloc): Remove all
embedded-PIC handling, and update comments.
(SWITCH_TABLE): Remove.
* config/tc-mips.h (DIFF_EXPR_OK): Delete.
(enum mips_pic_level): Remove EMBEDDED_PIC.
(EXTERN_FORCE_RELOC): Remove embedded-PIC handling.
(TC_FORCE_RELOCATION): Update comment.
* ecoff.c (ecoff_build_lineno): Add comment about some code that
might be safe to remove now that MIPS embedded-PIC is gone.
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* config/tc-mips.h (mips_dwarf2_addr_size): Prototype.
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* config/tc-mips.c (RDATA_SECTION_NAME, mips_target_format): Remove
a.out support.
(md_begin, mips_ip, md_parse_option, s_change_sec, s_option,
s_abicalls, nopic_need_relax, tc_gen_reloc): Remove uses of
USE_GLOBAL_POINTER_OPT.
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* config/tc-mips.c (mips_dwarf2_addr_size): New.
* config/tc-mips.h (DWARF2_ADDR_SIZE): Use.
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2003-07-25 H.J. Lu <hongjiu.lu@intel.com>
* elf-bfd.h (bfd_elf_special_section): New.
(elf_backend_data): Add special_sections, a pointer to
bfd_elf_special_section.
(elf_section_type). New.
(elf_section_flags): New.
(_bfd_elf_get_sec_type_attr): New.
* elf.c (_bfd_elf_make_section_from_shdr): Always use the
real section type/flags.
(special_sections): New.
(get_special_section): New.
(_bfd_elf_get_sec_type_attr): New.
(_bfd_elf_new_section_hook): Check special_section to set
elf_section_type and elf_section_flags.
(elf_fake_sections): Don't use section name to set ELF section
data.
* elf32-m32r.c (m32r_elf_special_sections): New.
(elf_backend_special_sections): Defined.
* elf32-m68hc11.c (elf32_m68hc11_special_sections): New.
(elf_backend_special_sections): Defined.
* elf32-mcore.c (mcore_elf_special_sections): New.
(elf_backend_special_sections): Defined.
* elf32-ppc.c (ppc_elf_special_sections): New.
(elf_backend_special_sections): Defined.
* elf32-sh64.c (sh64_elf_special_sections): New.
(elf_backend_special_sections): Defined.
* elf32-v850.c (v850_elf_special_sections): New.
(elf_backend_special_sections): Defined.
* elf32-xtensa.c (elf_xtensa_special_sections): New.
(elf_backend_special_sections): Defined.
* elf64-alpha.c (elf64_alpha_special_sections): New.
(elf_backend_special_sections): Defined.
* elf64-hppa.c (elf64_hppa_special_sections): New.
(elf_backend_special_sections): Defined.
* elf64-ppc.c (ppc64_elf_special_sections): New.
(elf_backend_special_sections): Defined.
* elf64-sh64.c (sh64_elf64_special_sections): New.
(elf_backend_special_sections): Defined.
* elfxx-ia64.c (elfNN_ia64_special_sections): New.
(elf_backend_special_sections): Defined.
* elfxx-mips.c (_bfd_mips_elf_special_sections): New.
* elfxx-mips.h (_bfd_mips_elf_special_sections): New.
(elf_backend_special_sections): Defined.
* elfxx-target.h (elf_backend_special_sections): New. Default
to NULL.
(elfNN_bed): Initialize special_sections.
* section.c (bfd_abs_section): Remove const.
(bfd_und_section): Likewise.
(bfd_com_section): Likewise.
(bfd_ind_section): Likewise.
gas/
2003-07-25 H.J. Lu <hongjiu.lu@intel.com>
* config/obj-elf.c (special_sections): Removed.
(obj_elf_change_section): Call _bfd_elf_get_sec_type_attr. Set
elf_section_type and elf_section_flags.
(elf_frob_file): Set SHT_GROUP.
* config/obj-elf.h (obj_sec_set_private_data): New.
* config/tc-alpha.h (ELF_TC_SPECIAL_SECTIONS): Removed.
* config/tc-ia64.h: Likewise.
* config/tc-m32r.h: Likewise.
* config/tc-m68hc11.h: Likewise.
* config/tc-mcore.h: Likewise.
* config/tc-mips.h: Likewise.
* config/tc-ppc.h: Likewise.
* config/tc-sh64.h: Likewise.
* config/tc-v850.h: Likewise.
* config/tc-xtensa.h: Likewise.
* config/tc-v850.h (SHF_V850_GPREL): Removed.
(SHF_V850_EPREL): Likewise.
(SHF_V850_R0REL): Likewise.
* subsegs.c (subseg_get): Call obj_sec_set_private_data if it
is defined.
include/elf/
2003-07-25 H.J. Lu <hongjiu.lu@intel.com>
* v850.h (SHF_V850_GPREL): New.
(SHF_V850_EPREL): Likewise.
(SHF_V850_R0REL): Likewise.
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prototypes and casts. Replace PTR with void *. Reformat.
* config/tc-mips.h: Likewise.
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(elf_mips_howto_table_rel): Use it.
(gprel32_with_gp): Move prototype.
(mips_elf_hi16_reloc): Check for ! BSF_LOCAL instead of zero addend.
Use mips_elf_generic_reloc.
(mips_elf_got16_reloc): Check for ! BSF_LOCAL instead of zero addend.
Code cleanup.
(_bfd_mips_elf32_gprel16_reloc): Check for ! BSF_LOCAL instead of
zero addend.
(mips_elf_gprel32_reloc): Likewise. Use the same GP assignment logic
as in the other *_gprel*_reloc functions.
(gprel32_with_gp): Handle partial_inplace properly.
(mips32_64bit_reloc): Use mips_elf_generic_reloc.
(mips16_gprel_reloc): Check for ! BSF_LOCAL instead of zero addend.
Do addend handling directly instead of calling
_bfd_mips_elf_gprel16_with_gp. Handle partial_inplace properly.
* elf64-mips.c (mips_elf64_hi16_reloc): Check for ! BSF_LOCAL instead
of zero addend. Handle partial_inplace properly.
(mips_elf64_got16_reloc): Check for ! BSF_LOCAL instead of zero
addend.
(mips_elf64_gprel16_reloc): Likewise.
(mips_elf64_literal_reloc): Likewise.
(mips_elf64_gprel32_reloc): Likewise. Use the same GP assignment
logic as in the other *_gprel*_reloc functions. Handle
partial_inplace properly.
(mips_elf64_shift6_reloc): Check for ! BSF_LOCAL instead of zero
addend. Handle partial_inplace properly.
(mips16_gprel_reloc): Likewise. Do addend handling directly instead
of calling _bfd_mips_elf_gprel16_with_gp.
* elfn32-mips.c (mips_elf_got16_reloc): Check for BSF_LOCAL.
(mips_elf_gprel32_reloc): Check for ! BSF_LOCAL instead
of zero addend.
(mips_elf_shift6_reloc): Handle partial_inplace properly.
(mips16_gprel_reloc): Likewise. Do addend handling directly instead
of calling _bfd_mips_elf_gprel16_with_gp.
* elfxx-mips.c (_bfd_mips_elf_gprel16_with_gp): Handle
partial_inplace properly. Fix wrong addend handling. Fix overflow
check.
(_bfd_mips_elf_sign_extend): Renamed from mips_elf_sign_extend and
exported.
(mips_elf_calculate_relocation): Use _bfd_mips_elf_sign_extend.
(_bfd_mips_elf_relocate_section): Likewise.
(mips_elf_create_dynamic_relocation): Update sec_info_type access.
* elfxx-mips.h (_bfd_mips_relax_section): Fix prototype declaration.
(_bfd_mips_elf_sign_extend): New prototype.
* config/tc-mips.c (md_pcrel_from): Return actual pcrel address.
(md_apply_fix3): Ignore non-special relocations. Remove superfluous
exceptions from size assert. Remove most of the addend fixup
specialcasing. Remove value, use valP directly. simplify fx_addnumber
handling. Remove zero addend specialcases.
(tc_gen_reloc): Use appropriate value for reloc2 addend. Remove
the addend fixup specialcase.
* config/tc-mips.h (MD_APPLY_SYM_VALUE): Define as 0.
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* config/tc-mips.c: Use signed add for n32 address arithmetic.
(append_insn): When filling delay slots with instructions
that have fixups that tc_gen_reloc might consider modifyable
in variant frags, start a new frag.
(load_address): Generate GOT_DISP with of without offset
depending on whether symbol is local. For -xgot, use
GOT_PAGE/GOT_OFST or GOT_HI16/GOT_LO16.
(macro) <M_DLA_AB, M_LA_AB>: Likewise.
<M_JAL_A>: In NewABI, use CALL16 or GOT_DISP for small got,
CALL_HI16/CALL_LO16 or GOT_PAGE/GOT_OFST for big got.
<ld_st>: In NewABI with small got, always use
GOT_PAGE/GOT_OFST, with the latter in the load/store
instruction. With big got, use GOT_HI16/GOT_LO16 or
GOT_PAGE/GOT_OFST.
(tc_gen_reloc): Adjust variant frags with GOT_DISP in NewABI.
Add tc_frag_data.tc_fr_offset to addends. Decay CALL16,
GOT_OFST and GOT_DISP to GOT_DISP in NewABI.
(md_convert_frag): Use memmove for safe copying of overlapping
regions.
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* config/tc-mips.h (TC_VALIDATE_FIX): Define.
(mips_validate_fix): Declare.
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* symbols.h (S_FORCE_RELOC): Likewise.
* config/obj-aout.h (S_FORCE_RELOC): Likewise.
* config/obj-bout.h (S_FORCE_RELOC): Likewise.
* config/obj-coff.h (S_FORCE_RELOC): Likewise.
* config/obj-ieee.h (S_FORCE_RELOC): Likewise.
* config/obj-vms.h (S_FORCE_RELOC): Likewise.
* write.c (generic_force_reloc): New function.
(TC_FORCE_RELOCATION): Use it here instead of S_FORCE_RELOC.
(TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too.
(adjust_reloc_syms): Adjust S_FORCE_RELOC call.
* as.h (generic_force_reloc): Declare.
* doc/internals.texi (S_FORCE_RELOC): Update.
(TC_FORCE_RELOCATION_SUB_SAME): Update.
* config/tc-alpha.c (alpha_force_relocation): Adjust to use
generic_force_reloc.
(alpha_fix_adjustable): Likewise.
* config/tc-arm.c (arm_force_relocation): Likewise.
* config/tc-cris.c (md_cris_force_relocation): Likewise.
* config/tc-frv.c (frv_force_relocation): Likewise.
* config/tc-i386.c (md_apply_fix3): Likewise.
* config/tc-ia64.c (ia64_force_relocation): Likewise.
* config/tc-ip2k.c (ip2k_force_relocation): Likewise.
* config/tc-m32r.c (m32r_force_relocation): Likewise.
* config/tc-m68hc11.c (tc_m68hc11_force_relocation): Likewise.
* config/tc-mcore.c (mcore_force_relocation): Likewise.
* config/tc-mips.c (mips_force_relocation): Likewise.
* config/tc-mmix.c (mmix_force_relocation): Likewise.
* config/tc-ppc.c (ppc_force_relocation): Likewise.
* config/tc-s390.c (tc_s390_force_relocation): Likewise.
* config/tc-sh.c (sh_force_relocation): Likewise.
(md_pcrel_from_section): Likewise.
* config/tc-sparc.c (tc_gen_reloc): Likewise.
* config/tc-v850.c (v850_force_relocation): Likewise.
* config/tc-xstormy16.c (xstormy16_force_relocation): Likewise.
* config/tc-i386.h (TC_FORCE_RELOCATION): Likewise.
* config/tc-mcore.h (TC_FORCE_RELOCATION): Likewise.
* config/tc-sparc.h (tc_fix_adjustable): Likewise.
* config/tc-d10v.c (d10v_force_relocation): Delete.
* config/tc-d10v.h (TC_FORCE_RELOCATION): Don't define.
* config/tc-dlx.c (md_dlx_force_relocation): Delete.
* config/tc-dlx.h (TC_FORCE_RELOCATION): Don't define.
* config/tc-fr30.c (fr30_force_relocation): Delete.
* config/tc-fr30.h (TC_FORCE_RELOCATION): Don't define.
* config/tc-mn10300.c (mn10300_force_relocation): Delete.
* config/tc-mn10300.h (TC_FORCE_RELOCATION): Don't define.
(TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too.
* config/tc-i960.h (TC_FORCE_RELOCATION_SUB_SAME): Likewise.
* config/tc-hppa.c (hppa_force_relocation): Adjust S_FORCE_RELOC call.
* config/tc-mips.c (RELAX_BRANCH_TOOFAR): Warning fix.
* config/tc-mips.h (TC_FORCE_RELOCATION_SUB_SAME): Don't define.
* config/tc-openrisc.c (openrisc_force_relocation): Delete.
* config/tc-openrisc.h (TC_FORCE_RELOCATION): Don't define.
* config/tc-sparc.c (elf32_sparc_force_relocation): Delete.
* config/tc-sparc.h (TC_FORCE_RELOCATION): Don't define for ELF.
* config/tc-i386.c (i386_force_relocation): Delete.
* config/tc-i386.h (TC_FORCE_RELOCATION): Don't define for
BFD_ASSEMBLER.
(EXTERN_FORCE_RELOC): Fix TE_PE and STRICT_PE_FORMAT nesting.
* config/tc-m68k.h (TC_FORCE_RELOCATION): Don't define.
* config/tc-pj.h (TC_FORCE_RELOCATION): Don't define.
* config/tc-sh.h (TC_FORCE_RELOCATION_SUB_ABS): Don't call
S_FORCE_RELOC.
(TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too.
* config/tc-sh64.h (TC_FORCE_RELOCATION_SUB_SAME): Likewise.
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(dwarf2_finish): Use it.
* doc/internals.texi (DWARF2_ADDR_SIZE): Document it.
* config/tc-mips.h (DWARF2_ADDR_SIZE): Override.
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comparisons of bfd_boolean vars with TRUE/FALSE. Formatting.
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(md_relax_frag): Adjust macro.
* config/tc-mips.c (mips_relax_branch): New variable.
(RELAX_BRANCH_ENCODE, RELAX_BRANCH_P, RELAX_BRANCH_LIKELY,
RELAX_BRANCH_LINK, RELAX_BRANCH_TOOBAR): New.
(RELAX_MIPS16_P): Adjust.
(append_insn): Emit branch to non-constant in a frag_var if
branch-relaxation is desirable and possible.
(OPTION_RELAX_BRANCH, OPTION_NO_RELAX_BRANCH): New options.
(OPTION_ELF_BASE): Adjust.
(md_parse_option): Handle new options.
(md_apply_fix3): Update comment on EMBEDDED_PIC conditional
branch relaxation.
(relaxed_branch_length): New function.
(md_estimate_size_before_relax): Handle branch frags.
(mips_relax_frag): Likewise.
(md_convert_frag): Handle branch frags. Warn if branch is
relaxed.
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(TC_FORCE_RELOCATION): Tidy arg.
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(md_begin): Move processing of defaults to mips_after_parse_args.
config/tc-mips.h (md_after_parse_args): Define.
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BFD_RELOC_MIPS_GPREL by BFD_RELOC_GPREL16.
* pe-mips.c (mips_bfd_reloc_type_lookup): Likewise.
* elf32-mips.c (mips_reloc_map): Likewise. Replace
BFD_RELOC_MIPS_GPREL32 by BFD_RELOC_GPREL32.
* elf64-mips.c (mips_reloc_map): Likewise.
* reloc.c (BFD_RELOC_MIPS_GPREL): Remove.
(BFD_RELOC_MIPS_GPREL32): Remove.
* config/tc-mips.c (macro_build): Replace BFD_RELOC_MIPS_GPREL
by BFD_RELOC_GPREL16.
(load_address): Likewise.
(macro): Likewise.
(md_apply_fix): Likewise. Replace BFD_RELOC_MIPS_GPREL32 by
BFD_RELOC_GPREL32.
(s_gpword): Replace BFD_RELOC_MIPS_GPREL32 by BFD_RELOC_GPREL32.
(tc_gen_reloc): Replace BFD_RELOC_MIPS_GPREL by BFD_RELOC_GPREL16.
*config/tc-mips.h: Replace BFD_RELOC_MIPS_GPREL by BFD_RELOC_GPREL16.
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value, not the word beyond maximum.
* tc_mips.c (macro_build_lui): Code cleanup.
(macro): Reflect change to MAX_GPREL_OFFSET.
(mips_ip): Check explicitly against S_EX_NONE.
(my_get_SmallExpression): parse for %gp_rel, not %gprel.
(md_apply_fix): Code cleanup.
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larger.
(relax_frag): Add segment parameter. Only call symbol_get_frag
once. Only call is_dnrange if the symbol is in the same segment,
and the symbol address is larger.
(relax_segment): Pass segment to md_relax_frag and relax_frag.
* write.h (relax_frag): Update declaration.
* config/tc-fr30.c (fr30_relax_frag): Add segment parameter. Pass
it to relax_frag.
* config/tc-m32r.c (m32r_relax_frag): Likewise.
* config/tc-m32r.h (md_relax_frag): Add segment parameter.
(m32r_relax_frag): Update declaration.
* config/tc-mips.h (md_relax_frag): Add segment parameter.
* config/tc-tic54x.h (md_relax_frag): Likewise.
* doc/internals.texi (CPU backend): Update documentation for
md_relax_frag.
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* frags.c (NOP_OPCODE): Move default from read.c.
(MAX_MEM_FOR_RS_ALIGN_CODE): New default.
(frag_align_code): New.
* frags.h (frag_align_code): Declare.
* read.c (NOP_OPCODE): Remove.
(do_align): Use frag_align_code.
* write.c (NOP_OPCODE): Remove.
(get_recorded_alignment): New.
(cvt_frag_to_fill): Handle rs_align_test.
(relax_segment): Likewise.
(subsegs_finish): Align last subseg in section to the
section alignment. Use frag_align_code.
* write.h (get_recorded_alignment): Declare.
* config/obj-coff.c (size_section): Handle rs_align_test.
(fill_section, fixup_mdeps): Likewise.
(write_object_file): Use frag_align_code.
* config/tc-alpha.c (alpha_align): Use frag_align_code.
(alpha_handle_align): New.
* config/tc-alpha.h (HANDLE_ALIGN): New.
(MAX_MEM_FOR_RS_ALIGN_CODE): New.
* config/tc-i386.h (md_do_align): Use frag_align_code.
(MAX_MEM_FOR_RS_ALIGN_CODE): New.
* config/tc-ia64.c (ia64_md_do_align): Don't do code alignment.
(ia64_handle_align): New.
* config/tc-ia64.h (HANDLE_ALIGN): New.
(MAX_MEM_FOR_RS_ALIGN_CODE): New.
* config/tc-m32r.c (m32r_do_align): Remove.
(m32r_handle_align): New.
(fill_insn): Use frag_align_code.
* config/tc-m32r.h (md_do_align): Remove.
(HANDLE_ALIGN, MAX_MEM_FOR_RS_ALIGN_CODE): New.
* config/tc-m88k.c, config/tc-m88k.h: Similarly.
* config/tc-mips.c, config/tc-mips.h: Similarly.
* config/tc-sh.c (sh_cons_align): Use rs_align_test.
(sh_handle_align): Likewise. Handle rs_align_code.
(sh_do_align): Remove.
* config/tc-sh.h (md_do_align): Remove.
(MAX_MEM_FOR_RS_ALIGN_CODE): New.
* config/tc-sparc.c (sparc_cons_align): Use rs_align_test.
(sparc_handle_align): Likewise. Handle rs_align_code.
* config/tc-sparc.h (md_do_align): Remove.
(MAX_MEM_FOR_RS_ALIGN_CODE): New.
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* config/tc-m32r.c: Fix formatting.
* config/tc-m32r.h: Likewise.
* config/tc-m68851.h: Likewise.
* config/tc-m68hc11.c: Likewise.
* config/tc-m68hc11.h: Likewise.
* config/tc-m88k.c: Likewise.
* config/tc-mips.c: Likewise.
* config/tc-mips.h: Likewise.
* config/tc-mn10200.h: Likewise.
* config/tc-mn10300.h: Likewise.
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