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path: root/gas/config/tc-i386.h
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2001-01-03 * tc-i386.h (CpuK6, CpuAthlon, CpuSledgehammer, CpuMMX, Cpu3dnow,Jan Hubicka1-8/+10
CpuUnknown): Renumber (CpuP4, CpuSSE2): New. (CpuUnknownFlags): Add CpuP4 and CpuSSE2 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions introduced by Pentium4
2000-12-28 * as.h (rs_align_test): New.Richard Henderson1-4/+3
* frags.c (NOP_OPCODE): Move default from read.c. (MAX_MEM_FOR_RS_ALIGN_CODE): New default. (frag_align_code): New. * frags.h (frag_align_code): Declare. * read.c (NOP_OPCODE): Remove. (do_align): Use frag_align_code. * write.c (NOP_OPCODE): Remove. (get_recorded_alignment): New. (cvt_frag_to_fill): Handle rs_align_test. (relax_segment): Likewise. (subsegs_finish): Align last subseg in section to the section alignment. Use frag_align_code. * write.h (get_recorded_alignment): Declare. * config/obj-coff.c (size_section): Handle rs_align_test. (fill_section, fixup_mdeps): Likewise. (write_object_file): Use frag_align_code. * config/tc-alpha.c (alpha_align): Use frag_align_code. (alpha_handle_align): New. * config/tc-alpha.h (HANDLE_ALIGN): New. (MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-i386.h (md_do_align): Use frag_align_code. (MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-ia64.c (ia64_md_do_align): Don't do code alignment. (ia64_handle_align): New. * config/tc-ia64.h (HANDLE_ALIGN): New. (MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-m32r.c (m32r_do_align): Remove. (m32r_handle_align): New. (fill_insn): Use frag_align_code. * config/tc-m32r.h (md_do_align): Remove. (HANDLE_ALIGN, MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-m88k.c, config/tc-m88k.h: Similarly. * config/tc-mips.c, config/tc-mips.h: Similarly. * config/tc-sh.c (sh_cons_align): Use rs_align_test. (sh_handle_align): Likewise. Handle rs_align_code. (sh_do_align): Remove. * config/tc-sh.h (md_do_align): Remove. (MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-sparc.c (sparc_cons_align): Use rs_align_test. (sparc_handle_align): Likewise. Handle rs_align_code. * config/tc-sparc.h (md_do_align): Remove. (MAX_MEM_FOR_RS_ALIGN_CODE): New.
2000-12-20 * tc-i386.h (i386_target_format): Define even for ELFs.Jan Hubicka1-49/+86
(QWORD_MNEM_SUFFIX): New macro. (CpuK6,CpuAthlon,CpuSledgehammer, Cpu64, CpuNo64, CpuUnknownFlags): New macros (CpuMMX,CpuSSE,Cpu3dnow, CpuUnknown): Renumber. (IgnoreSize, DefaultSize, No_?Suf, FWait, IsString, regKludge, IsPrefix, ImmExt): Renumber. (Size64, No_qSuf, NoRex64, Rex64): New macros. (Reg64, Imm32S, Imm64, Disp32S, Disp64): New macros. (Imm8, Imm8S, Imm16, Imm32, Imm1, BaseIndex, Disp8, Disp16, Disp32, InOutPortReg,ShiftCount, Control, Debug, Test, FloatReg, FloatAcc, SReg2, SReg3, Acc, JumpAbsolute, RegMMX, RegXMM, EsSeg, InvMem): Renumber. (Reg, WordReg): Add Reg64. (Imm): Add Imm32S and Imm64. (EncImm): New. (Disp): Add Disp64 and Disp32S. (AnyMem): Add Disp32S. (RegRex, RegRex64): New macros. (rex_byte): New type. * tc-i386.c (set_16bit_code_flag): Kill. (fits_in_unsigned_long, fits_in_signed_long): New functions. (reloc): New parameter "signed"; support x86_64. (set_code_flag): New. (DEFAULT_ARCH): New macro; default to "i386". (default_arch): New static variable. (struct _i386_insn): New fields Operand_PCrel; rex. (flag_16bit_code): Kill; All tests replaced to "flag_code == CODE_64BIT"; (flag_code): New enum and static variable. (use_rela_relocations): New static variable. (flag_code_names): New static variable. (cpu_arch_flags): Default to CpuUnknownFlags|CpuNo64. (cpu_arch): Add "sledgehammer"; Add CPUAthlon to Athlon and CpuK6 to K6 and Athlon. (i386_align_code): Return plain "nop" for x86_64. (mode_from_disp_size): Support Disp32S. (smallest_imm_type): Support Imm32S and Imm64. (offset_in_range): Support size of 8. (set_cpu_arch): Do not clobber to Cpu64/CpuNo64. (md_pseudo_table): Add "code64"; use set_code_flat. (md_begin): Emit sane error message on hash failure. (tc_i386_fix_adjustable): Support x86_64 relocations. (md_assemble): Support QWORD_MNEM_SUFFIX, REX registers, instructions supported on particular arch just partially, output of 64bit immediates, handling of Imm32S and Disp32S type. (i386_immedaite): Support x86_64 relocations; support 64bit constants. (i386_displacement): Likewise. (i386_index_check): Cleanup; support 64bit addresses. (md_apply_fix3): Support x86_64 relocation and rela. (md_longopts): Add "32" and "64". (md_parse_option): Add OPTION_32 and OPTION_64. (i386_target_format): Call even for ELFs; choose between elf64-x86-64 and elf32-i386. (i386_validate_fix): Refuse GOTOFF in 64bit mode. (tc_gen_reloc): Support rela relocations and x86_64. (intel_e09_1): Support QWORD. * i386.h (i386_optab): Replace "Imm" with "EncImm". (i386_regtab): Add flags field.
2000-12-11 * tc-i386.c (md_assemble): Refuse 's' and 'l' suffixes in the intelJan Hubicka1-10/+7
mode; convert 'd' suffix to 's' or 'l'; remove all DWORD_MNEM_SUFFIX references. (intel_e09_1): Convert QWORD to 'l' suffix for FP operations; refuse otherwise. * tc-i386.h (DWORD_MNEM_SUFFIX): Kill. (No_dSuf): Kill. * i386.h (*_Suf): Remove No_dSuf. (d_suf, wld_Suf,sld_Suf, sldx_Suf, bwld_Suf, d_FP, sld_FP, sldx_FP) Remove. (i386_optab): Remove 'd' in the suffixes.
2000-10-05Correct handling of non-global syms in linkonce sections.Alan Modra1-2/+9
Tidy a few comments.
2000-09-162000-09-15 Kazu Hirata <kazu@hxi.com> Kazu Hirata1-14/+10
* config/tc-h8300.h: Fix formatting. * config/tc-h8500.c: Likewise. * config/tc-h8500.h: Likewise. * config/tc-hppa.h: Likewise. * config/tc-i370.h: Likewise. * config/tc-i386.h: Likewise. * config/tc-i860.c: Likewise. * config/tc-i860.h: Likewise. * config/tc-i960.h: Likewise. * config/tc-ia64.c: Likewise. * config/tc-ia64.h: Likewise.
2000-08-23* config/tc-i386.h <OBJ_MAYBE_ELF, OBJ_MAYBE_COFF>Alexandre Oliva1-1/+1
(TC_FIX_ADJUSTABLE): Define.
2000-08-23* config/tc-i386.h (TC_FIX_ADJUSTABLE): Do *NOT* define if targetAlexandre Oliva1-1/+1
environment is pe.
2000-08-22* write.c (TC_FIX_ADJUSTABLE): Define to 1, if not defined.Alexandre Oliva1-4/+6
(fixup_segment) Use it instead of TC_DONT_FIX_NON_ADJUSTABLE. * config/tc-i386.h (TC_DONT_FIX_NON_ADJUSTABLE): Remove. <OBJ_ELF, OBJ_COFF, TE_PE> (TC_FIX_ADJUSTABLE): Define. * config/tc-arm.h (TC_DONT_FIX_NON_ADJUSTABLE): Remove. <OBJ_ELF> (TC_FIX_ADJUSTABLE): Define. * config/tc-i960.h, config/tc-m68k.h, config/tc-v850.h: Likewise.
2000-08-18* write.c (fixup_segment) [TC_DONT_FIX_NON_ADJUSTABLE]: UseAlexandre Oliva1-0/+4
obj_fix_adjustable() and tc_fix_adjustable() to tell whether to add a symbol's address. Removed all target-specific #ifdefs that used to accomplished the same. * config/tc-v850.h (TC_DONT_FIX_NON_ADJUSTABLE): Define. * config/tc-m68k.h (TC_DONT_FIX_NON_ADJUSTABLE): Define. * config/tc-arm.h (TC_DONT_FIX_NON_ADJUSTABLE): Define. * config/tc-i960.h (TC_DONT_FIX_NON_ADJUSTABLE): Define. * config/tc-i386.h (TC_DONT_FIX_NON_ADJUSTABLE): Define.
2000-05-13`.arch cpu_type' pseudo for x86.Alan Modra1-94/+108
2000-05-03go32 bss alignment.Alan Modra1-0/+1
2000-02-24config/tc-i386.c (struct _i386_insn): Combine disps, imms, regs intoAlan Modra1-5/+0
a union. Use throughout file. Delete TC_RELOC macro.
2000-01-26This set of patches add support for aout emulation on the x86Alan Modra1-15/+16
assembler. ie. You will be able to do "as --em=i386aout" on an x86 linux-elf assembler to generate aout format object files, rather than using a separate assembler. The aout emulation is enabled by giving "--enable-targets=i386-linuxaout" to configure. Oh yeah, there's a couple of fixes too. Error messages shouldn't be passed to printf in the format arg just in case someone puts a `%' in the message.
2000-01-15Cosmetic changes to tc-i386.[ch] + extend x86 gas testsuite jmp andAlan Modra1-2/+1
call tests + tweak intel mode far call and jmp.
1999-09-121999-09-11 Donn Terry <donn@interix.com>Ian Lance Taylor1-3/+0
* expr.c (expr): Change first parameter to int. * config/obj-coff.c: Add declarations for static functions. (coff_frob_symbol): Use SYM_AUXENT. * config/tc-i386.h (flag_16bit_code): Don't declare.
1999-08-09 * config/tc-i386.h (SUB_SEGMENT_ALIGN): If TE_GO32, return 4 forIan Lance Taylor1-0/+14
certain sections, to match BFD changes.
1999-08-04Support for gcc to generate 16-bit i386 code. (.code16gcc)Alan Modra1-11/+12
1999-06-12 * subsegs.c (subseg_text_p): New function.Ian Lance Taylor1-10/+3
* as.h (subseg_text_p): Declare. * read.c (do_align): Use subseg_text_p to set the default fill. * write.c (subsegs_finish): Likewise. * config/obj-coff.c (write_object_file): Likewise. * config/tc-i386.h (md_maybe_text): Don't define. (md_do_align): Use subseg_text_p to set the default fill. * config/tc-m32r.c (m32r_do_align): Likewise. * config/tc-sh.c (sh_do_align): Likewise. * config/tc-sparc.h (md_do_align): Likewise.
1999-05-13XAlan Modra1-9/+16
i386 PIII SIMD support, remove ReverseRegRegmem kludge tidy a few things in i386 intel mode disassembly
1999-05-0319990502 sourceware importbinu_ss_19990502Richard Henderson1-0/+471
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