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2023-12-28x86-64: Add R_X86_64_CODE_4_GOTPCRELXH.J. Lu1-2/+4
For mov name@GOTPCREL(%rip), %reg test %reg, name@GOTPCREL(%rip) binop name@GOTPCREL(%rip), %reg where binop is one of adc, add, add, cmp, or, sbb, sub, xor instructions, add # define R_X86_64_CODE_4_GOTPCRELX 43 if the instruction starts at 4 bytes before the relocation offset. It similar to R_X86_64_GOTPCRELX. Linker can treat R_X86_64_CODE_4_GOTPCRELX as R_X86_64_GOTPCREL or convert the above instructions to lea name(%rip), %reg mov $name, %reg test $name, %reg binop $name, %reg if the instruction is encoded with the REX2 prefix when possible. bfd/ * elf64-x86-64.c (x86_64_elf_howto_table): Add R_X86_64_CODE_4_GOTPCRELX. (R_X86_64_standard): Updated. (x86_64_reloc_map): Add BFD_RELOC_X86_64_CODE_4_GOTPCRELX. (elf_x86_64_convert_load_reloc): Handle R_X86_64_CODE_4_GOTPCRELX. (elf_x86_64_scan_relocs): Likewise. (elf_x86_64_relocate_section): Likewise. * reloc.c (bfd_reloc_code_real): Add BFD_RELOC_X86_64_CODE_4_GOTPCRELX. * bfd-in2.h: Regenerated. * libbfd.h: Likewise. gas/ * write.h (fix): Add fx_tcbit3. Change fx_unused to 1 bit. * config/tc-i386.c (tc_i386_fix_adjustable): Handle BFD_RELOC_X86_64_CODE_4_GOTPCRELX. (tc_gen_reloc): Likewise. (output_disp): Set fixP->fx_tcbit3 for REX2 prefix. (i386_validate_fix): Generate BFD_RELOC_X86_64_CODE_4_GOTPCRELX if fixp->fx_tcbit3 is set. * config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Add BFD_RELOC_X86_64_CODE_4_GOTPCRELX. (TC_FORCE_RELOCATION_ABS): Likewise. * testsuite/gas/i386/x86-64-gotpcrel.s: Add tests for R_X86_64_CODE_4_GOTPCRELX. * testsuite/gas/i386/x86-64-localpic.s: Likewise. * testsuite/gas/i386/x86-64-gotpcrel.d: Updated. * testsuite/gas/i386/x86-64-localpic.d: Likewise. * testsuite/gas/i386/ilp32/x86-64-localpic.d: Likewise. include/ * elf/x86-64.h (elf_x86_64_reloc_type): Add R_X86_64_CODE_4_GOTPCRELX. ld/ * testsuite/ld-x86-64/apx-load1.s: New file. * testsuite/ld-x86-64/apx-load1a.d: Likewise. * testsuite/ld-x86-64/apx-load1b.d: Likewise. * testsuite/ld-x86-64/apx-load1c.d: Likewise. * testsuite/ld-x86-64/apx-load1d.d: Likewise. * testsuite/ld-x86-64/x86-64.exp: Run apx-load1a, apx-load1b, apx-load1c and apx-load1d.
2023-12-15x86: last-insn recording should be per-subsectionJan Beulich1-0/+5
Otherwise intermediate subsection switches result in inconsistent behavior. Leverage ELF's section change hook to switch state as necessary, limiting overhead to the bare minimum when subsections aren't used.
2023-12-01x86: adjust NOP generation after potential non-insnJan Beulich1-1/+5
Just like avoiding to do certain transformations potentially affected by stand-alone prefixes or direct data emission, also avoid emitting optimized NOPs right afterwards; insert a plain old NOP first in such cases.
2023-12-01x86: last-insn recording should be per-sectionJan Beulich1-0/+17
Otherwise intermediate section switches result in inconsistent behavior. Note, however, that intermediate sub-section switches will continue to result in inconsistent or even inappropriate behavior. While there also add recording of state to s_insn().
2023-11-17x86: use IS_ELFJan Beulich1-4/+2
... instead of (inefficiently) open-coding it.
2023-11-17x86: conditionally hide object-format-specific functionsJan Beulich1-0/+8
ELF-only functions don't need to be built when dealing with a non-ELF target. md_section_align() also doesn't need to be a function when dealing with non-AOUT targets. Similarly tc_fix_adjustable() can be a simple macro when building non-ELF targets. Furthermore x86_elf_abi is already used in ELF-only code sections, with one exception. By adjusting that, the otherwise bogusly named variable can also be confined to just ELF builds.
2023-10-23x86: don't record full i386_cpu_flags in struct i386_tc_frag_dataJan Beulich1-2/+2
We only use a single bit of this ever growing structure.
2023-10-23x86: i686 != PentiumProJan Beulich1-0/+1
The two are distinct in opcodes/, distinguished precisely by CpuNOP that's relevant in i386_generate_nops(), yet the function has the PPro case label in the other group. Simply removing it revealed that cpu_arch[] had a wrong entry for i686. While there also add PROCESSOR_IAMCU to the respective comment.
2023-10-23x86: respect ".arch nonop" when selecting which NOPs to emitJan Beulich1-0/+3
Making GENERIC64 a special case was never correct; prior to the generalization of ".arch .no*" to cover all ISA extensions other processor families supporting long NOPs should have been covered as well. When introducing ".arch .nonops" (among others) it wasn't apparent that a hidden implication of .cpunop not being possible to separately turn off existed here. Seeing that the two large case label blocks in the 2nd switch() already had identical behavior, simply collapse all of the (useful) case labels into a single "default" one.
2023-10-23x86: record flag_code in tc_frag_dataJan Beulich1-1/+11
The recorded value, and not the global variable, will want using in TC_FRAG_INIT(). The so far file scope variable therefore needs to become external, to be accessible there.
2023-08-11gas: purge md_elf_section_word()Jan Beulich1-2/+0
It's not documented anyway, and having it makes no sense anymore with obj_elf_section_word() now being TC_SPARC-only. In any event the x86 backing function was dead code.
2023-05-19x86: further adjust extend-to-32bit-address conditionsJan Beulich1-0/+6
While a442cac5084e ("ix86: wrap constants") helped address a number of inconsistencies between BFD64 and !BFD64 builds, it has also resulted in certain bogus uses of constants to no longer be warned about. Leverage the md_optimize_expr() hook to adjust when to actually truncate expressions to 32 bits - any involvement of binary expressions (which would be evaluated in 32 bits only when !BFD64) signals the need for doing so. Plain constants (or ones merely subject to unary operators) should remain un-truncated - they would be handled as bignums when !BFD64, and hence are okay to permit. To compensate - slightly extend optimize_imm() (to be honest I never understood why the code being added - or something similar - wasn't there in the first place), - adjust expectations of the disp-imm-32 testcase (there are now warnings, as there should be for any code which won't build [warning- free] when !BFD64, and Disp8/Imm8 are no longer used in the warned about cases).
2023-02-02gas: use "stack trace" instead of "unwind" for SFrameIndu Bhagat1-3/+3
SFrame format is meant for generating stack traces only. gas/ * as.c: Replace the use of "unwind" with "stack trace". * config/tc-aarch64.c: Likewise. * config/tc-aarch64.h: Likewise. * config/tc-i386.c: Likewise. * config/tc-i386.h: Likewise. * gen-sframe.c: Likewise. * gen-sframe.h: Likewise. * testsuite/gas/cfi-sframe/cfi-sframe-aarch64-2.s: Likewise. * testsuite/gas/cfi-sframe/cfi-sframe-common-8.s: Likewise. * testsuite/gas/cfi-sframe/common-empty-2.s: Likewise. * testsuite/gas/cfi-sframe/common-empty-3.s: Likewise.
2023-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
The newer update-copyright.py fixes file encoding too, removing cr/lf on binutils/bfdtest2.c and ld/testsuite/ld-cygwin/exe-export.exp, and embedded cr in binutils/testsuite/binutils-all/ar.exp string match.
2022-11-15gas: generate .sframe from CFI directivesIndu Bhagat1-0/+26
Currently supported for x86_64 and aarch64 only. [PS: Currently, the compiler has not been adapted to generate ".cfi_sections" with ".sframe" in it. The newly added command line option of --gsframe provides an easy way to try out .sframe support in the toolchain.] gas interprets the CFI directives to generate DWARF-based .eh_frame info. These internal DWARF structures are now consumed by gen-sframe.[ch] sub-system to, in turn, create the SFrame unwind information. These internal DWARF structures are read-only for the purpose of SFrame unwind info generation. SFrame unwind info generation does not impact .eh_frame unwind info generation. Both .eh_frame and .sframe can co-exist in an ELF file, if so desired by the user. Recall that SFrame unwind information only contains the minimal necessary information to generate backtraces and does not provide information to recover all callee-saved registers. The reason being that callee-saved registers other than FP are not needed for stack unwinding, and hence are not included in the .sframe section. Consequently, gen-sframe.[ch] only needs to interpret a subset of DWARF opcodes in gas. More details follow. [Set 1, Interpreted] The following opcodes are interpreted: - DW_CFA_advance_loc - DW_CFA_def_cfa - DW_CFA_def_cfa_register - DW_CFA_def_cfa_offset - DW_CFA_offset - DW_CFA_remember_state - DW_CFA_restore_state - DW_CFA_restore [Set 2, Bypassed] The following opcodes are acknowledged but are not necessary for generating SFrame unwind info: - DW_CFA_undefined - DW_CFA_same_value Anything else apart from the two above-mentioned sets is skipped altogether. This means that any function containing a CFI directive not in Set 1 or Set 2 above, will not have any SFrame unwind information generated for them. Holes in instructions covered by FREs of a single FDE are not representable in the SFrame unwind format. As few examples, following opcodes are not processed for .sframe generation, and are skipped: - .cfi_personality* - .cfi_*lsda - .cfi_escape - .cfi_negate_ra_state - ... Not processing .cfi_escape, .cfi_negate_ra_state will cause SFrame unwind information to be absent for SFrame FDEs that contain these CFI directives, hence affecting the asynchronicity. x86-64 and aarch64 backends need to have a few new definitions and functions for .sframe generation. These provide gas with architecture specific information like the SP/FP/RA register numbers and an SFrame-specific ABI marker. Lastly, the patch also implements an optimization for size, where specific fragments containing SFrame FRE start address and SFrame FDE function are fixed up. This is similar to other similar optimizations in gas, where fragments are sized and fixed up when the associated symbols can be resolved. This optimization is controlled by a #define SFRAME_FRE_TYPE_SELECTION_OPT and should be easy to turn off if needed. The optimization is on by default for both x86_64 and aarch64. ChangeLog: * gas/Makefile.am: Include gen-sframe.c and sframe-opt.c. * gas/Makefile.in: Regenerated. * gas/as.h (enum _relax_state): Add new state rs_sframe. (sframe_estimate_size_before_relax): New function. (sframe_relax_frag): Likewise. (sframe_convert_frag): Likewise. * gas/config/tc-aarch64.c (aarch64_support_sframe_p): New definition. (aarch64_sframe_ra_tracking_p): Likewise. (aarch64_sframe_cfa_ra_offset): Likewise. (aarch64_sframe_get_abi_arch): Likewise. (md_begin): Set values of sp/fp/ra registers. * gas/config/tc-aarch64.h (aarch64_support_sframe_p): New declaration. (support_sframe_p): Likewise. (SFRAME_CFA_SP_REG): Likewise. (SFRAME_CFA_FP_REG): Likewise. (SFRAME_CFA_RA_REG): Likewise. (aarch64_sframe_ra_tracking_p): Likewise. (sframe_ra_tracking_p): Likewise. (aarch64_sframe_cfa_ra_offset): Likewise. (sframe_cfa_ra_offset): Likewise. (aarch64_sframe_get_abi_arch): Likewise. (sframe_get_abi_arch): Likewise. * gas/config/tc-i386.c (x86_support_sframe_p): New definition. (x86_sframe_ra_tracking_p): Likewise. (x86_sframe_cfa_ra_offset): Likewise. (x86_sframe_get_abi_arch): Likewise. * gas/config/tc-i386.h (x86_support_sframe_p): New declaration. (support_sframe_p): Likewise. (SFRAME_CFA_SP_REG): Likewise. (SFRAME_CFA_FP_REG): Likewise. (x86_sframe_ra_tracking_p): Likewise. (sframe_ra_tracking_p): Likewise. (x86_sframe_cfa_ra_offset): Likewise. (sframe_cfa_ra_offset): Likewise. (x86_sframe_get_abi_arch): Likewise. (sframe_get_abi_arch): Likewise. * gas/config/tc-xtensa.c (unrelaxed_frag_max_size): Add case for rs_sframe. * gas/doc/as.texi: Add .sframe to the documentation for .cfi_sections. * gas/dw2gencfi.c (cfi_finish): Create a .sframe section. * gas/dw2gencfi.h (CFI_EMIT_sframe): New definition. * gas/write.c (cvt_frag_to_fill): Handle rs_sframe. (relax_segment): Likewise. * gas/gen-sframe.c: New file. * gas/gen-sframe.h: New file. * gas/sframe-opt.c: New file.
2022-07-09i386 gas: don't leak op_hash or reg_hash memoryAlan Modra1-0/+3
This tidies memory used by the two x86 gas string hash tables before exiting. I'm using a two-pronged approach, firstly the obvious call to htab_delete plus telling the libiberty/hashtab.c infrastructure to free tuples generated by str_hash_insert, and secondly putting the x86 core_optab memory on the notes obstack. It would be possible to free core_optab memory by using a custom hash table del_f on x86, as I do for arc, but a later patch will move all the string hash memory to the notes obstack. * config/tc-i386.c (md_begin): Use notes_alloc for core_optab. (386_md_end): New function. * config/tc-i386.h (386_md_end): Declare. (md_end): Define. * hash.h (str_htab_create): Pass free as del_f.
2022-07-05x86: introduce fake processor type to mark sub-arch entries in cpu_arch[]Jan Beulich1-3/+5
This is in preparation of dropping the leading . from the strings. While there also move PROCESSOR_GENERIC{32,64} from the middle of AMD entries to near the top.
2022-06-03Re: ubsan: undefined shift in frag_align_codeAlan Modra1-1/+2
This one needs the same fix too. * config/tc-i386.h (MAX_MEM_FOR_RS_ALIGN_CODE): Avoid signed integer overflow.
2022-03-17x86: drop L1OM/K1OM support from gasJan Beulich1-10/+0
This was only rudimentary support anyway; none of the sub-architecture specific insns were ever supported.
2022-01-06x86-64: restrict PC32 -> PLT32 conversionJan Beulich1-0/+1
Neither non-64-bit code nor uses with a non-zero offset from a symbol should be converted to PLT32, as an eventual PLT entry would not express what was requested.
2022-01-02Update year range in copyright notice of binutils filesAlan Modra1-1/+1
The result of running etc/update-copyright.py --this-year, fixing all the files whose mode is changed by the script, plus a build with --enable-maintainer-mode --enable-cgen-maint=yes, then checking out */po/*.pot which we don't update frequently. The copy of cgen was with commit d1dd5fcc38ead reverted as that commit breaks building of bfp opcodes files.
2021-08-16x86: Don't pad .tfloat directive outputH.J. Lu1-2/+1
.tfloat output should always be 10 bytes without padding, independent of psABIs. In glibc, x86 assembly codes expect 10-byte .tfloat output. This also reduces .ds.x output and .tfloat output with hex input from 12 bytes to 10 bytes to match .tfloat output. PR gas/28230 * NEWS: Mention changes of .ds.x output and .tfloat output with hex input. * config/tc-i386.c (x86_tfloat_pad): Removed. * config/tc-i386.h (X_PRECISION_PAD): Changed to 0. (x86_tfloat_pad): Removed. * testsuite/gas/i386/fp.s: If NO_TFLOAT_PADDING isn't defined, add explicit paddings after .tfloat, .ds.x, .dc.x and .dcb.x directives. * testsuite/gas/i386/i386.exp (ASFLAGS): Append "--defsym NO_TFLOAT_PADDING=1" when running the fp test.
2021-08-11x86/ELF: fix .ds.x outputJan Beulich1-0/+1
The ELF psABI-s are quite clear here: On 32-bit the underlying data type is 12 bytes long (with 2 bytes of trailing padding), while on 64-bit it is 16 bytes long (with 6 bytes of padding). Make s_space() capable of handling 'x' (and 'p') type floating point being other than 12 bytes wide (also adjusting documentation). This requires duplicating the definition of X_PRECISION in the target speciifc header; the compiler would complain if this was out of sync with config/atof-ieee.c. Note that for now padding space doesn't get separated from actual storage, which means that things will work correctly only for little- endian cases, and which also means that by specifying large enough numbers padding space can be set to non-zero. Since the logic is needed for a single little-endian architecture only for now, I'm hoping that this might be acceptable for the time being; otherwise the change will become more intrusive. Note also that this brings the emitted data size of .ds.x vs .tfloat in line for non-ELF targets as well; the issue will be even more obvious when further taking into account a subsequent patch fixing .dc.x/.dcb.x (where output sizes currently differ depending on input format). Extend existing x86 testcases.
2021-08-11x86/ELF: fix .tfloat outputJan Beulich1-0/+3
The ELF psABI-s are quite clear here: On 32-bit the data type is 12 bytes long (with 2 bytes of trailing padding), while on 64-bit it is 16 bytes long (with 6 bytes of padding). Make ieee_md_atof() capable of handling such padding, and specify the needed padding for x86 (leaving non-ELF targets alone for now). Split the existing x86 testcase.
2021-06-11x86: Always define TC_PARSE_CONS_EXPRESSIONH.J. Lu1-3/+0
Always define TC_PARSE_CONS_EXPRESSION to properly wrap constants for all x86 targets. * config/tc-i386.c (x86_cons): Handle GOT/PLT relocations only if needed. * config/tc-i386.h (TC_PARSE_CONS_EXPRESSION): Always define.
2021-05-03x86: allow @secrel32 also in data definitionsJan Beulich1-1/+2
Now that lex_got() is uniform for all targets using it, permit COFF targets to also use @secrel32 with, in particular, .long. This is more natural than the custom .secrel32 directive, and also allows more flexibility (the "+six" form of the two added test lines doesn't work with a .secrel32 equivalent, in that it silently produces an unintended relocation type). As an extra benefit this also makes sure that data definitions in Intel syntax mode would get treated like they do for e.g. ELF targets.
2021-04-29x86: relax when/how @size can be usedJan Beulich1-2/+4
Allow a few more expression forms when the entire expression can be resolved at assembly time. For this, i386_validate_fix() needs to arrange for all processing of the relocation to be deferred to tc_gen_reloc().
2021-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2020-06-30Remove x86 NaCl target supportH.J. Lu1-4/+0
NaCl has been deprecated: https://developer.chrome.com/native-client/migration and NaCl will completely disappear in 2021: https://lists.llvm.org/pipermail/llvm-dev/2020-April/141107.html Remove x86 NaCl target support from bfd, binutils, gas and ld. bfd/ * archures.c (bfd_mach_i386_nacl): Removed. (bfd_mach_i386_i386_nacl): Likewise. (bfd_mach_x86_64_nacl): Likewise. (bfd_mach_x64_32_nacl): Likewise. * config.bfd: Remove *-*-nacl* targets. * configure.ac: Remove x86 NaCl target vectors. * cpu-i386.c (bfd_arch_i386_onebyte_nop_fill): Removed. (bfd_x64_32_nacl_arch): Likewise. (bfd_x86_64_nacl_arch): Likewise. (bfd_i386_nacl_arch): Likewise. (bfd_x64_32_arch_intel_syntax): Updated. * elf32-i386.c: Don't include "elf-nacl.h". (elf_i386_nacl_plt): Removed. (elf_i386_nacl_plt0_entry): Likewise. (elf_i386_nacl_plt_entry): Likewise. (elf_i386_nacl_pic_plt0_entry): Likewise. (elf_i386_nacl_pic_plt_entry): Likewise. (elf_i386_nacl_eh_frame_plt): Likewise. (elf_i386_nacl_plt): Likewise. (elf32_i386_nacl_elf_object_p): Likewise. (elf_i386_get_synthetic_symtab): Updated. (elf_i386_link_setup_gnu_properties): Likewise. * elf64-x86-64.c: Don't include "elf-nacl.h". (elf_x86_64_nacl_plt): Removed. (elf64_x86_64_nacl_elf_object_p): Likewise. (elf_x86_64_nacl_plt0_entry): Likewise. (elf_x86_64_nacl_plt_entry): Likewise. (elf_x86_64_nacl_eh_frame_plt): Likewise. (elf_x86_64_nacl_plt): Likewise. (elf32_x86_64_nacl_elf_object_p): Likewise. (elf_x86_64_get_synthetic_symtab): Updated. (elf_x86_64_link_setup_gnu_properties): Likewise. * elfxx-x86.c (_bfd_x86_elf_link_setup_gnu_properties): Likewise. * targets.c: Remove x86 NaCl target vectors. * bfd-in2.h: Regenerated. * configure: Likewise. binutils/ * NEWS: Mention x86 NaCl target support removal. * dwarf.c (init_dwarf_regnames_by_bfd_arch_and_mach): Remove x86 NaCl target support. * testsuite/binutils-all/elfedit-1.d: Likewise. * testsuite/binutils-all/i386/i386.exp: Likewise. * testsuite/binutils-all/x86-64/objects.exp: Likewise. * testsuite/binutils-all/x86-64/pr23494a-x32.d: Likewise. * testsuite/binutils-all/x86-64/pr23494a.d: Likewise. * testsuite/binutils-all/x86-64/pr23494b-x32.d: Likewise. * testsuite/binutils-all/x86-64/pr23494b.d: Likewise. * testsuite/binutils-all/x86-64/pr23494c-x32.d: Likewise. * testsuite/binutils-all/x86-64/pr23494c.d: Likewise. * testsuite/binutils-all/x86-64/pr23494d-x32.d: Likewise. * testsuite/binutils-all/x86-64/pr23494d.d: Likewise. * testsuite/binutils-all/x86-64/pr23494e-x32.d: Likewise. * testsuite/binutils-all/x86-64/pr23494e.d: Likewise. * testsuite/binutils-all/x86-64/x86-64.exp: Likewise. gas/ * NEWS: Mention x86 NaCl target support removal. * config/tc-i386.c: Remove x86 NaCl target support. * config/tc-i386.h: Likewise. * configure.tgt: Likewise. * testsuite/gas/i386/i386.exp: Likewise. * testsuite/gas/i386/iamcu-1.d: Likewise. * testsuite/gas/i386/iamcu-2.d: Likewise. * testsuite/gas/i386/iamcu-3.d: Likewise. * testsuite/gas/i386/iamcu-4.d: Likewise. * testsuite/gas/i386/iamcu-5.d: Likewise. * testsuite/gas/i386/k1om.d: Likewise. * testsuite/gas/i386/l1om.d: Likewise. ld/ * Makefile.am (ALL_EMULATION_SOURCES): Remove eelf_i386_nacl.c, eelf32_x86_64_nacl.c, eelf_x86_64_nacl.c. Remove x86 NaCl dep files. * NEWS: Mention x86 NaCl target support removal. * configure.tgt: Remove x86 NaCl target support. * testsuite/ld-elf/binutils.exp: Likewise. * testsuite/ld-elf/elf.exp: Likewise. * testsuite/ld-elfvers/vers.exp: Likewise. * testsuite/ld-i386/align-branch-1.d: Likewise. * testsuite/ld-i386/export-class.exp: Likewise. * testsuite/ld-i386/i386.exp: Likewise. * testsuite/ld-i386/load1.d: Likewise. * testsuite/ld-i386/pie1.d: Likewise. * testsuite/ld-i386/pr12570a.d: Likewise. * testsuite/ld-i386/pr12570b.d: Likewise. * testsuite/ld-i386/pr19636-1d.d: Likewise. * testsuite/ld-i386/pr19636-1l.d: Likewise. * testsuite/ld-i386/pr19636-2c.d: Likewise. * testsuite/ld-i386/pr19636-2d.d: Likewise. * testsuite/ld-i386/pr19636-2e.d: Likewise. * testsuite/ld-i386/pr20244-1a.d: Likewise. * testsuite/ld-i386/pr20244-1b.d: Likewise. * testsuite/ld-i386/pr20244-2a.d: Likewise. * testsuite/ld-i386/pr20244-2b.d: Likewise. * testsuite/ld-i386/pr20244-2c.d: Likewise. * testsuite/ld-i386/pr20244-4a.d: Likewise. * testsuite/ld-i386/pr20244-4b.d: Likewise. * testsuite/ld-i386/pr21884.d: Likewise. * testsuite/ld-ifunc/binutils.exp: Likewise. * testsuite/ld-ifunc/ifunc-10-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-10-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-11-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-11-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-12-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-12-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-13-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-13-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-14a-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-14a-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-14b-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-14b-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-14c-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-14c-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-14d-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-14d-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-14e-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-14e-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-14f-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-14f-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-15-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-15-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-16-i386-now.d: Likewise. * testsuite/ld-ifunc/ifunc-16-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-16-x86-64-now.d: Likewise. * testsuite/ld-ifunc/ifunc-16-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-17a-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-17a-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-17b-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-17b-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-18a-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-18a-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-18b-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-18b-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-19a-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-19a-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-19b-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-19b-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-2-i386-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-i386-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-x86-64-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-2-x86-64-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-20-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-20-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-21-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-21-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-22-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-22-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-5a-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-5a-local-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-5a-local-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-5a-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-5b-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-5b-local-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-5b-local-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-5b-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-5r-local-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-5r-local-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-6a-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-6a-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-6b-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-6b-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-7a-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-7a-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-7b-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-7b-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-8-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-8-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-9-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-9-x86-64.d: Likewise. * testsuite/ld-ifunc/pr17154-i386-now.d: Likewise. * testsuite/ld-ifunc/pr17154-i386.d: Likewise. * testsuite/ld-ifunc/pr17154-x86-64-now.d: Likewise. * testsuite/ld-ifunc/pr17154-x86-64.d: Likewise. * testsuite/ld-plugin/lto.exp: Likewise. * testsuite/ld-x86-64/align-branch-1.d: Likewise. * testsuite/ld-x86-64/dwarfreloc.exp: Likewise. * testsuite/ld-x86-64/line.exp: Likewise. * testsuite/ld-x86-64/load1a.d: Likewise. * testsuite/ld-x86-64/load1b.d: Likewise. * testsuite/ld-x86-64/load1c.d: Likewise. * testsuite/ld-x86-64/load1d.d: Likewise. * testsuite/ld-x86-64/pie3.d: Likewise. * testsuite/ld-x86-64/pr18160.d: Likewise. * testsuite/ld-x86-64/pr19013-x32.d: Likewise. * testsuite/ld-x86-64/pr19013.d: Likewise. * testsuite/ld-x86-64/pr19636-2d.d: Likewise. * testsuite/ld-x86-64/pr19636-2l.d: Likewise. * testsuite/ld-x86-64/pr20253-1b.d: Likewise. * testsuite/ld-x86-64/pr20253-1d.d: Likewise. * testsuite/ld-x86-64/pr20253-1f.d: Likewise. * testsuite/ld-x86-64/pr20253-1h.d: Likewise. * testsuite/ld-x86-64/pr20253-1j.d: Likewise. * testsuite/ld-x86-64/pr20253-1l.d: Likewise. * testsuite/ld-x86-64/pr21884.d: Likewise. * testsuite/ld-x86-64/pr22393-3a.rd: Likewise. * testsuite/ld-x86-64/pr22393-3b.rd: Likewise. * testsuite/ld-x86-64/tlsgd10.dd: Likewise. * testsuite/ld-x86-64/tlsgd5.dd: Likewise. * testsuite/ld-x86-64/tlsgd8.dd: Likewise. * testsuite/ld-x86-64/x86-64.exp: Likewise. * emulparams/elf32_x86_64_nacl.sh: Removed. * emulparams/elf_i386_nacl.sh: Likewise. * emulparams/elf_x86_64_nacl.sh: Likewise. * testsuite/ld-i386/emit-relocs-nacl.rd: Likewise. * testsuite/ld-i386/load1-nacl.d: Likewise. * testsuite/ld-i386/pie1-nacl.d: Likewise. * testsuite/ld-i386/plt-nacl.pd: Likewise. * testsuite/ld-i386/plt-pic-nacl.pd: Likewise. * testsuite/ld-i386/pr17709-nacl.rd: Likewise. * testsuite/ld-i386/pr19636-1d-nacl.d: Likewise. * testsuite/ld-i386/pr19636-2c-nacl.d: Likewise. * testsuite/ld-i386/pr19636-2d-nacl.d: Likewise. * testsuite/ld-i386/pr19636-2e-nacl.d: Likewise. * testsuite/ld-i386/pr19827-nacl.rd: Likewise. * testsuite/ld-i386/pr21884-nacl.d: Likewise. * testsuite/ld-i386/pr21884-nacl.t: Likewise. * testsuite/ld-i386/tlsbin-nacl.rd: Likewise. * testsuite/ld-i386/tlsbin2-nacl.rd: Likewise. * testsuite/ld-i386/tlsbindesc-nacl.rd: Likewise. * testsuite/ld-i386/tlsdesc-nacl.rd: Likewise. * testsuite/ld-i386/tlsgdesc-nacl.rd: Likewise. * testsuite/ld-i386/tlsnopic-nacl.rd: Likewise. * testsuite/ld-i386/tlspic-nacl.rd: Likewise. * testsuite/ld-i386/tlspic2-nacl.rd: Likewise. * testsuite/ld-x86-64/ilp32-4-nacl.d: Likewise. * testsuite/ld-x86-64/load1a-nacl.d: Likewise. * testsuite/ld-x86-64/load1b-nacl.d: Likewise. * testsuite/ld-x86-64/load1c-nacl.d: Likewise. * testsuite/ld-x86-64/load1d-nacl.d: Likewise. * testsuite/ld-x86-64/pie3-nacl.d: Likewise. * testsuite/ld-x86-64/plt-nacl.pd: Likewise. * testsuite/ld-x86-64/pr17709-nacl.rd: Likewise. * testsuite/ld-x86-64/pr19013-nacl.d: Likewise. * testsuite/ld-x86-64/pr19636-2d-nacl.d: Likewise. * testsuite/ld-x86-64/pr19827-nacl.rd: Likewise. * testsuite/ld-x86-64/pr21884-nacl.d: Likewise. * testsuite/ld-x86-64/pr21884-nacl.t: Likewise. * testsuite/ld-x86-64/split-by-file-nacl.rd: Likewise. * testsuite/ld-x86-64/tlsbin-nacl.rd: Likewise. * testsuite/ld-x86-64/tlsbin2-nacl.rd: Likewise. * testsuite/ld-x86-64/tlsbindesc-nacl.rd: Likewise. * testsuite/ld-x86-64/tlsdesc-nacl.pd: Likewise. * testsuite/ld-x86-64/tlsdesc-nacl.rd: Likewise. * testsuite/ld-x86-64/tlsgdesc-nacl.rd: Likewise. * testsuite/ld-x86-64/tlspic-nacl.rd: Likewise. * testsuite/ld-x86-64/tlspic2-nacl.rd: Likewise. * Makefile.in: Regenerated. * po/BLD-POTFILES.in: Likewise.
2020-04-01x86: Force relocation against local absolute symbolH.J. Lu1-0/+8
Define TC_FORCE_RELOCATION_ABS to force relocation against local absolute symbol. PR gas/25756 * config/tc-i386.h (TC_FORCE_RELOCATION_ABS): New. * testsuite/gas/i386/localpic.s: Add a test for relocation against local absolute symbol. * testsuite/gas/i386/x86-64-localpic.s: Likewise. * testsuite/gas/i386/localpic.d: Updated. * testsuite/gas/i386/x86-64-localpic.d: Likewise. * testsuite/gas/i386/ilp32/x86-64-localpic.d: Likewise.
2020-03-03x86: Improve -malign-branchHongtao Liu1-0/+2
According to intel SDM manual, not all compare flag-modifying instructions are marcro-fusible with subsequent jcc instructions. For those non-fusible instructions, -malign-branch doesn't need to align them, only jcc itself needs to be aligned. Here are 2 restrictions which separate macro-fusible instruction from not Restriction 1: If TEST/AND/CMP/ADD/SUB/INC/DEC is one of the following format: cmp m, imm add m, imm sub m, imm test m, imm and m, imm inc m dec m it is unfusible with any jcc instruction. Restriction 2: /* Table 3-2. Macro-Fusible Instructions in Haswell Microarchitecture Note it also works for Skylake and Cascadelake. --------------------------------------------------------------------- | JCC | ADD/SUB/CMP | INC/DEC | TEST/AND | | ------ | ----------- | ------- | -------- | | Jo | N | N | Y | | Jno | N | N | Y | | Jc/Jb | Y | N | Y | | Jae/Jnb | Y | N | Y | | Je/Jz | Y | Y | Y | | Jne/Jnz | Y | Y | Y | | Jna/Jbe | Y | N | Y | | Ja/Jnbe | Y | N | Y | | Js | N | N | Y | | Jns | N | N | Y | | Jp/Jpe | N | N | Y | | Jnp/Jpo | N | N | Y | | Jl/Jnge | Y | Y | Y | | Jge/Jnl | Y | Y | Y | | Jle/Jng | Y | Y | Y | | Jg/Jnle | Y | Y | Y | Update maybe_fused_with_jcc_p to check if operands of CMP like instructions can be fused with condition jump. * gas/config/tc-i386.h (i386_tc_frag_data): Add member mf_type. (TC_FRAG_INIT): Init mf_type. * gas/config/tc-i386.c (enum mf_jcc_kind): New enum. (enum mf_cmp_kind): Ditto. (maybe_fused_with_jcc_p): Add argument mf_cmp_p to get mf_type of corresponding instructons, exclude unfusible instructions. (add_fused_jcc_padding_frag_p): Likewise. (add_branch_padding_frag_p): Likewise. (output_insn): Record mf_type for corresponding instructions. (i386_macro_fusible_p): New function. (i386_next_fusible_jcc_frag): Rename from i386_next_jcc_frag, add argument cmp_fragP to return next fusible jcc frag only. (i386_classify_machine_dependant_frag): Seperate macro-fusible instructions from condition jump. * gas/testsuite/gas/i386/align-branch-9.s: New file. * gas/testsuite/gas/i386/align-branch-9.d: Ditto. * gas/testsuite/gas/i386/x86-64-align-branch-9.s: Ditto. * gas/testsuite/gas/i386/x86-64-align-branch-9.d: Ditto. * gas/testsuite/gas/i386/i386.exp: Run new tests.
2020-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2019-12-12i386: Align branches within a fixed boundaryH.J. Lu1-0/+31
Add 3 command-line options to align branches within a fixed boundary with segment prefixes or NOPs: 1. -malign-branch-boundary=NUM aligns branches within NUM byte boundary. 2. -malign-branch=TYPE[+TYPE...] specifies types of branches to align. The supported branches are: a. Conditional jump. b. Fused conditional jump. c. Unconditional jump. d. Call. e. Ret. f. Indirect jump and call. 3. -malign-branch-prefix-size=NUM aligns branches with NUM segment prefixes per instruction. 3 new rs_machine_dependent frag types are added: 1. BRANCH_PADDING. The variable size frag to insert NOP before branch. 2. BRANCH_PREFIX. The variable size frag to insert segment prefixes to an instruction. The choices of prefixes are: a. Use the existing segment prefix if there is one. b. Use CS segment prefix in 64-bit mode. c. In 32-bit mode, use SS segment prefix with ESP/EBP base register and use DS segment prefix without ESP/EBP base register. 3. FUSED_JCC_PADDING. The variable size frag to insert NOP before fused conditional jump. The new rs_machine_dependent frags aren't inserted if the previous item is a prefix or a constant directive, which may be used to hardcode an instruction, since there is no clear instruction boundary. Segment prefixes and NOP padding are disabled before relaxable TLS relocations and tls_get_addr calls to keep TLS instruction sequence unchanged. md_estimate_size_before_relax() and i386_generic_table_relax_frag() are used to handled BRANCH_PADDING, BRANCH_PREFIX and FUSED_JCC_PADDING frags. i386_generic_table_relax_frag() grows or shrinks sizes of segment prefix and NOP to align the next branch frag: 1. First try to add segment prefixes to instructions before a branch. 2. If there is no sufficient room to add segment prefixes, NOP will be inserted before a branch. * config/tc-i386.c (_i386_insn): Add has_gotpc_tls_reloc. (tls_get_addr): New. (last_insn): New. (align_branch_power): New. (align_branch_kind): New. (align_branch_bit): New. (align_branch): New. (MAX_FUSED_JCC_PADDING_SIZE): New. (align_branch_prefix_size): New. (BRANCH_PADDING): New. (BRANCH_PREFIX): New. (FUSED_JCC_PADDING): New. (i386_generate_nops): Support BRANCH_PADDING and FUSED_JCC_PADDING. (md_begin): Abort if align_branch_prefix_size < MAX_FUSED_JCC_PADDING_SIZE. (md_assemble): Set last_insn. (maybe_fused_with_jcc_p): New. (add_fused_jcc_padding_frag_p): New. (add_branch_prefix_frag_p): New. (add_branch_padding_frag_p): New. (output_insn): Generate a BRANCH_PADDING, FUSED_JCC_PADDING or BRANCH_PREFIX frag and terminate each frag to align branches. (output_disp): Set i.has_gotpc_tls_reloc to TRUE for GOTPC and relaxable TLS relocations. (output_imm): Likewise. (i386_next_non_empty_frag): New. (i386_next_jcc_frag): New. (i386_classify_machine_dependent_frag): New. (i386_branch_padding_size): New. (i386_generic_table_relax_frag): New. (md_estimate_size_before_relax): Handle COND_JUMP_PADDING, FUSED_JCC_PADDING and COND_JUMP_PREFIX frags. (md_convert_frag): Handle BRANCH_PADDING, BRANCH_PREFIX and FUSED_JCC_PADDING frags. (OPTION_MALIGN_BRANCH_BOUNDARY): New. (OPTION_MALIGN_BRANCH_PREFIX_SIZE): New. (OPTION_MALIGN_BRANCH): New. (md_longopts): Add -malign-branch-boundary=, -malign-branch-prefix-size= and -malign-branch=. (md_parse_option): Handle -malign-branch-boundary=, -malign-branch-prefix-size= and -malign-branch=. (md_show_usage): Display -malign-branch-boundary=, -malign-branch-prefix-size= and -malign-branch=. (i386_target_format): Set tls_get_addr. (i386_cons_align): New. * config/tc-i386.h (i386_cons_align): New. (md_cons_align): New. (i386_generic_table_relax_frag): New. (md_generic_table_relax_frag): New. (i386_tc_frag_data): Add u, padding_address, length, max_prefix_length, prefix_length, default_prefix, cmp_size, classified and branch_type. (TC_FRAG_INIT): Initialize u, padding_address, length, max_prefix_length, prefix_length, default_prefix, cmp_size, classified and branch_type. * doc/c-i386.texi: Document -malign-branch-boundary=, -malign-branch= and -malign-branch-prefix-size=.
2019-04-10te-cloudabi.hAlan Modra1-0/+2
This patch is aimed a fixing large numbers of x86_64-cloudabi failures caused by gas selecting the wrong target name. * config/te-cloudabi.h: New file. * config/tc-aarch64.c (aarch64_after_parse_args): Use TE_CLOUDABI rather than TARGET_OS to select cloudabi. * config/tc-i386.h (ELF_TARGET_FORMAT64): Define for TE_CLOUDABI. * configure.tgt (*-*-cloudabi*): Set em=cloudabi.
2019-02-10gas: Pass max_bytes to TC_FRAG_INITH.J. Lu1-3/+6
ommit 3ae729d5a4f63740ed9a778960b17c2912b0bbdd Author: H.J. Lu <hjl.tools@gmail.com> Date: Wed Mar 7 04:18:45 2018 -0800 x86: Rewrite NOP generation for fill and alignment increased MAX_MEM_FOR_RS_ALIGN_CODE to 4095 which resulted in increase of assembler time and memory usage by 5 times for inputs with many .p2align directives, which is typical for LTO output. This patch passes max_bytes to TC_FRAG_INIT so that MAX_MEM_FOR_RS_ALIGN_CODE can be set as needed and tracked by backend it so that HANDLE_ALIGN can check the maximum alignment for each rs_align_code frag. Wall time to assemble the same cc1plus.s: before: 423.78user 0.89system 7:05.71elapsed 99%CPU after: 102.35user 0.27system 1:42.89elapsed 99%CPU PR gas/24165 * frags.c (frag_var_init): Pass max_chars to TC_FRAG_INIT as max_bytes. * config/tc-aarch64.h (TC_FRAG_INIT): Add and pass max_bytes to aarch64_init_frag. * /config/tc-arm.h (TC_FRAG_INIT): And and pass max_bytes to arm_init_frag. * config/tc-avr.h (TC_FRAG_INIT): And and ignore max_bytes. * config/tc-ia64.h (TC_FRAG_INIT): Likewise. * config/tc-mmix.h (TC_FRAG_INIT): Likewise. * config/tc-nds32.h (TC_FRAG_INIT): Likewise. * config/tc-ns32k.h (TC_FRAG_INIT): Likewise. * config/tc-rl78.h (TC_FRAG_INIT): Likewise. * config/tc-rx.h (TC_FRAG_INIT): Likewise. * config/tc-score.h (TC_FRAG_INIT): Likewise. * config/tc-tic54x.h (TC_FRAG_INIT): Likewise. * config/tc-tic6x.h (TC_FRAG_INIT): Likewise. * config/tc-xtensa.h (TC_FRAG_INIT): Likewise. * config/tc-i386.h (MAX_MEM_FOR_RS_ALIGN_CODE): Set to (alignment ? ((1 << alignment) - 1) : 1) (i386_tc_frag_data): Add max_bytes. (TC_FRAG_INIT): Add and track max_bytes. (HANDLE_ALIGN): Replace MAX_MEM_FOR_RS_ALIGN_CODE with fragP->tc_frag_data.max_bytes. * doc/internals.texi: Update TC_FRAG_TYPE with max_bytes.
2019-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2018-12-09x86: Put back BFD_RELOC_X86_64_GOTPCRELH.J. Lu1-0/+1
Put back BFD_RELOC_X86_64_GOTPCREL in TC_FORCE_RELOCATION_LOCAL, which was removed by commit 56ceb5b5405af23eddd12e12d8ba849010120324 Author: H.J. Lu <hjl.tools@gmail.com> Date: Thu Oct 22 04:49:20 2015 -0700 Add R_X86_64_[REX_]GOTPCRELX support to gas and ld by accident.
2018-08-31x86: Extend assembler to generate GNU property notesH.J. Lu1-0/+5
Add -mx86-used-note=[yes|no] option to generate (or not) GNU property notes with GNU_PROPERTY_X86_FEATURE_2_USED and GNU_PROPERTY_X86_ISA_1_USED properties. If the assembly input contains no instructions, set the GNU_PROPERTY_X86_UINT32_VALID bit in GNU_PROPERTY_X86_FEATURE_2_USED property. Add a --enable-x86-used-note configure time option to set the default behavior. Set the default if the configure option is not used to "no". * NEWS: Mention -mx86-used-note=[no|yes]. * configure.ac: Add --enable-x86-used-note. Define DEFAULT_X86_USED_NOTE. * config.in: Regenerated. * configure: Likewise. * config/tc-i386.c (x86_isa_1_used): New. (x86_feature_2_used): Likewise. (x86_used_note): Likewise. (_i386_insn): Add has_regmmx, has_regxmm, has_regymm and has_regzmm. (build_modrm_byte): Set i.has_regmmx, i.has_regzmm. i.has_regymm and i.has_regxmm. (x86_cleanup): New function. (output_insn): Update x86_isa_1_used and x86_feature_2_used. (OPTION_X86_USED_NOTE): New. (md_longopts): Add -mx86-used-note=. (md_parse_option): Handle OPTION_X86_USED_NOTE. (md_show_usage): Display -mx86-used-note=. * config/tc-i386.h (x86_cleanup): New prototype. (md_cleanup): New. * doc/c-i386.texi: Document -mx86-used-note=.
2018-04-18various i386-aout and i386-coff target removalAlan Modra1-5/+0
Also tidies some other aout leftovers in binutils-common.exp. bfd/ * Makefile.am: Remove support for assorted i386 aout and coff targets. * config.bfd: Likewise. * configure.ac: Likewise. * doc/bfdint.texi: Likewise. * targets.c: Likewise. * freebsd.h: Delete. * i386dynix.c: Delete. * i386freebsd.c: Delete. * i386linux.c: Delete. * i386mach3.c: Delete. * i386netbsd.c: Delete. * i386os9k.c: Delete. * Makefile.in: Regenerate. * configure: Regenerate. * po/SRC-POTFILES.in: Regenerate. binutils/ * testsuite/lib/binutils-common.exp: Remove support for assorted aout targets. gas/ * Makefile.am: Remove support for assorted i386 aout and coff targets. * config/obj-elf.c: Likewise. * config/tc-i386.h: Likewise. * configure.ac: Likewise. * configure.tgt: Likewise. * config/te-dynix.h: Delete. * config/te-i386aix.h: Delete. * config/te-mach.h: Delete. * Makefile.in: Regenerate. * config.in: Regenerate. * configure: Regenerate. * po/POTFILES.in: Regenerate. include/ * aout/dynix3.h: Delete. ld/ * Makefile.am: Remove support for assorted i386 aout and coff targets. * configure.tgt: Likewise. * testsuite/ld-discard/discard.exp: Likewise. * testsuite/ld-elf/binutils.exp: Likewise. * testsuite/ld-elf/tls.exp: Likewise. * testsuite/ld-elf/tls_common.exp: Likewise. * testsuite/ld-elfvers/vers.exp: Likewise. * testsuite/ld-elfvsb/elfvsb.exp: Likewise. * testsuite/ld-elfweak/elfweak.exp: Likewise. * testsuite/ld-gc/abi-note.d: Likewise. * testsuite/ld-gc/pr19167.d: Likewise. * testsuite/ld-gc/pr20022.d: Likewise. * testsuite/ld-gc/start.d: Likewise. * testsuite/ld-gc/stop.d: Likewise. * testsuite/ld-i386/i386.exp: Likewise. * testsuite/ld-ifunc/binutils.exp: Likewise. * testsuite/ld-ifunc/ifunc.exp: Likewise. * testsuite/ld-linkonce/linkonce.exp: Likewise. * testsuite/ld-plugin/lto.exp: Likewise. * testsuite/ld-scripts/empty-address-2a.d: Likewise. * testsuite/ld-scripts/empty-address-2b.d: Likewise. * testsuite/ld-scripts/phdrs2.exp: Likewise. * testsuite/ld-scripts/section-match-1.d: Likewise. * testsuite/ld-shared/shared.exp: Likewise. * testsuite/ld-size/size.exp: Likewise. * testsuite/ld-sparc/sparc.exp: Likewise. * emulparams/i386coff.sh: Delete. * emulparams/i386linux.sh: Delete. * emulparams/i386mach.sh: Delete. * emulparams/i386nbsd.sh: Delete. * emulparams/vsta.sh: Delete. * scripttempl/i386coff.sc: Delete. * Makefile.in: Regenerate. * po/BLD-POTFILES.in: Regenerate.
2018-03-07x86: Rewrite NOP generation for fill and alignmentH.J. Lu1-9/+12
Rewrite NOP generation for fill and code alignment by: 1. Add a 11-byte NOP with another 0x66 prefix. 2. Remove the multi-byte NOP entries which consist of 2 instructions. 3. Select proper NOPs based on ISA and processor tuning. 4. Generate multiple NOPs with the longer NOPs first followed by the shorter NOP. 5. Use jump for larger NOP padding: a. > 8 bytes (2 NOPs) in 16-bit mode. b. > 14 bytes (2 NOPs) for older processors. c. > 77 bytes (7 NOPs) for newer processors. 6. Update MAX_MEM_FOR_RS_ALIGN_CODE to 4095. PR gas/22874 * config/tc-i386.c (f32_5): Removed. (f32_8): Likewise. (f32_9): Likewise. (f32_10): Likewise. (f32_11): Likewise. (f32_12): Likewise. (f32_13): Likewise. (f32_14): Likewise. (f16_5): Likewise. (f16_6): Likewise. (f16_7): Likewise. (f16_8): Likewise. (jump_31): Likewise. (alt64_11): Likewise. (alt64_patt): Likewise. (jump_disp8): New. (jump32_disp32): Likewise. (jump16_disp32): Likewise. (alt_11): Likewise. (f32_patt): Updated. (f16_patt): Likewise. (alt_patt): Add alt_11. (i386_align_code): Merged with ... (i386_generate_nops): This. Rewritten. (fits_in_imm7): Moved before i386_generate_nops. (fits_in_imm31): Likewise. * config/tc-i386.h (MAX_MEM_FOR_RS_ALIGN_CODE): Updated to 4095. (i386_align_code): Removed. (HANDLE_ALIGN): Rewritten with i386_generate_nops. * doc/as.texinfo: Update limits of control byte for x86 .nops directive. * testsuite/gas/i386/i386.exp: Run nops-7 and x86-64-nops-7. * gas/testsuite/gas/i386/noavx-3.l: Updated. * gas/testsuite/gas/i386/nop-1.d: Likewise. * gas/testsuite/gas/i386/nop-1.s: Likewise. * gas/testsuite/gas/i386/nop-2.d: Likewise. * gas/testsuite/gas/i386/nop-2.s: Likewise. * gas/testsuite/gas/i386/nop-3.d: Likewise. * gas/testsuite/gas/i386/nop-4.d: Likewise. * gas/testsuite/gas/i386/nop-5.d: Likewise. * gas/testsuite/gas/i386/nop-5.s: Likewise. * gas/testsuite/gas/i386/nop-6.d: Likewise. * gas/testsuite/gas/i386/nop-bad-1.l: Likewise. * gas/testsuite/gas/i386/nops-1-core2.d: Likewise. * gas/testsuite/gas/i386/nops-1-i386-i686.d: Likewise. * gas/testsuite/gas/i386/nops-1-i386.d: Likewise. * gas/testsuite/gas/i386/nops-1-i686.d: Likewise. * gas/testsuite/gas/i386/nops-1-k8.d: Likewise. * gas/testsuite/gas/i386/nops-1.d: Likewise. * gas/testsuite/gas/i386/nops-2-core2.d: Likewise. * gas/testsuite/gas/i386/nops-2-i386.d: Likewise. * gas/testsuite/gas/i386/nops-2.d: Likewise. * gas/testsuite/gas/i386/nops-3-i386.d: Likewise. * gas/testsuite/gas/i386/nops-3-i686.d: Likewise. * gas/testsuite/gas/i386/nops-3.d: Likewise. * gas/testsuite/gas/i386/nops-4-i386.d: Likewise. * gas/testsuite/gas/i386/nops-4-i686.d: Likewise. * gas/testsuite/gas/i386/nops-4.d: Likewise. * gas/testsuite/gas/i386/nops-4a-i686.d: Likewise. * gas/testsuite/gas/i386/nops-5-i686.d: Likewise. * gas/testsuite/gas/i386/nops-5.d: Likewise. * gas/testsuite/gas/i386/nops-6.d: Likewise. * gas/testsuite/gas/i386/nops16-1.d: Likewise. * gas/testsuite/gas/i386/x86-64-nop-1.d: Likewise. * gas/testsuite/gas/i386/x86-64-nop-2.d: Likewise. * gas/testsuite/gas/i386/x86-64-nop-5.d: Likewise. * gas/testsuite/gas/i386/x86-64-nops-1-core2.d: Likewise. * gas/testsuite/gas/i386/x86-64-nops-1-g64.d: Likewise. * gas/testsuite/gas/i386/x86-64-nops-1-k8.d: Likewise. * gas/testsuite/gas/i386/x86-64-nops-1-pentium.d: Likewise. * gas/testsuite/gas/i386/x86-64-nops-1.d: Likewise. * gas/testsuite/gas/i386/x86-64-nops-2.d: Likewise. * gas/testsuite/gas/i386/x86-64-nops-3.d: Likewise. * gas/testsuite/gas/i386/x86-64-nops-4-core2.d: Likewise. * gas/testsuite/gas/i386/x86-64-nops-4-k8.d: Likewise. * gas/testsuite/gas/i386/x86-64-nops-4.d: Likewise. * gas/testsuite/gas/i386/x86-64-nops-5-k8.d: Likewise. * gas/testsuite/gas/i386/x86-64-nops-5.d: Likewise. * gas/testsuite/gas/i386/ilp32/x86-64-nops-1-core2.d: Likewise. * gas/testsuite/gas/i386/ilp32/x86-64-nops-1-k8.d: Likewise. * gas/testsuite/gas/i386/ilp32/x86-64-nops-1-pentium.d: Likewise. * gas/testsuite/gas/i386/ilp32/x86-64-nops-1.d: Likewise. * gas/testsuite/gas/i386/ilp32/x86-64-nops-2.d: Likewise. * gas/testsuite/gas/i386/ilp32/x86-64-nops-3.d: Likewise. * gas/testsuite/gas/i386/ilp32/x86-64-nops-4-core2.d: Likewise. * gas/testsuite/gas/i386/ilp32/x86-64-nops-4-k8.d: Likewise. * gas/testsuite/gas/i386/ilp32/x86-64-nops-4.d: Likewise. * gas/testsuite/gas/i386/ilp32/x86-64-nops-5-k8.d: Likewise. * gas/testsuite/gas/i386/ilp32/x86-64-nops-5.d: Likewise. * gas/testsuite/gas/i386/nops-7.d: New file. * gas/testsuite/gas/i386/nops-7.s: Likewise. * gas/testsuite/gas/i386/x86-64-nops-7.d: Likewise.
2018-02-17Add .nop assembler directiveH.J. Lu1-0/+5
Implement the '.nop SIZE[, CONTROL]' assembler directive, which emits SIZE bytes filled with no-op instructions. SIZE is absolute expression. The optional CONTROL byte controls how no-op instructions should be generated. If the comma and @var{control} are omitted, CONTROL is assumed to be zero. For Intel 80386 and AMD x86-64 targets, CONTROL byte specifies the size limit of a single no-op instruction. The valid values of CONTROL byte are between 0 and 8 for 16-bit mode, between 0 and 10 for 32-bit mode, between 0 and 11 for 64-bit mode. When 0 is used, the no-op size limit is set to the maximum supported size. 2 new relax states, rs_space_nop and rs_fill_nop, are added to enum _relax_state, which are similar to rs_space and rs_fill, respectively, but they fill with no-op instructions, instead of a single byte. A target backend must override the default md_generate_nops to generate proper no-op instructions. Otherwise, an error of unimplemented .nop directive will be issued whenever .nop directive is used. * NEWS: Mention .nop directive. * as.h (_relax_state): Add rs_space_nop and rs_fill_nop. * read.c (potable): Add .nop. (s_nop): New function. * read.h (s_nop): New prototype. * write.c (cvt_frag_to_fill): Handle rs_space_nop and rs_fill_nop. (md_generate_nops): New function. (relax_segment): Likewise. (write_contents): Use md_generate_nops for rs_fill_nop. * config/tc-i386.c (alt64_11): New. (alt64_patt): Likewise. (md_convert_frag): Handle rs_space_nop. (i386_output_nops): New function. (i386_generate_nops): Likewise. (i386_align_code): Call i386_output_nops. * config/tc-i386.h (i386_generate_nops): New. (md_generate_nops): Likewise. * doc/as.texinfo: Document .nop directive. * testsuite/gas/i386/i386.exp: Run .nop directive tests. * testsuite/gas/i386/nop-1.d: New file. * testsuite/gas/i386/nop-1.s: Likewise. * testsuite/gas/i386/nop-2.d: Likewise. * testsuite/gas/i386/nop-2.s: Likewise. * testsuite/gas/i386/nop-3.d: Likewise. * testsuite/gas/i386/nop-3.s: Likewise. * testsuite/gas/i386/nop-4.d: Likewise. * testsuite/gas/i386/nop-4.s: Likewise. * testsuite/gas/i386/nop-5.d: Likewise. * testsuite/gas/i386/nop-5.s: Likewise. * testsuite/gas/i386/nop-6.d: Likewise. * testsuite/gas/i386/nop-6.s: Likewise. * testsuite/gas/i386/nop-bad-1.l: Likewise. * testsuite/gas/i386/nop-bad-1.s: Likewise. * testsuite/gas/i386/x86-64-nop-1.d: Likewise. * testsuite/gas/i386/x86-64-nop-2.d: Likewise. * testsuite/gas/i386/x86-64-nop-3.d: Likewise. * testsuite/gas/i386/x86-64-nop-4.d: Likewise. * testsuite/gas/i386/x86-64-nop-5.d: Likewise. * testsuite/gas/i386/x86-64-nop-6.d: Likewise.
2018-01-03Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2017-05-16Allow target files access to default TC_FORCE_RELOCATION definesAlan Modra1-3/+2
* write.c (GENERIC_FORCE_RELOCATION_LOCAL): Define. (TC_FORCE_RELOCATION_LOCAL): Use it. (GENERIC_FORCE_RELOCATION_SUB_SAME): Define. (TC_FORCE_RELOCATION_SUB_SAME): Use it. * config/tc-arm.h (TC_FORCE_RELOCATION_LOCAL, TC_FORCE_RELOCATION_SUB_SAME): Use GENERIC defines. * config/tc-aarch64.h: Similarly. * config/tc-avr.h: Similarly. * config/tc-cris.h: Similarly. * config/tc-i386.h: Similarly. * config/tc-i960.h: Similarly. * config/tc-ia64.h: Similarly. * config/tc-microblaze.h: Similarly. * config/tc-mips.h: Similarly. * config/tc-msp430.h: Similarly. * config/tc-nds32.h: Similarly. * config/tc-pru.h: Similarly. * config/tc-riscv.h: Similarly. * config/tc-rl78.h: Similarly. * config/tc-s390.h: Similarly. * config/tc-sh.h: Similarly. * config/tc-sh64.h: Similarly. * config/tc-sparc.h: Similarly. * config/tc-xtensa.h: Similarly. * config/tc-mn10300.h: Similarly. (GENERIC_FORCE_RELOCATION_LOCAL): Define. * config/tc-msp430.c (msp430_force_relocation_local): Modify to be addition to rather than replacement of standard TC_FORCE_RELOCATION_LOCAL.
2017-01-02Update year range in copyright notice of all files.Alan Modra1-1/+1
2016-04-01Constify moreAlan Modra1-1/+1
* cgen.c (weak_operand_overflow_check): Return const char*. * messages.c (as_internal_value_out_of_range): Formatting. (as_warn_value_out_of_range): Consify prefix param. (as_bad_value_out_of_range): Likewise. * read.c (s_errwarn): Constify msg.. (s_float_space, float_cons): ..and err. * as.h (as_warn_value_out_of_range, as_bad_value_out_of_range, ieee_md_atof, vax_md_atof): Update prototypes. * tc.h (md_atof): Update prototype. * config/atof-ieee.c (ieee_md_atof): Return const char*. * config/atof-vax.c (vax_md_atof): Likewise. * config/obj-elf.c (obj_elf_parse_section_letters): Constify bad_msg. * config/tc-aarch64.c (md_atof): Return const char*. * config/tc-alpha.c (s_alpha_section_name): Likewise. (s_alpha_comm): Constify sec_name. (section_name): Constify. (s_alpha_section): Consify name.. (alpha_elf_section_letter): ..and ptr_msg param.. (md_atof): ..and return. * config/tc-alpha.h (alpha_elf_section_letter): Update prototype. * config/tc-arc.c (md_atof): Return const char*. * config/tc-arm.c (md_atof): Likewise. * config/tc-avr.c (md_atof): Likewise. * config/tc-bfin.c (md_atof): Likewise. * config/tc-cr16.c (md_atof): Likewise. * config/tc-cris.c (md_atof): Likewise. * config/tc-crx.c (md_atof): Likewise. * config/tc-d10v.c (md_atof): Likewise. * config/tc-d30v.c (md_atof): Likewise. * config/tc-dlx.c (md_atof): Likewise. * config/tc-epiphany.c (md_atof): Likewise. * config/tc-fr30.c (md_atof): Likewise. * config/tc-frv.c (md_atof): Likewise. * config/tc-ft32.c (md_atof): Likewise. * config/tc-h8300.c (md_atof): Likewise. * config/tc-hppa.c (struct default_subspace_dict): Constify name. (struct default_space_dict): Likewise. (create_new_space): Constify name param. (create_new_subspace): Likewise. (is_defined_space, is_defined_subspace): Likewise. (pa_parse_space_stmt): Constify space_name param. (md_atof): Return const char*. (pa_spaces_begin): Constify name. * config/tc-i370.c (md_atof): Return const char*. * config/tc-i386.c (md_atof): Likewise. (x86_64_section_letter): Constify ptr_msg param. * config/tc-i386.h (x86_64_section_letter): Update prototype. * config/tc-i860.c (struct i860_it): Constify error. (md_atof): Return const char*. * config/tc-i960.c (md_atof): Likewise. * config/tc-ia64.c (md_atof): Likewise. (ia64_elf_section_letter): Constify ptr_msg param. * config/tc-ia64.h (ia64_elf_section_letter): Update prototype. * config/tc-ip2k.c (md_atof): Return const char*. * config/tc-iq2000.c (md_atof): Likewise. * config/tc-lm32.c (md_atof): Likewise. * config/tc-m32c.c (md_atof): Likewise. * config/tc-m32r.c (md_atof): Likewise. * config/tc-m68hc11.c (md_atof): Likewise. * config/tc-m68k.c (md_atof): Likewise. * config/tc-mcore.c (md_atof): Likewise. * config/tc-mep.c (md_atof): Likewise. (mep_elf_section_letter): Constify ptr_msg param. * config/tc-mep.h (mep_elf_section_letter): Update prototype. * config/tc-metag.c (md_atof): Return const char*. * config/tc-microblaze.c (md_atof): Likewise. * config/tc-microblaze.h (md_atof): Delete prototype. * config/tc-mips.c (mips_parse_argument_token): Constify err. (md_atof): Return const char*. * config/tc-mmix.c (md_atof): Likewise. * config/tc-mn10200.c (md_atof): Likewise. * config/tc-mn10300.c (md_atof): Likewise. * config/tc-moxie.c (md_atof): Likewise. * config/tc-msp430.c (md_atof): Likewise. * config/tc-mt.c (md_atof): Likewise. * config/tc-nds32.c (md_atof): Likewise. * config/tc-nios2.c (md_atof): Likewise. (nios2_elf_section_letter): Constify ptr_msg param. * config/tc-nios2.h (nios2_elf_section_letter): Update prototype. * config/tc-ns32k.c (md_atof): Return const char*. * config/tc-or1k.c (md_atof): Likewise. * config/tc-pdp11.c (struct pdp11_code): Constify error. (md_atof): Return const char*. * config/tc-pj.c (md_atof): Likewise. * config/tc-ppc.c (md_atof): Likewise. * config/tc-rl78.c (md_atof): Likewise. * config/tc-rx.c (md_atof): Likewise. * config/tc-s390.c (md_atof): Likewise. * config/tc-score.c (s3_atof, md_atof): Likewise. * config/tc-sh.c (md_atof): Likewise. * config/tc-sparc.c (struct sparc_it): Constify error. (md_atof): Return const char*. * config/tc-spu.c (md_atof): Likewise. * config/tc-tic30.c (md_atof): Likewise. * config/tc-tic4x.c (md_atof): Likewise. * config/tc-tic54x.c (md_atof): Likewise. * config/tc-tic6x.c (md_atof): Likewise. * config/tc-tilegx.c (md_atof): Likewise. * config/tc-tilepro.c (md_atof): Likewise. * config/tc-v850.c (parse_register_list, md_atof): Likewise. * config/tc-vax.c (md_atof): Likewise. * config/tc-visium.c (md_atof): Likewise. * config/tc-xc16x.c (md_atof): Likewise. * config/tc-xgate.c (md_atof): Likewise. * config/tc-xstormy16.c (md_atof): Likewise. * config/tc-xtensa.c (md_atof): Likewise. * config/tc-z80.c (md_atof): Likewise. * config/tc-z8k.c (md_atof): Likewise.
2016-01-01Copyright update for binutilsAlan Modra1-1/+1
2015-10-22Add R_X86_64_[REX_]GOTPCRELX support to gas and ldH.J. Lu1-5/+6
This patch adds support for the R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX relocations proposed in https://groups.google.com/forum/#!topic/x86-64-abi/n9AWHogmVY0 to gas and ld. It updates gas to generate R_X86_64_GOTPCRELX, R_X86_64_REX_GOTPCRELX if there is a REX prefix, relocation for memory operand, foo@GOTPCREL(%rip). With the locally defined symbol, foo, we convert mov foo@GOTPCREL(%rip), %reg to lea foo(%rip), %reg and convert call/jmp *foo@GOTPCREL(%rip) to nop call foo/jmp foo nop When PIC is false, convert test %reg, foo@GOTPCREL(%rip) to test $foo, %reg and convert binop foo@GOTPCREL(%rip), %reg to binop $foo, %reg where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions. bfd/ * elf64-x86-64.c: Include opcode/i386.h. (x86_64_elf_howto_table): Add R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX. (R_X86_64_standard): Replace R_X86_64_PLT32_BND with R_X86_64_REX_GOTPCRELX. (x86_64_reloc_map): Add BFD_RELOC_X86_64_GOTPCRELX and BFD_RELOC_X86_64_REX_GOTPCRELX. (need_convert_mov_to_lea): Renamed to ... (need_convert_load): This. (elf_x86_64_check_relocs): Handle R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX. Replace need_convert_mov_to_lea with need_convert_load. (elf_x86_64_gc_sweep_hook): Handle R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX. (elf_x86_64_size_dynamic_sections): Likewise. (elf_x86_64_relocate_section): Likewise. (elf_x86_64_convert_mov_to_lea): Renamed to ... (elf_x86_64_convert_load): This. Replace need_convert_mov_to_lea with need_convert_load. Support R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX transformations. * reloc.c (BFD_RELOC_X86_64_GOTPCRELX): New. (BFD_RELOC_X86_64_REX_GOTPCRELX): Likewise. * bfd-in2.h: Regenerated. * libbfd.h: Likewise. gas/ * config/tc-i386.c (tc_i386_fix_adjustable): Handle BFD_RELOC_X86_64_GOTPCRELX and BFD_RELOC_X86_64_REX_GOTPCRELX. (tc_gen_reloc): Likewise. (i386_validate_fix): Generate BFD_RELOC_X86_64_GOTPCRELX or BFD_RELOC_X86_64_REX_GOTPCRELX if fx_tcbit2 is set. * config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Also return true for BFD_RELOC_X86_64_GOTPCRELX and BFD_RELOC_X86_64_REX_GOTPCRELX. gas/testsuite/ * gas/i386/i386.exp: Run x86-64-gotpcrel. * gas/i386/x86-64-gotpcrel.d: New file. * gas/i386/x86-64-gotpcrel.s: Likewise. * gas/i386/ilp32/x86-64-gotpcrel.d: Likewise. * gas/i386/x86-64-localpic.d: Replace R_X86_64_GOTPCREL with R_X86_64_REX_GOTPCRELX. * gas/i386/ilp32/x86-64-localpic.d: Likewise. include/elf/ * x86-64.h (R_X86_64_GOTPCRELX): New. (R_X86_64_REX_GOTPCRELX): Likewise. ld/testsuite/ * ld-ifunc/ifunc-5r-local-x86-64.d: Replace R_X86_64_GOTPCREL with R_X86_64_REX_GOTPCRELX. * ld-x86-64/plt-main1.rd: Likewise. * ld-x86-64/plt-main3.rd: Likewise. * ld-x86-64/plt-main4.rd: Likewise. * ld-x86-64/gotpcrel1.dd: New file. * ld-x86-64/gotpcrel1.out: Likewise. * ld-x86-64/gotpcrel1a.S: Likewise. * ld-x86-64/gotpcrel1b.c: Likewise. * ld-x86-64/gotpcrel1c.c: Likewise. * ld-x86-64/gotpcrel1d.S: Likewise. * ld-x86-64/load1.s: Likewise. * ld-x86-64/load1a.d: Likewise. * ld-x86-64/load1b.d: Likewise. * ld-x86-64/load1c.d: Likewise. * ld-x86-64/load1d.d: Likewise. * ld-x86-64/x86-64.exp: Run load1a, load1b, load1c and load1d tests. Run gotpcrel1 test.
2015-05-11Add Intel MCU support to gasH.J. Lu1-0/+5
-march=iamcu must be passed to i386 assembler to generate Intel MCU object file. gas/ * config/tc-i386.c (cpu_arch): Add iamcu. (i386_align_code): Handle PROCESSOR_IAMCU. (i386_arch): Likewise. (i386_mach): Likewise. (i386_target_format): Likewise. (valid_iamcu_cpu_flags): New function. (check_cpu_arch_compatible): Only allow Intel MCU instructions when targeting Intel MCU. (set_cpu_arch): Call valid_iamcu_cpu_flags to check if CPU flags are valid for Intel MCU. (md_parse_option): Likewise. * tc-i386.h (ELF_TARGET_IAMCU_FORMAT): New. (processor_type): Add PROCESSOR_IAMCU. * doc/c-i386.texi: Document iamcu. gas/testsuite/ * gas/i386/i386.exp: Run iamcu-1, iamcu-2, iamcu-3, iamcu-inval-1, iamcu-inval-2 and iamcu-inval-3. * gas/i386/iamcu-1.d: New file. * gas/i386/iamcu-1.s: Likewise. * gas/i386/iamcu-2.d: Likewise. * gas/i386/iamcu-2.s: Likewise. * gas/i386/iamcu-3.d: Likewise. * gas/i386/iamcu-3.s: Likewise. * gas/i386/iamcu-inval-1.l: Likewise. * gas/i386/iamcu-inval-1.s: Likewise. * gas/i386/iamcu-inval-2.l: Likewise. * gas/i386/iamcu-inval-2.s: Likewise. * gas/i386/iamcu-inval-3.l: Likewise. * gas/i386/iamcu-inval-3.s: Likewise.
2015-05-01Remove i386_elf_emit_arch_noteH.J. Lu1-5/+0
This x86 assembler patch: https://sourceware.org/ml/binutils/2001-11/msg00344.html generates a .note section for .arch directive so that GDB can tell which architecture an i386 binary belongs: https://sourceware.org/ml/binutils/2001-11/msg00271.html However, x86 assembly code can have any instructions. A .note section doesn't help. This patch removes it. gas/ * config/tc-i386.c (i386_elf_emit_arch_note): Removed. * config/tc-i386.h (md_end): Likewise. (i386_elf_emit_arch_note): Likewise. gas/testsuite/ * gas/i386/i386.exp: Run note. * gas/i386/note.d: New file. * gas/i386/note.s: Likewise.
2015-03-17Add znver1 processorGanesh Gopalasubramanian1-0/+1
generated by cgit v1.1 at 2025-02-21 12:22:02 +0000