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2015-05-15Support AMD64/Intel ISAs in assembler/disassemblerH.J. Lu1-0/+22
AMD64 spec and Intel64 spec differ in direct unconditional branches in 64-bit mode. AMD64 supports direct unconditional branches with 16-bit offset via the data size prefix, which truncates RIP to 16 bits, while the data size prefix is ignored by Intel64. This patch adds -mamd64/-mintel64 option to x86-64 assembler and -Mamd64/-Mintel64 option to x86-64 disassembler. The most permissive ISA, which is AMD64, is the default. GDB can add an option, similar to (gdb) help set disassembly-flavor Set the disassembly flavor. The valid values are "att" and "intel", and the default value is "att". to select which ISA to disassemble. binutils/ PR binutis/18386 * doc/binutils.texi: Document -Mamd64 and -Mintel64. gas/ PR binutis/18386 * config/tc-i386.c (OPTION_MAMD64): New. (OPTION_MINTEL64): Likewise. (md_longopts): Add -mamd64 and -mintel64. (md_parse_option): Handle OPTION_MAMD64 and OPTION_MINTEL64. (md_show_usage): Add -mamd64 and -mintel64. * doc/c-i386.texi: Document -mamd64 and -mintel64. gas/testsuite/ PR binutis/18386 * gas/i386/i386.exp: Run x86-64-branch-2 and x86-64-branch-3. * gas/i386/x86-64-branch.d: Also pass -Mintel64 to objdump. * gas/i386/ilp32/x86-64-branch.d: Likewise. * gas/i386/x86-64-branch-2.d: New file. * gas/i386/x86-64-branch-2.s: Likewise. * gas/i386/x86-64-branch-3.l: Likewise. * gas/i386/x86-64-branch-3.s: Likewise. ld/testsuite/ PR binutis/18386 * ld-x86-64/tlsgdesc.dd: Also pass -Mintel64 to objdump. * ld-x86-64/tlspic.dd: Likewise. * ld-x86-64/x86-64.exp (x86_64tests): Also pass -Mintel64 to objdump for tlspic.dd and tlsgdesc.dd. opcodes/ PR binutis/18386 * i386-dis.c: Add comments for '@'. (x86_64_table): Use '@' on call/jmp for X86_64_E8/X86_64_E9. (enum x86_64_isa): New. (isa64): Likewise. (print_i386_disassembler_options): Add amd64 and intel64. (print_insn): Handle amd64 and intel64. (putop): Handle '@'. (OP_J): Don't ignore the operand size prefix for AMD64 in 64-bit. * i386-gen.c (cpu_flags): Add CpuAMD64 and CpuIntel64. * i386-opc.h (AMD64): New. (CpuIntel64): Likewise. (i386_cpu_flags): Add cpuamd64 and cpuintel64. * i386-opc.tbl: Add direct call/jmp with Disp16|Disp32 for AMD64. Mark direct call/jmp without Disp16|Disp32 as Intel64. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2015-05-15Add -mshared option to x86 ELF assemblerH.J. Lu1-3/+32
This patch adds -mshared option to x86 ELF assembler. By default, assembler will optimize out non-PLT relocations against defined non-weak global branch targets with default visibility. The -mshared option tells the assembler to generate code which may go into a shared library where all non-weak global branch targets with default visibility can be preempted. The resulting code is slightly bigger. This option only affects the handling of branch instructions. This Linux kernel patch is needed to create a working x86 Linux kernel if it hasn't been applied: diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S index ae6588b..b91a00c 100644 --- a/arch/x86/kernel/head_64.S +++ b/arch/x86/kernel/head_64.S @@ -339,8 +339,8 @@ early_idt_handlers: i = i + 1 .endr -/* This is global to keep gas from relaxing the jumps */ -ENTRY(early_idt_handler) +/* This is weak to keep gas from relaxing the jumps */ +WEAK(early_idt_handler) cld cmpl $2,(%rsp) # X86_TRAP_NMI -- gas/ * config/tc-i386.c (shared): New. (OPTION_MSHARED): Likewise. (elf_symbol_resolved_in_segment_p): Add relocation argument. Check PLT relocations and shared. (md_estimate_size_before_relax): Pass fragP->fr_var to elf_symbol_resolved_in_segment_p. (md_longopts): Add -mshared. (md_show_usage): Likewise. (md_parse_option): Handle OPTION_MSHARED. * doc/c-i386.texi: Document -mshared. gas/testsuite/ * gas/i386/i386.exp: Don't run pcrel for ELF targets. Run pcrel-elf, relax-4 and x86-64-relax-3 for ELF targets. * gas/i386/pcrel-elf.d: New file. * gas/i386/relax-4.d: Likewise. * gas/i386/x86-64-relax-3.d: Likewise. * gas/i386/relax-3.d: Pass -mshared to assembler. Updated. * gas/i386/x86-64-relax-2.d: Likewise. * gas/i386/relax-3.s: Add test for PLT relocation.
2015-05-13Revert "Add -mno-shared to x86 assembler"H.J. Lu1-17/+0
This reverts commit 573cc2e57db66165b390044338d3a4ad51f36bf8.
2015-05-11Default e_machine to EM_IAMCU for i?86-*-elfiamcuH.J. Lu1-1/+23
This patch sets the default ELF output format of assembler and linker to EM_IAMCU when binutils is configured to i?86-*-elfiamcu target. gas/ * configure.tgt (arch): Set to iamcu for i386-*-elfiamcu target. * config/tc-i386.c (i386_mach): Support iamcu. (i386_target_format): Likewise. ld/ * configure.tgt: Support i[3-7]86-*-elfiamcu target. ld/testsuite/ * ld-i386/i386.exp (iamcu_tests): Run iamcu-4. * ld-i386/iamcu-4.d: New file.
2015-05-11Add Intel MCU support to gasH.J. Lu1-3/+55
-march=iamcu must be passed to i386 assembler to generate Intel MCU object file. gas/ * config/tc-i386.c (cpu_arch): Add iamcu. (i386_align_code): Handle PROCESSOR_IAMCU. (i386_arch): Likewise. (i386_mach): Likewise. (i386_target_format): Likewise. (valid_iamcu_cpu_flags): New function. (check_cpu_arch_compatible): Only allow Intel MCU instructions when targeting Intel MCU. (set_cpu_arch): Call valid_iamcu_cpu_flags to check if CPU flags are valid for Intel MCU. (md_parse_option): Likewise. * tc-i386.h (ELF_TARGET_IAMCU_FORMAT): New. (processor_type): Add PROCESSOR_IAMCU. * doc/c-i386.texi: Document iamcu. gas/testsuite/ * gas/i386/i386.exp: Run iamcu-1, iamcu-2, iamcu-3, iamcu-inval-1, iamcu-inval-2 and iamcu-inval-3. * gas/i386/iamcu-1.d: New file. * gas/i386/iamcu-1.s: Likewise. * gas/i386/iamcu-2.d: Likewise. * gas/i386/iamcu-2.s: Likewise. * gas/i386/iamcu-3.d: Likewise. * gas/i386/iamcu-3.s: Likewise. * gas/i386/iamcu-inval-1.l: Likewise. * gas/i386/iamcu-inval-1.s: Likewise. * gas/i386/iamcu-inval-2.l: Likewise. * gas/i386/iamcu-inval-2.s: Likewise. * gas/i386/iamcu-inval-3.l: Likewise. * gas/i386/iamcu-inval-3.s: Likewise.
2015-05-08Add -mno-shared to x86 assemblerH.J. Lu1-0/+17
On ELF target, the assembler normally generates code which can go into a shared library where non-weak symbols can be preempted. The -mno-shared option tells the assembler to generate code not for a shared library, where non-weak symbols won't be preempted. The resulting code is slightly smaller. This option mainly affects the handling of branch instructions. gas/ * config/tc-i386.c (no_shared): New. (OPTION_MNO_SHARED): Likewise. (elf_symbol_resolved_in_segment_p): Check no_shared. (md_longopts): Add mno-shared. (md_parse_option): Handle OPTION_MNO_SHARED. (md_show_usage): Add -mno-shared. * doc/c-i386.texi: Document -mno-shared. gas/testsuite/ * gas/i386/i386.exp: Run relax-4 and x86-64-relax-3. * gas/i386/relax-4.d: New file. * gas/i386/x86-64-relax-3.d: Likewise.
2015-05-07Optimize branches to non-weak symbols with visibilityH.J. Lu1-4/+20
Branches to global non-weak symbols defined in the same segment with non-default visibility can be optimized the same way as branches to local symbols. gas/ * config/tc-i386.c (elf_symbol_resolved_in_segment_p): New. (md_estimate_size_before_relax): Use it. gas/testsuite/ * gas/i386/i386.exp: Run relax-3 and x86-64-relax-2. * gas/i386/relax-3.d: New file. * gas/i386/relax-3.s: Likewise. * gas/i386/x86-64-relax-2.d: Likewise.
2015-05-01Remove i386_elf_emit_arch_noteH.J. Lu1-42/+0
This x86 assembler patch: https://sourceware.org/ml/binutils/2001-11/msg00344.html generates a .note section for .arch directive so that GDB can tell which architecture an i386 binary belongs: https://sourceware.org/ml/binutils/2001-11/msg00271.html However, x86 assembly code can have any instructions. A .note section doesn't help. This patch removes it. gas/ * config/tc-i386.c (i386_elf_emit_arch_note): Removed. * config/tc-i386.h (md_end): Likewise. (i386_elf_emit_arch_note): Likewise. gas/testsuite/ * gas/i386/i386.exp: Run note. * gas/i386/note.d: New file. * gas/i386/note.s: Likewise.
2015-04-30Use "else if" on cpu_arch_isaH.J. Lu1-1/+1
* config/tc-i386.c (i386_target_format): Use "else if" on cpu_arch_isa.
2015-04-23x86: don't require operand size specification for AVX512 broadcastsJan Beulich1-0/+1
Certain conversion operations as well as vfpclassp{d,s} are ambiguous when the input operand is in memory. That ambiguity, however, doesn't apply when using broadcasts (the destination operand size can be induced from the broadcast specifier). gas/ 2015-04-23 Jan Beulich <jbeulich@suse.com> * config/tc-i386.c (match_mem_size): Also allow no size specification when broadcasting. gas/testsuite/ 2015-04-23 Jan Beulich <jbeulich@suse.com> * gas/i386/avx512dq.s: Drop 'z' suffix from vfpclassp{d,s} in some AT&T and all Intel cases. * gas/i386/x86-64-avx512dq.s: Likewise. * gas/i386/avx512dq_vl.s: Drop 'x' and 'y' suffixes from vcvt{,u}qq2ps and vfpclassp{d,s} in some AT&T and all Intel cases. * gas/i386/x86-64-avx512dq_vl.s: Likewise. * gas/i386/avx512f_vl.s: Drop 'x' and 'y' suffixes from vcvt{,t}pd2{,u}dq and vcvtpd2ps in some AT&T and all Intel cases. * gas/i386/x86-64-avx512f_vl.s: Likewise.
2015-04-08Add SHF_COMPRESSED support to gas and objcopyH.J. Lu1-1/+2
This patch adds --compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi} options to gas and objcopy for ELF files. They control how DWARF debug sections are compressed. --compress-debug-sections=none is equivalent to --nocompress-debug-sections. --compress-debug-sections=zlib and --compress-debug-sections=zlib-gnu are equivalent to --compress-debug-sections. --compress-debug-sections=zlib-gabi compresses DWARF debug sections with SHF_COMPRESSED from the ELF ABI. No linker changes are required to support SHF_COMPRESSED. bfd/ * archive.c (_bfd_get_elt_at_filepos): Also copy BFD_COMPRESS_GABI bit. * bfd.c (bfd::flags): Increase size to 18 bits. (BFD_COMPRESS_GABI): New. (BFD_FLAGS_SAVED): Add BFD_COMPRESS_GABI. (BFD_FLAGS_FOR_BFD_USE_MASK): Likewise. (bfd_update_compression_header): New fuction. (bfd_check_compression_header): Likewise. (bfd_get_compression_header_size): Likewise. (bfd_is_section_compressed_with_header): Likewise. * compress.c (MAX_COMPRESSION_HEADER_SIZE): New. (bfd_compress_section_contents): Return the uncompressed size if the full section contents is compressed successfully. Support converting from/to .zdebug* sections. (bfd_get_full_section_contents): Call bfd_get_compression_header_size to get compression header size. (bfd_is_section_compressed): Renamed to ... (bfd_is_section_compressed_with_header): This. Add a pointer argument to return compression header size. (bfd_is_section_compressed): Use it. (bfd_init_section_decompress_status): Call bfd_get_compression_header_size to get compression header size. Return FALSE if uncompressed section size is 0. * elf.c (_bfd_elf_make_section_from_shdr): Support converting from/to .zdebug* sections. * bfd-in2.h: Regenerated. binutils/ * objcopy.c (do_debug_sections): Add compress_zlib, compress_gnu_zlib and compress_gabi_zlib. (copy_options): Use optional_argument on compress-debug-sections. (copy_usage): Update --compress-debug-sections. (copy_file): Handle compress_zlib, compress_gnu_zlib and compress_gabi_zlib. (copy_main): Handle --compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}. * doc/binutils.texi: Document --compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}. binutils/testsuite/ * compress.exp: Add tests for --compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}. * binutils-all/dw2-3.rS: New file. * binutils-all/dw2-3.rt: Likewise. * binutils-all/libdw2-compressedgabi.out: Likewise. gas/ * as.c (show_usage): Update --compress-debug-sections. (std_longopts): Use optional_argument on compress-debug-sections. (parse_args): Handle --compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}. * as.h (compressed_debug_section_type): New. (flag_compress_debug): Change type to compressed_debug_section_type. --compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}. * write.c (compress_debug): Set BFD_COMPRESS_GABI for --compress-debug-sections=zlib-gabi. Call bfd_get_compression_header_size to get compression header size. Don't rename section name for --compress-debug-sections=zlib-gabi. * config/tc-i386.c (compressed_debug_section_type): Set to COMPRESS_DEBUG_ZLIB. * doc/as.texinfo: Document --compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}. gas/testsuite/ * gas/i386/dw2-compressed-1.d: New file. * gas/i386/dw2-compressed-2.d: Likewise. * gas/i386/dw2-compressed-3.d: Likewise. * gas/i386/x86-64-dw2-compressed-2.d: Likewise. * gas/i386/i386.exp: Run dw2-compressed-2, dw2-compressed-1, dw2-compressed-3 and x86-64-dw2-compressed-2. ld/testsuite/ * ld-elf/compress.exp: Add a test for --compress-debug-sections=zlib-gabi. (build_tests): Add 2 tests for --compress-debug-sections=zlib-gabi. (run_tests): Likewise. Verify linker output with zlib-gabi compressed debug input. * ld-elf/compressed1a.d: New file. * ld-elf/compressed1b.d: Likewise. * ld-elf/compressed1c.d: Likewise.
2015-03-27Remove the unused cpu_flags_setH.J. Lu1-17/+0
* config/tc-i386.c (cpu_flags_set): Removed.
2015-03-20Limit multi-byte nop instructions to 10 bytesH.J. Lu1-98/+15
There is no performance advantage to use multi-byte nop instructions greater than 10 bytes. This patch limits multi-byte nop instructions to 10 bytes. Since there is only one way to encode multi-byte nop instructions now, it also removed redundant nop tests. gas/ * config/tc-i386.c (i386_align_code): Limit multi-byte nop instructions to 10 bytes. gas/testsuite/ * gas/i386/i386.exp: Don't run nops-1-bdver1, nops-1-bdver2, nops-1-bdver3, nops-1-bdver4, nops-1-znver1, nops-1-btver1 nops-1-btver2, x86-64-nops-1-nocona, x86-64-nops-1-bdver1, x86-64-nops-1-bdver2, x86-64-nops-1-bdver3, x86-64-nops-1-bdver4, x86-64-nops-1-znver1, x86-64-nops-1-btver1 nor x86-64-nops-1-btver2. * gas/i386/nops-1-core2.d: Updated. * gas/i386/nops-1-k8.d: Likewise. * gas/i386/nops-4a-i686.d: Likewise. * gas/i386/nops-5-i686.d: Likewise. * gas/i386/nops-5.d: Likewise. * gas/i386/nops-6.d: Likewise. * gas/i386/x86-64-nops-1-core2.d: Likewise. * gas/i386/x86-64-nops-1-g64.d: Likewise. * gas/i386/x86-64-nops-1-k8.d: Likewise. * gas/i386/x86-64-nops-1.d: Likewise. * gas/i386/x86-64-nops-2.d: Likewise. * gas/i386/x86-64-nops-3.d: Likewise. * gas/i386/x86-64-nops-4-core2.d: Likewise. * gas/i386/x86-64-nops-4-k8.d: Likewise. * gas/i386/x86-64-nops-4.d: Likewise. * gas/i386/x86-64-nops-5-k8.d: Likewise. * gas/i386/x86-64-nops-5.d: Likewise. * gas/i386/ilp32/x86-64-nops-1-core2.d: Likewise. * gas/i386/ilp32/x86-64-nops-1-k8.d: Likewise. * gas/i386/ilp32/x86-64-nops-1.d: Likewise. * gas/i386/ilp32/x86-64-nops-2.d: Likewise. * gas/i386/ilp32/x86-64-nops-3.d: Likewise. * gas/i386/ilp32/x86-64-nops-4-core2.d: Likewise. * gas/i386/ilp32/x86-64-nops-4-k8.d: Likewise. * gas/i386/ilp32/x86-64-nops-4.d: Likewise. * gas/i386/ilp32/x86-64-nops-5-k8.d: Likewise. * gas/i386/ilp32/x86-64-nops-5.d: Likewise. * gas/i386/nops-1-bdver1.d: Removed. * gas/i386/nops-1-bdver2.d: Likewise. * gas/i386/nops-1-bdver3.d: Likewise. * gas/i386/nops-1-bdver4.d: Likewise. * gas/i386/nops-1-btver1.d: Likewise. * gas/i386/nops-1-btver2.d: Likewise. * gas/i386/nops-1-znver1.d: Likewise. * gas/i386/x86-64-nops-1-bdver1.d: Likewise. * gas/i386/x86-64-nops-1-bdver2.d: Likewise. * gas/i386/x86-64-nops-1-bdver3.d: Likewise. * gas/i386/x86-64-nops-1-bdver4.d: Likewise. * gas/i386/x86-64-nops-1-btver1.d: Likewise. * gas/i386/x86-64-nops-1-btver2.d: Likewise. * gas/i386/x86-64-nops-1-nocona.d: Likewise. * gas/i386/x86-64-nops-1-znver1.d: Likewise. * gas/i386/ilp32/x86-64-nops-1-nocona.d: Likewise.
2015-03-17Add znver1 processorGanesh Gopalasubramanian1-0/+6
2015-01-02ChangeLog rotatation and copyright year updateAlan Modra1-1/+1
2014-12-14Compress debug sections for Linux/x86 by defaultH.J. Lu1-0/+5
* config/tc-i386.c (flag_compress_debug): Default to compress debug sections for Linux.
2014-11-18Add -z bndplt to generate BND prefix in PLT entriesIgor Zamyatin1-45/+15
This patch adds "-z bndplt" option Linux/x86-64 linker to generate BND prefix in PLT entries. It also updated Linux/x86-64 assembler not to generate R_X86_64_PLT32_BND nor R_X86_64_PC32_BND relocations. bfd/ 2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com> * elf64-x86-64.c (elf_x86_64_check_relocs): Enable MPX PLT only for -z bndplt. gas/ 2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com> * config/tc-i386-intel.c (i386_operator): Remove last argument from lex_got call. * config/tc-i386.c (reloc): Remove bnd_prefix from parameters' list. Return always BFD_RELOC_32_PCREL. * (output_branch): Remove condition for BFD_RELOC_X86_64_PC32_BND. * (output_jump): Update call to reloc accordingly. * (output_interseg_jump): Likewise. * (output_disp): Likewise. * (output_imm): Likewise. * (x86_cons_fix_new): Likewise. * (lex_got): Remove bnd_prefix from parameters' list in macro and declarations. Don't use BFD_RELOC_X86_64_PLT32_BND. * (x86_cons): Update call to lex_got accordingly. * (i386_immediate): Likewise. * (i386_displacement): Likewise. * (md_apply_fix): Don't use BFD_RELOC_X86_64_PLT32_BND nor BFD_RELOC_X86_64_PC32_BND. * (tc_gen_reloc): Likewise. include/ 2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com> * bfdlink.h (struct bfd_link_info): Add bndplt. ld/ 2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com> * emulparams/elf_x86_64.sh (BNDPLT): Set to yes for x86_64. * emultempl/elf32.em (gld${EMULATION_NAME}_handle_option): Handle "-z bndplt" if BNDPLT is yes. (gld${EMULATION_NAME}_list_options): Add "-z bndplt" entry. * ld.texinfo: Add description for bndplt. ld/testsuite/ 2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com> * testsuite/ld-x86-64/bnd-ifunc-1.d: Add bndplt option. * testsuite/ld-x86-64/bnd-ifunc-2.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1.d: Likewise. Update dissassembly sections. * testsuite/ld-x86-64/mpx.exp: Handle mpx3 and mpx4 tests. * testsuite/ld-x86-64/mpx1a.rd: Remove _BND from relocation name. * testsuite/ld-x86-64/mpx1c.rd: Likewise. * testsuite/ld-x86-64/mpx2a.rd: Likewise. * testsuite/ld-x86-64/mpx2c.rd: Likewise. * testsuite/ld-x86-64/mpx3.dd: New file. * testsuite/ld-x86-64/mpx3a.s: Likewise. * testsuite/ld-x86-64/mpx3b.s: Likewise. * testsuite/ld-x86-64/mpx4.dd: Likewise. * testsuite/ld-x86-64/mpx4a.s: Likewise. * testsuite/ld-x86-64/mpx4b.s: Likewise.
2014-11-17Add AVX512VBMI instructionsIlya Tocar1-0/+2
gas/ * config/tc-i386.c (cpu_arch): Add .avx512vbmi. * doc/c-i386.texi: Document it. opcodes/ * i386-dis-evex.c (evex_table): Add vpermi2b, vpermt2b, vpermb, vpmultishiftqb. * i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F3883, EVEX_W_0F3883_P_2. * i386-gen.c (cpu_flag_init): Add CPU_AVX512VBMI_FLAGS. (cpu_flags): Add CpuAVX512VBMI. * i386-opc.h (enum): Add CpuAVX512VBMI. (i386_cpu_flags): Add cpuavx512vbmi. * i386-opc.tbl: Add vpmadd52luq, vpmultishiftqb, vpermb, vpermi2b, vpermt2b. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. /gas/testsuite/ * gas/i386/i386.exp: Run new tests. * gas/i386/avx512vbmi-intel.d: New file. * gas/i386/avx512vbmi.d: Likewise. * gas/i386/avx512vbmi.s: Likewise. * gas/i386/avx512vbmi_vl-intel.d: Likewise. * gas/i386/avx512vbmi_vl.d: Likewise. * gas/i386/avx512vbmi_vl.s: Likewise. * gas/i386/x86-64-avx512vbmi-intel.d: Likewise. * gas/i386/x86-64-avx512vbmi.d: Likewise. * gas/i386/x86-64-avx512vbmi.s: Likewise. * gas/i386/x86-64-avx512vbmi_vl-intel.d: Likewise. * gas/i386/x86-64-avx512vbmi_vl.d: Likewise. * gas/i386/x86-64-avx512vbmi_vl.s: Likewise.
2014-11-17Add AVX512IFMA instructionsIlya Tocar1-0/+2
gas/ * config/tc-i386.c (cpu_arch): Add .avx512ifma. * doc/c-i386.texi: Document it. opcodes/ * i386-dis-evex.c (evex_table): Add vpmadd52luq, vpmadd52huq. * i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F38B4, PREFIX_EVEX_0F38B5. * i386-gen.c (cpu_flag_init): Add CPU_AVX512IFMA_FLAGS. (cpu_flags): Add CpuAVX512IFMA. * i386-opc.h (enum): Add CpuAVX512IFMA. (i386_cpu_flags): Add cpuavx512ifma. * i386-opc.tbl: Add vpmadd52huq, vpmadd52luq. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. /gas/testsuite/ * gas/i386/i386.exp: Run new tests. * gas/i386/avx512ifma-intel.d: New file. * gas/i386/avx512ifma.d: Likewise. * gas/i386/avx512ifma.s: Likewise. * gas/i386/avx512ifma_vl-intel.d: Likewise. * gas/i386/avx512ifma_vl.d: Likewise. * gas/i386/avx512ifma_vl.s: Likewise. * gas/i386/x86-64-avx512ifma-intel.d: Likewise. * gas/i386/x86-64-avx512ifma.d: Likewise. * gas/i386/x86-64-avx512ifma.s: Likewise. * gas/i386/x86-64-avx512ifma_vl-intel.d: Likewise. * gas/i386/x86-64-avx512ifma_vl.d: Likewise. * gas/i386/x86-64-avx512ifma_vl.s: Likewise.
2014-11-17Add pcommit instructionIlya Tocar1-0/+2
gas/ * config/tc-i386.c (cpu_arch): Add .pcommit. * doc/c-i386.texi: Document it. /opcodes * i386-dis.c (PREFIX enum): Add PREFIX_RM_0_0FAE_REG_7. (prefix_table): Add pcommit. * i386-gen.c (cpu_flag_init): Add CPU_PCOMMIT_FLAGS. (cpu_flags): Add CpuPCOMMIT. * i386-opc.h (enum): Add CpuPCOMMIT. (i386_cpu_flags): Add cpupcommit. * i386-opc.tbl: Add pcommit. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. /gas/testsuite/ * gas/i386/i386.exp: Run new tests. * gas/i386/pcommit-intel.d: New file. * gas/i386/pcommit.d: Likewise. * gas/i386/pcommit.s: Likewise. * gas/i386/x86-64-pcommit-intel.d: Likewise. * gas/i386/x86-64-pcommit.d: Likewise. * gas/i386/x86-64-pcommit.s: Likewise.
2014-11-17Add clwb instructionIlya Tocar1-0/+2
gas/ * config/tc-i386.c (cpu_arch): Add .clwb. * doc/c-i386.texi: Document it. opcodes/ * i386-dis.c (PREFIX enum): Add PREFIX_0FAE_REG_6. (prefix_table): Add clwb. * i386-gen.c (cpu_flag_init): Add CPU_CLWB_FLAGS. (cpu_flags): Add CpuCLWB. * i386-opc.h (enum): Add CpuCLWB. (i386_cpu_flags): Add cpuclwb. * i386-opc.tbl: Add clwb. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. gas/testsuite/ * gas/i386/i386.exp: Run new tests. * gas/i386/clwb-intel.d: New file. * gas/i386/clwb.d: Likewise. * gas/i386/clwb.s: Likewise. * gas/i386/x86-64-clwb-intel.d: Likewise. * gas/i386/x86-64-clwb.d: Likewise. * gas/i386/x86-64-clwb.s: Likewise.
2014-11-14Correct x86 assembler manualH.J. Lu1-10/+10
* config/tc-i386.c (cpu_arch): Re-arrange avx512* and xsave* items. * doc/c-i386.texi: Re-arrange avx512* and xsave*. Add clflushopt and se1. Remove duplicated entries.
2014-11-13Add assembler support for @gotpltH.J. Lu1-0/+3
Obsolete R_X86_64_GOTPLT64 and treat it the same as R_X86_64_GOT64. bfd/ PR gas/17598 * elf64-x86-64.c (elf_x86_64_check_relocs): Treat R_X86_64_GOTPLT64 the same as R_X86_64_GOT64. (elf_x86_64_relocate_section): Likewise. gas/ PR gas/17598 * config/tc-i386.c (reloc): Support BFD_RELOC_X86_64_GOTPLT64. gas/testsuite/ PR gas/17598 * gas/i386/reloc64.s: Add @gotplt check. * gas/i386/reloc64.d: Updated. * gas/i386/reloc64.l: Likewise. ld/testsuite/ PR gas/17598 * ld-x86-64/x86-64.exp: Run gotplt1. * ld-x86-64/gotplt1.d: New file. * ld-x86-64/gotplt1.s: Likewise.
2014-11-12Fix x86 non-ELF build breakageAlan Modra1-0/+2
PR ld/17482 * config/tc-i386.c (output_insn): Don't test x86_elf_abi when not ELF.
2014-11-07X32: Add REX prefix to encode R_X86_64_GOTTPOFFH.J. Lu1-0/+9
Structions with R_X86_64_GOTTPOFF relocation must be encoded with REX prefix even if it isn't required by destination register. Otherwise linker can't safely perform IE -> LE optimization. bfd/ PR ld/17482 * elf64-x86-64.c (elf_x86_64_relocate_section): Update comments for IE->LE transition. gas/ PR ld/17482 * config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix for structions with R_X86_64_GOTTPOFF relocation for x32 if needed. gas/testsuite/ PR ld/17482 * gas/i386/ilp32/x32-tls.d: New file. * gas/i386/ilp32/x32-tls.s: Likewise. ld/testsuite/ PR ld/17482 * ld-x86-64/tlsie4.dd: Updated.
2014-10-18Fix PR17493, attempted output of *GAS `reg' section* symbolAlan Modra1-1/+1
The write.c change is to make gas report an error if reg_section symbols should leak in future. The tc-i386.c change is the real fix. Note that the error isn't the most helpful, "redefined symbol cannot be used on reloc", but I'm not inclined to improve what is really an internal gas error. reg_section symbols shouldn't leak.. gas/ PR 17493 * write.c (adjust_reloc_syms): Don't allow symbols in reg_section to be reduced to reg_section section symbol. * gas/config/tc-i386.c (i386_finalize_immediate): Reject all reg_section immediates. gas/testsuite/ * gas/i386/inval-equ-2.l: Adjust.
2014-10-14Avoid undefined behaviour with signed expressionsAlan Modra1-13/+12
PR 17453 bfd/ * libbfd.c (COERCE16, COERCE32, COERCE64): Use unsigned types. (EIGHT_GAZILLION): Delete. binutils/ * dwarf.c (read_leb128): Avoid signed overflow. (read_debug_line_header): Likewise. gas/ * config/tc-i386.c (fits_in_signed_long): Use unsigned param and expression to avoid signed overflow. (fits_in_signed_byte, fits_in_unsigned_byte, fits_in_unsigned_word, fits_in_signed_word, fits_in_unsigned_long): Similarly. * expr.c (operand <'-'>): Avoid signed overflow. * read.c (s_comm_internal): Likewise.
2014-09-23Disallow VEX/EVEX encoded instructions in 16-bit modeH.J. Lu1-4/+13
gas/ PR gas/17421 * config/tc-i386.c (md_assemble): Disallow VEX/EVEX encoded instructions in 16-bit mode. gas/testsuite/ PR gas/17421 * gas/i386/i386.exp: Run inval-16. * gas/i386/inval-16.l: New file. * gas/i386/inval-16.s: Likewise.
2014-09-16Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.Ilya Tocar1-1/+23
It is used to control which value is encoded in rounding control bits for SAE-only EVEX instructions. gas/ * config/tc-i386.c (evexrcig): New. (build_evex_prefix): Force rounding bits. (OPTION_MEVEXRCIG): New. (md_longopts): Add mevexrcig. (md_parse_option): Handle OPTION_MEVEXRCIG. (md_show_usage): Document mevexrcig. * doc/c-i386.texi (mevexrcig): Document new option. gas/testsuite/ * gas/i386/avx512dq-rcig.s: New. * gas/i386/avx512dq-rcigrd-intel.d: Likewise. * gas/i386/avx512dq-rcigrd.d: Likewise. * gas/i386/avx512dq-rcigrne-intel.d: Likewise. * gas/i386/avx512dq-rcigrne.d: Likewise. * gas/i386/avx512dq-rcigru-intel.d: Likewise. * gas/i386/avx512dq-rcigru.d: Likewise. * gas/i386/avx512dq-rcigrz-intel.d: Likewise. * gas/i386/avx512dq-rcigrz.d: Likewise. * gas/i386/avx512er-rcig.s: Likewise. * gas/i386/avx512er-rcigrd-intel.d: Likewise. * gas/i386/avx512er-rcigrd.d: Likewise. * gas/i386/avx512er-rcigrne-intel.d: Likewise. * gas/i386/avx512er-rcigrne.d: Likewise. * gas/i386/avx512er-rcigru-intel.d: Likewise. * gas/i386/avx512er-rcigru.d: Likewise. * gas/i386/avx512er-rcigrz-intel.d: Likewise. * gas/i386/avx512er-rcigrz.d: Likewise. * gas/i386/avx512f-rcig.s: Likewise. * gas/i386/avx512f-rcigrd-intel.d: Likewise. * gas/i386/avx512f-rcigrd.d: Likewise. * gas/i386/avx512f-rcigrne-intel.d: Likewise. * gas/i386/avx512f-rcigrne.d: Likewise. * gas/i386/avx512f-rcigru-intel.d: Likewise. * gas/i386/avx512f-rcigru.d: Likewise. * gas/i386/avx512f-rcigrz-intel.d: Likewise. * gas/i386/avx512f-rcigrz.d: Likewise. * gas/i386/x86-64-avx512dq-rcig.s: Likewise. * gas/i386/x86-64-avx512dq-rcigrd-intel.d: Likewise. * gas/i386/x86-64-avx512dq-rcigrd.d: Likewise. * gas/i386/x86-64-avx512dq-rcigrne-intel.d: Likewise. * gas/i386/x86-64-avx512dq-rcigrne.d: Likewise. * gas/i386/x86-64-avx512dq-rcigru-intel.d: Likewise. * gas/i386/x86-64-avx512dq-rcigru.d: Likewise. * gas/i386/x86-64-avx512dq-rcigrz-intel.d: Likewise. * gas/i386/x86-64-avx512dq-rcigrz.d: Likewise. * gas/i386/x86-64-avx512er-rcig.s: Likewise. * gas/i386/x86-64-avx512er-rcigrd-intel.d: Likewise. * gas/i386/x86-64-avx512er-rcigrd.d: Likewise. * gas/i386/x86-64-avx512er-rcigrne-intel.d: Likewise. * gas/i386/x86-64-avx512er-rcigrne.d: Likewise. * gas/i386/x86-64-avx512er-rcigru-intel.d: Likewise. * gas/i386/x86-64-avx512er-rcigru.d: Likewise. * gas/i386/x86-64-avx512er-rcigrz-intel.d: Likewise. * gas/i386/x86-64-avx512er-rcigrz.d: Likewise. * gas/i386/x86-64-avx512f-rcig.s: Likewise. * gas/i386/x86-64-avx512f-rcigrd-intel.d: Likewise. * gas/i386/x86-64-avx512f-rcigrd.d: Likewise. * gas/i386/x86-64-avx512f-rcigrne-intel.d: Likewise. * gas/i386/x86-64-avx512f-rcigrne.d: Likewise. * gas/i386/x86-64-avx512f-rcigru-intel.d: Likewise. * gas/i386/x86-64-avx512f-rcigru.d: Likewise. * gas/i386/x86-64-avx512f-rcigrz-intel.d: Likewise. * gas/i386/x86-64-avx512f-rcigrz.d: Likewise. * gas/i386/i386.exp: Run new tests.
2014-09-15Rename OPTION_omit_lock_prefix to OPTION_OMIT_LOCK_PREFIXH.J. Lu1-3/+3
* config/tc-i386.c (OPTION_omit_lock_prefix): Renamed to ... (OPTION_OMIT_LOCK_PREFIX): This. (md_longopts): Updated. (md_parse_option): Likewise.
2014-09-12Fix tc-i386.c -Werror=logical-not-parentheses errorAlan Modra1-6/+6
* config/tc-i386.c (match_template): Remove redundant "!!" testing single-bit bitfields. (build_modrm_byte): Don't compare single-bit bitfields to "1".
2014-08-06Add -momit_lock_prefix=[no|yes] optionIlya Tocar1-0/+27
This option serves as a workaround for processors, which fail on lock prefix. gas/ * config/tc-i386.c (omit_lock_prefix): New. (output_insn): Omit lock prefix if omit_lock_prefix is true. (OPTION_omit_lock_prefix): New. (md_longopts): Add momit-lock-prefix. (md_parse_option): Handle momit-lock-prefix. (md_show_usage): Add momit-lock-prefix=[no|yes]. * doc/c-i386.texi (momit-lock-prefix): Document. gas/testsuite/ * gas/i386/i386.exp: Run new tests. * gas/i386/omit-lock-no.d: New. * gas/i386/omit-lock-yes.d: Ditto. * gas/i386/omit-lock.s: Ditto.
2014-07-22Add AVX512DQ instructions and their AVX512VL variants.Ilya Tocar1-0/+2
gas/ * config/tc-i386.c (cpu_arch): Add .avx512dq, CPU_AVX512DQ_FLAGS. * doc/c-i386.texi: Document avx512dq/.avx512dq. gas/testsuite/ * gas/i386/avx512dq-intel.d: New. * gas/i386/avx512dq.d: New. * gas/i386/avx512dq.s: New. * gas/i386/avx512dq_vl-intel.d: New. * gas/i386/avx512dq_vl.d: New. * gas/i386/avx512dq_vl.s: New. * gas/i386/i386.exp: Run new AVX-512 tests. * gas/i386/x86-64-avx512dq-intel.d: New. * gas/i386/x86-64-avx512dq.d: New. * gas/i386/x86-64-avx512dq.s: New. * gas/i386/x86-64-avx512dq_vl-intel.d: New. * gas/i386/x86-64-avx512dq_vl.d: New. * gas/i386/x86-64-avx512dq_vl.s: New. opcodes/ * i386-dis-evex.h: Updated. * i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F54, PREFIX_EVEX_0F55, PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0F3A16, PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A50, PREFIX_EVEX_0F3A51, PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66, PREFIX_EVEX_0F3A67. (VEX_LEN enum): Add VEX_LEN_0F92_P_2, VEX_LEN_0F93_P_2, VEX_W_0F92_P_2_LEN_0, VEX_W_0F93_P_2_LEN_0. (VEX_W enum): Add EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0, EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2, EVEX_W_0F57_P_0, EVEX_W_0F57_P_2, EVEX_W_0F78_P_2, EVEX_W_0F79_P_2, EVEX_W_0F7A_P_2, EVEX_W_0F7B_P_2, EVEX_W_0F3838_P_1, EVEX_W_0F3839_P_1, EVEX_W_0F3A16_P_2, EVEX_W_0F3A22_P_2, EVEX_W_0F3A50_P_2, EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2, EVEX_W_0F3A57_P_2, EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2. (prefix_table): Add entries for new instructions. (vex_len_table): Ditto. (vex_w_table): Ditto. (OP_E_memory): Update xmmq_mode handling. * i386-gen.c (cpu_flag_init): Add CPU_AVX512DQ_FLAGS. (cpu_flags): Add CpuAVX512DQ. * i386-init.h: Regenerared. * i386-opc.h (CpuAVX512DQ): New. (i386_cpu_flags): Add cpuavx512dq. * i386-opc.tbl: Add AVX512DQ instructions. * i386-tbl.h: Regenerate.
2014-07-22Add support for AVX512BW instructions and their AVX512VL versions.Ilya Tocar1-0/+2
gas/ * config/tc-i386.c (cpu_arch): Add .avx512bw, CPU_AVX512BW_FLAGS. * doc/c-i386.texi: Document avx512bw/.avx512bw. gas/testsuite/ * gas/i386/avx512bw-intel.d: New. * gas/i386/avx512bw-opts-intel.d: New. * gas/i386/avx512bw-opts.d: New. * gas/i386/avx512bw-opts.s: New. * gas/i386/avx512bw-wig.s: New. * gas/i386/avx512bw-wig1-intel.d: New. * gas/i386/avx512bw-wig1.d: New. * gas/i386/avx512bw.d: New. * gas/i386/avx512bw.s: New. * gas/i386/avx512bw_vl-intel.d: New. * gas/i386/avx512bw_vl-opts-intel.d: New. * gas/i386/avx512bw_vl-opts.d: New. * gas/i386/avx512bw_vl-opts.s: New. * gas/i386/avx512bw_vl-wig.s: New. * gas/i386/avx512bw_vl-wig1-intel.d: New. * gas/i386/avx512bw_vl-wig1.d: New. * gas/i386/avx512bw_vl.d: New. * gas/i386/avx512bw_vl.s: New. * gas/i386/i386.exp: Run new AVX-512 tests. * gas/i386/x86-64-avx512bw-intel.d: New. * gas/i386/x86-64-avx512bw-opts-intel.d: New. * gas/i386/x86-64-avx512bw-opts.d: New. * gas/i386/x86-64-avx512bw-opts.s: New. * gas/i386/x86-64-avx512bw-wig.s: New. * gas/i386/x86-64-avx512bw-wig1-intel.d: New. * gas/i386/x86-64-avx512bw-wig1.d: New. * gas/i386/x86-64-avx512bw.d: New. * gas/i386/x86-64-avx512bw.s: New. * gas/i386/x86-64-avx512bw_vl-intel.d: New. * gas/i386/x86-64-avx512bw_vl-opts-intel.d: New. * gas/i386/x86-64-avx512bw_vl-opts.d: New. * gas/i386/x86-64-avx512bw_vl-opts.s: New. * gas/i386/x86-64-avx512bw_vl-wig.s: New. * gas/i386/x86-64-avx512bw_vl-wig1-intel.d: New. * gas/i386/x86-64-avx512bw_vl-wig1.d: New. * gas/i386/x86-64-avx512bw_vl.d: New. * gas/i386/x86-64-avx512bw_vl.s: New. opcodes/ * i386-dis-evex.h: Add new instructions (prefixes bellow). * i386-dis.c (fetch_data): Add EdqwS, Edb, Edw, MaskBDE. (enum): Add dqw_swap_mode, db_mode, dw_mode, mask_bd_mode, REG_EVEX_0F71. (PREFIX enum): Add PREFIX_VEX_0F4A, PREFIX_VEX_0F99, PREFIX_VEX_0F3A31, PREFIX_VEX_0F3A33, PREFIX_EVEX_0F60, PREFIX_EVEX_0F61, PREFIX_EVEX_0F63, PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68, PREFIX_EVEX_0F69, PREFIX_EVEX_0F6B, PREFIX_EVEX_0F71_REG_2, PREFIX_EVEX_0F71_REG_4, PREFIX_EVEX_0F71_REG_6, PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_7, PREFIX_EVEX_0F74, PREFIX_EVEX_0F75, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5, PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA, PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE, PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3, PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8, PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC, PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1, PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8, PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD, PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B, PREFIX_EVEX_0F3810, PREFIX_EVEX_0F381C, PREFIX_EVEX_0F381D, PREFIX_EVEX_0F3820, PREFIX_EVEX_0F3826, PREFIX_EVEX_0F382B, PREFIX_EVEX_0F3830, PREFIX_EVEX_0F3838, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E, PREFIX_EVEX_0F3866, PREFIX_EVEX_0F3875, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879, PREFIX_EVEX_0F387A, PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387D, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F3A0F, PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15, PREFIX_EVEX_0F3A20, PREFIX_EVEX_0F3A3E, PREFIX_EVEX_0F3A3F, PREFIX_EVEX_0F3A42. (VEX_LEN enum): Add VEX_LEN_0F41_P_2, VEX_LEN_0F42_P_2, VEX_LEN_0F44_P_2, VEX_LEN_0F45_P_2, VEX_LEN_0F46_P_2, VEX_LEN_0F47_P_2, VEX_LEN_0F4A_P_0, VEX_LEN_0F4A_P_2, VEX_LEN_0F4B_P_0, VEX_LEN_0F90_P_2, VEX_LEN_0F91_P_2, VEX_LEN_0F92_P_3, VEX_LEN_0F93_P_3, VEX_LEN_0F98_P_2, VEX_LEN_0F99_P_0, VEX_LEN_0F99_P_2, VEX_LEN_0F3A31_P_2, VEX_LEN_0F3A33_P_2, VEX_W_0F41_P_2_LEN_1, VEX_W_0F42_P_2_LEN_1, VEX_W_0F44_P_2_LEN_0, VEX_W_0F45_P_2_LEN_1, VEX_W_0F46_P_2_LEN_1, VEX_W_0F47_P_2_LEN_1, VEX_W_0F4A_P_0_LEN_1, VEX_W_0F4A_P_2_LEN_1, VEX_W_0F4B_P_0_LEN_1, VEX_W_0F90_P_2_LEN_0, VEX_W_0F91_P_2_LEN_0, VEX_W_0F92_P_3_LEN_0, VEX_W_0F93_P_3_LEN_0, VEX_W_0F98_P_2_LEN_0, VEX_W_0F99_P_0_LEN_0, VEX_W_0F99_P_2_LEN_0, VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A33_P_2_LEN_0. (VEX_W enum): Add EVEX_W_0F6B_P_2, EVEX_W_0F6F_P_3, EVEX_W_0F7F_P_3, EVEX_W_0F3810_P_1, EVEX_W_0F3810_P_2, EVEX_W_0F3811_P_2, EVEX_W_0F3812_P_2, EVEX_W_0F3820_P_1, EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2, EVEX_W_0F3828_P_1, EVEX_W_0F3829_P_1, EVEX_W_0F382B_P_2, EVEX_W_0F3830_P_1, EVEX_W_0F3866_P_2, EVEX_W_0F3875_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F387A_P_2, EVEX_W_0F387B_P_2, EVEX_W_0F387D_P_2, EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2, EVEX_W_0F3A3F_P_2, EVEX_W_0F3A42_P_2. (prefix_table): Add entries for new instructions. (vex_table) : Ditto. (vex_len_table): Ditto. (vex_w_table): Ditto. (intel_operand_size): Add db_mode, dw_mode, dqw_swap_mode, mask_bd_mode handling. (OP_E_register): Add dqw_swap_mode, dw_mode, db_mode, mask_bd_mode handling. (OP_E_memory): Add dqw_mode, dw_mode, dqw_swap_mode, dqb_mode, db_mode handling. (OP_G): Add db_mode, dw_mode, dqw_swap_mode, mask_bd_mode handling. (OP_EX): Add dqw_swap_mode handling. (OP_VEX): Add mask_bd_mode handling. (OP_Mask): Add mask_bd_mode handling. * i386-gen.c (cpu_flag_init): Add CPU_AVX512BW_FLAGS. (cpu_flags): Add CpuAVX512BW. * i386-init.h: Regenerated. * i386-opc.h (CpuAVX512BW): New. (i386_cpu_flags): Add cpuavx512bw. * i386-opc.tbl: Add AVX512BW instructions. * i386-tbl.h: Regenerate.
2014-07-22Add support for AVX512VL. Add AVX512VL versions of AVX512F instructions.Ilya Tocar1-8/+12
gas/ * config/tc-i386.c (cpu_arch): Add .avx512vl, CPU_AVX512VL_FLAGS. (build_vex_prefix): Don't abort on VEX.W. (check_VecOperands): Support BROADCAST_1TO4 and BROADCAST_1TO2. (check_VecOperations): Ditto. * doc/c-i386.texi: Document avx512vl/.avx512vl. gas/testsuite/ * gas/i386/avx512f_vl-intel.d: New. * gas/i386/avx512f_vl-opts-intel.d: New. * gas/i386/avx512f_vl-opts.d: New. * gas/i386/avx512f_vl-opts.s: New. * gas/i386/avx512f_vl-wig.s: New. * gas/i386/avx512f_vl-wig1-intel.d: New. * gas/i386/avx512f_vl-wig1.d: New. * gas/i386/avx512f_vl.d: New. * gas/i386/avx512f_vl.s: New. * gas/i386/i386.exp: Run new AVX-512 tests. * gas/i386/x86-64-avx512f_vl-intel.d: New. * gas/i386/x86-64-avx512f_vl-opts-intel.d: New. * gas/i386/x86-64-avx512f_vl-opts.d: New. * gas/i386/x86-64-avx512f_vl-opts.s: New. * gas/i386/x86-64-avx512f_vl-wig.s: New. * gas/i386/x86-64-avx512f_vl-wig1-intel.d: New. * gas/i386/x86-64-avx512f_vl-wig1.d: New. * gas/i386/x86-64-avx512f_vl.d: New. * gas/i386/x86-64-avx512f_vl.s: New. opcodes/ * i386-dis.c (intel_operand_size): Support 128/256 length in vex_vsib_q_w_dq_mode. (OP_E_memory): Add ymmq_mode handling, handle new broadcast. * i386-gen.c (cpu_flag_init): Add CPU_AVX512VL_FLAGS. (cpu_flags): Add CpuAVX512VL. * i386-init.h: Regenerated. * i386-opc.h (CpuAVX512VL): New. (i386_cpu_flags): Add cpuavx512vl. (BROADCAST_1TO4, BROADCAST_1TO2): Define. * i386-opc.tbl: Add AVX512VL instructions. * i386-tbl.h: Regenerate.
2014-07-17Properly handle EVEX register aliasesIlya Tocar1-0/+2
gas/ * config/tc-i386.c (parse_register): Set need_vrex. gas/testsuite/ * gas/i386/x86-64-equ.d: New. * gas/i386/x86-64-equ.s: New. * gas/i386/i386.exp: Run x86-64-equ.
2014-06-16Report an error on x86 pcrel BFD_RELOC_SIZE64Alan Modra1-2/+5
* config/tc-i386.c (reloc): Don't avoid pcrel check for BFD_RELOC_SIZE64. Return NO_RELOC on failing pcrel check.
2014-05-19Extend the fix already created for PR 16858 so that it works with x86 PE ↵Nick Clifton1-0/+10
targets as well. PR gas/16858 * config/tc-i386.c (md_apply_fix): Improve the detection of code symbols for 32-bit PE targets.
2014-04-28This fixes a bootstrapping problem with gcc 4.9 in an x86 PE environment.Nick Clifton1-1/+4
The problem was that references to weak function symbols were being incorrectly biased by definition's offset. PR gas/16858 * config/tc-i386.c (md_apply_fix): Do not adjust value of pc-relative fixes against weak symbols.
2014-04-09gas TC_PARSE_CONS_EXPRESSION communication with TC_CONS_FIX_NEWAlan Modra1-6/+7
A number of targets pass extra information from TC_PARSE_CONS_EXPRESSION to TC_CONS_FIX_NEW via static variables. That's OK, but not best practice. tc-ppc.c goes further in implementing its own replacement for cons(), because the generic one doesn't allow relocation modifiers on constants. This patch fixes both of these warts. * gas/config/tc-alpha.h (TC_CONS_FIX_NEW): Add RELOC parameter. * gas/config/tc-arc.c (arc_cons_fix_new): Add reloc parameter. * gas/config/tc-arc.h (arc_cons_fix_new): Update prototype. (TC_CONS_FIX_NEW): Add RELOC parameter. * gas/config/tc-arm.c (cons_fix_new_arm): Similarly * gas/config/tc-arm.h (cons_fix_new_arm, TC_CONS_FIX_NEW): Similarly. * gas/config/tc-cr16.c (cr16_cons_fix_new): Similarly. * gas/config/tc-cr16.h (cr16_cons_fix_new, TC_CONS_FIX_NEW): Similarly. * gas/config/tc-crx.h (TC_CONS_FIX_NEW): Similarly. * gas/config/tc-m32c.c (m32c_cons_fix_new): Similarly. * gas/config/tc-m32c.h (m32c_cons_fix_new, TC_CONS_FIX_NEW): Similarly. * gas/config/tc-mn10300.c (mn10300_cons_fix_new): Similarly. * gas/config/tc-mn10300.h (mn10300_cons_fix_new, TC_CONS_FIX_NEW): Similarly. * gas/config/tc-ns32k.c (cons_fix_new_ns32k): Similarly. * gas/config/tc-ns32k.h (cons_fix_new_ns32k): Similarly. * gas/config/tc-pj.c (pj_cons_fix_new_pj): Similarly. * gas/config/tc-pj.h (pj_cons_fix_new_pj, TC_CONS_FIX_NEW): Similarly. * gas/config/tc-rx.c (rx_cons_fix_new): Similarly. * gas/config/tc-rx.h (rx_cons_fix_new, TC_CONS_FIX_NEW): Similarly. * gas/config/tc-sh.c (sh_cons_fix_new): Similarly. * gas/config/tc-sh.h (sh_cons_fix_new, TC_CONS_FIX_NEW): Similarly. * gas/config/tc-tic54x.c (tic54x_cons_fix_new): Similarly. * gas/config/tc-tic54x.h (tic54x_cons_fix_new, TC_CONS_FIX_NEW): Similarly. * gas/config/tc-tic6x.c (tic6x_cons_fix_new): Similarly. * gas/config/tc-tic6x.h (tic6x_cons_fix_new, TC_CONS_FIX_NEW): Similarly. * gas/config/tc-arc.c (arc_parse_cons_expression): Return reloc. * gas/config/tc-arc.h (arc_parse_cons_expression): Update proto. * gas/config/tc-avr.c (exp_mod_data): Make global. (pexp_mod_data): Delete. (avr_parse_cons_expression): Return exp_mod_data pointer. (avr_cons_fix_new): Add exp_mod_data_t pointer param. (exp_mod_data_t): Move typedef.. * gas/config/tc-avr.h: ..to here. (exp_mod_data): Declare. (TC_PARSE_CONS_RETURN_TYPE, TC_PARSE_CONS_RETURN_NONE): Define. (avr_parse_cons_expression, avr_cons_fix_new): Update prototype. (TC_CONS_FIX_NEW): Update. * gas/config/tc-hppa.c (hppa_field_selector): Delete static var. (cons_fix_new_hppa): Add hppa_field_selector param. (fix_new_hppa): Adjust. (parse_cons_expression_hppa): Return field selector. * gas/config/tc-hppa.h (parse_cons_expression_hppa): Update proto. (cons_fix_new_hppa): Likewise. (TC_PARSE_CONS_RETURN_TYPE, TC_PARSE_CONS_RETURN_NONE): Define. * gas/config/tc-i386.c (got_reloc): Delete static var. (x86_cons_fix_new): Add reloc param. (x86_cons): Return got reloc. * gas/config/tc-i386.h (x86_cons, x86_cons_fix_new): Update proto. (TC_CONS_FIX_NEW): Add RELOC param. * gas/config/tc-ia64.c (ia64_cons_fix_new): Add reloc param. Adjust calls. * gas/config/tc-ia64.h (ia64_cons_fix_new): Update prototype. (TC_CONS_FIX_NEW): Add reloc param. * gas/config/tc-microblaze.c (parse_cons_expression_microblaze): Return reloc. (cons_fix_new_microblaze): Add reloc param. * gas/config/tc-microblaze.h: Formatting. (parse_cons_expression_microblaze): Update proto. (cons_fix_new_microblaze): Likewise. * gas/config/tc-nios2.c (nios2_tls_ldo_reloc): Delete static var. (nios2_cons): Return ldo reloc. (nios2_cons_fix_new): Delete. * gas/config/tc-nios2.h (nios2_cons): Update prototype. (nios2_cons_fix_new, TC_CONS_FIX_NEW): Delete. * gas/config/tc-ppc.c (md_pseudo_table): Remove quad, long, word, short. Make llong use cons. (ppc_elf_suffix): Return BFD_RELOC_NONE rather than BFD_RELOC_UNUSED. (ppc_elf_cons): Delete. (ppc_elf_parse_cons): New function. (ppc_elf_validate_fix): Don't check for BFD_RELOC_UNUSED. (md_assemble): Use BFD_RELOC_NONE rather than BFD_RELOC_UNUSED. * gas/config/tc-ppc.h (TC_PARSE_CONS_EXPRESSION): Define (ppc_elf_parse_cons): Declare. * gas/config/tc-sparc.c (sparc_cons_special_reloc): Delete static var. (sparc_cons): Return reloc specifier. (cons_fix_new_sparc): Add reloc specifier param. (sparc_cfi_emit_pcrel_expr): Use emit_expr_with_reloc. * gas/config/tc-sparc.h (TC_PARSE_CONS_RETURN_TYPE): Define. (TC_PARSE_CONS_RETURN_NONE): Define. (sparc_cons, cons_fix_new_sparc): Update prototype. * gas/config/tc-v850.c (hold_cons_reloc): Delete static var. (v850_reloc_prefix): Use BFD_RELOC_NONE rather than BFD_RELOC_UNUSED. (md_assemble): Likewise. (parse_cons_expression_v850): Return reloc. (cons_fix_new_v850): Add reloc parameter. * gas/config/tc-v850.h (parse_cons_expression_v850): Update proto. (cons_fix_new_v850): Likewise. * gas/config/tc-vax.c (vax_cons_special_reloc): Delete static var. (vax_cons): Return reloc. (vax_cons_fix_new): Add reloc parameter. * gas/config/tc-vax.h (vax_cons, vax_cons_fix_new): Update proto. * gas/config/tc-xstormy16.c (xstormy16_cons_fix_new): Add reloc param. * gas/config/tc-xstormy16.h (xstormy16_cons_fix_new): Update proto. * gas/dwarf2dbg.c (TC_PARSE_CONS_RETURN_NONE): Provide default. (emit_fixed_inc_line_addr): Adjust exmit_expr_fix calls. * gas/read.c (TC_PARSE_CONS_EXPRESSION): Return value. (do_parse_cons_expression): Adjust. (cons_worker): Pass return value from TC_PARSE_CONS_EXPRESSION to emit_expr_with_reloc. (emit_expr_with_reloc): New function handling reloc, mostly extracted from.. (emit_expr): ..here. (emit_expr_fix): Add reloc param. Adjust TC_CONS_FIX_NEW invocation. Handle reloc. (parse_mri_cons): Convert to ISO. * gas/read.h (TC_PARSE_CONS_RETURN_TYPE): Define. (TC_PARSE_CONS_RETURN_NONE): Define. (emit_expr_with_reloc): Declare. (emit_expr_fix): Update prototype. * gas/write.c (write_object_file): Update TC_CONS_FIX_NEW invocation.
2014-04-04Add support for Intel SGX instructionsIlya Tocar1-0/+2
Add Intel SGX instructions support to assembler and disassembler. gas/ * config/tc-i386.c (cpu_arch): Add .se1. * doc/c-i386.texi: Document .se1/se1. gas/testsuite/ * gas/i386/i386.exp: Run SE1 tests. * gas/i386/se1.d: New file. * gas/i386/se1.s: Ditto. * gas/i386/x86-64-se1.d: Ditto. * gas/i386/x86-64-se1.s: Ditto. opcodes/ * i386-dis.c (rm_table): Add encls, enclu. * i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS, (cpu_flags): Add CpuSE1. * i386-opc.h (enum): Add CpuSE1. (i386_cpu_flags): Add cpuse1. * i386-opc.tbl: Add encls, enclu. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2014-03-13Add pe/x86_64 bigobj file format.Tristan Gingold1-1/+23
bfd/ * peicode.h (pe_ILF_object_p): Adjust, as the version number has been read. (pe_bfd_object_p): Also read version number to detect ILF. * pe-x86_64.c (COFF_WITH_PE_BIGOBJ): Define. (x86_64pe_bigobj_vec): Define * coffcode.h (bfd_coff_backend_data): Add _bfd_coff_max_nscns field. (bfd_coff_max_nscns): New macro. (coff_compute_section_file_positions): Use unsigned int for target_index. Compare with bfd_coff_max_nscns. (bfd_coff_std_swap_table, ticoff0_swap_table, ticoff1_swap_table): Set a value for _bfd_coff_max_nscns. (header_bigobj_classid): New constant. (coff_bigobj_swap_filehdr_in, coff_bigobj_swap_filehdr_out) (coff_bigobj_swap_sym_in, coff_bigobj_swap_sym_out) (coff_bigobj_swap_aux_in, coff_bigobj_swap_aux_out): New functions. (bigobj_swap_table): New table. * libcoff.h: Regenerate. * coff-sh.c (bfd_coff_small_swap_table): Likewise. * coff-alpha.c (alpha_ecoff_backend_data): Add value for _bfd_coff_max_nscns. * coff-mips.c (mips_ecoff_backend_data): Likewise. * coff-rs6000.c (bfd_xcoff_backend_data) (bfd_pmac_xcoff_backend_data): Likewise. * coff64-rs6000.c (bfd_xcoff_backend_data) (bfd_xcoff_aix5_backend_data): Likewise. * targets.c (x86_64pe_bigobj_vec): Declare. * configure.in (x86_64pe_bigobj_vec): New vector. * configure: Regenerate. * config.bfd: Add bigobj object format for Windows targets. gas/ * config/tc-i386.c (use_big_obj): Declare. (OPTION_MBIG_OBJ): Define. (md_longopts): Add -mbig-obj option. (md_parse_option): Handle it. (md_show_usage): Display help for this option. (i386_target_format): Use bigobj for x86-64 if -mbig-obj. * doc/c-i386.texi: Document the option. gas/testsuite/ * gas/pe/big-obj.d, gas/pe/big-obj.s: Add test. * gas/pe/pe.exp: Add test. include/coff/ * pe.h (struct external_ANON_OBJECT_HEADER_BIGOBJ): Declare. (FILHSZ_BIGOBJ): Define. (struct external_SYMBOL_EX): Declare. (SYMENT_BIGOBJ, SYMESZ_BIGOBJ): Define. (union external_AUX_SYMBOL_EX): Declare. (AUXENT_BIGOBJ, AUXESZ_BIGOBJ): Define. * internal.h (struct internal_filehdr): Change type of f_nscns.
2014-03-05Update copyright yearsAlan Modra1-4/+1
2014-02-21Add support for CPUID PREFETCHWT1Ilya Tocar1-0/+2
Latest AVX512 spec http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf Has CPUID PREFETCHWT1 for prefetchwt1 instruction, which we list as AVX512PF. This patch introduces CPUID PREFETCHWT1. gas/ * config/tc-i386.c (cpu_arch): Add .prefetchwt1. * doc/c-i386.texi: Document .prefetchwt1/prefetchwt1. opcodes/ * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/ (cpu_flags): Add CpuPREFETCHWT1. * i386-init.h: Regenerate. * i386-opc.h (CpuPREFETCHWT1): New. (i386_cpu_flags): Add cpuprefetchwt1. * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1. * i386-tbl.h: Regenerate. gas/testsuite * gas/i386/avx512pf-intel.d: Remove prefetchwt1. * gas/i386/avx512pf.s: Ditto. * gas/i386/avx512pf.d: Ditto. * gas/i386/x86-64-avx512pf-intel.d: Ditto. * gas/i386/x86-64-avx512pf.s: Ditto. * gas/i386/x86-64-avx512pf.d: Ditto. * gas/i386/prefetchwt1-intel.d: New file. * gas/i386/prefetchwt1.s: Ditto. * gas/i386/prefetchwt1.d: Ditto. * gas/i386/x86-64-prefetchwt1-intel.d: Ditto. * gas/i386/x86-64-prefetchwt1.s: Ditto. * gas/i386/x86-64-prefetchwt1.d: Ditto.
2014-02-12Add clflushopt, xsaves, xsavec, xrstorsIlya Tocar1-0/+6
gas/ 2014-02-12 Ilya Tocar <ilya.tocar@intel.com> * config/tc-i386.c (cpu_arch): Add .clflushopt, .xsavec, .xsaves. * doc/c-i386.texi: Document .xsavec/xsavec/.xsaves/xsaves/ clflushopt/.clfushopt. gas/testsuite/ 2014-02-12 Ilya Tocar <ilya.tocar@intel.com> * gas/i386/clflushopt-intel.d: New. * gas/i386/clflushopt.d: Ditto. * gas/i386/clflushopt.s: Ditto. * gas/i386/i386.exp: Run new tests. * gas/i386/x86-64-clflushopt-intel.d: New. * gas/i386/x86-64-clflushopt.d: Ditto. * gas/i386/x86-64-clflushopt.s: Ditto. * gas/i386/x86-64-xsavec-intel.d: Ditto. * gas/i386/x86-64-xsavec.d: Ditto. * gas/i386/x86-64-xsavec.s: Ditto. * gas/i386/x86-64-xsaves-intel.d: Ditto. * gas/i386/x86-64-xsaves.d: Ditto. * gas/i386/x86-64-xsaves.s: Ditto. * gas/i386/xsavec-intel.d: Ditto. * gas/i386/xsavec.d: Ditto. * gas/i386/xsavec.s: Ditto. * gas/i386/xsaves-intel.d: Ditto. * gas/i386/xsaves.d: Ditto. * gas/i386/xsaves.s: Ditto. opcodes/ 2014-02-12 Ilya Tocar <ilya.tocar@intel.com> * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4, MOD_0FC7_REG_5. (PREFIX enum): Add PREFIX_0FAE_REG_7. (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5. (prefix_table): Add clflusopt. (mod_table): Add xrstors, xsavec, xsaves. * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS, CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS. (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC. * i386-init.h: Regenerate. * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves, xsaves64, xsavec, xsavec64. * i386-tbl.h: Regenerate.
2014-01-22Remove regzmm from AVX2 gather assertMichael Zolotukhin1-4/+2
Since regzmm can't be used in AVX2 gather instructions, there is no need to check regzmm in AVX2 gather assert. 2014-01-22 Michael Zolotukhin <michael.v.zolotukhin@gmail.com> * config/tc-i386.c (check_VecOperands): Remove regzmm from AVX2 gather assert.
2014-01-22Add check for invalid register in AVX512 gathersMichael Zolotukhin1-0/+16
AVX512 gather instructions shouldn't accept the same register for both destination and index. gas/ 2014-01-22 Michael Zolotukhin <michael.v.zolotukhin@gmail.com> PR gas/16489 * config/tc-i386.c (check_VecOperands): Add check for invalid register set in AVX512 gathers. gas/testsuite/ 2014-01-22 Michael Zolotukhin <michael.v.zolotukhin@gmail.com> PR gas/16489 * gas/i386/vgather-check.s: Add tests for AVX512 gathers. * gas/i386/x86-64-vgather-check.s: Likewise. * gas/i386/vgather-check-error.l: Update correspondingly. * gas/i386/vgather-check-none.d: Likewise. * gas/i386/vgather-check-warn.d: Likewise. * gas/i386/vgather-check-warn.e: Likewise. * gas/i386/vgather-check.d: Likewise. * gas/i386/x86-64-vgather-check-error.l: Likewise. * gas/i386/x86-64-vgather-check-none.d: Likewise. * gas/i386/x86-64-vgather-check-warn.d: Likewise. * gas/i386/x86-64-vgather-check-warn.e: Likewise. * gas/i386/x86-64-vgather-check.d: Likewise.
2014-01-08Remove regbnd and vec_disp8H.J. Lu1-3/+1
* config/tc-i386.c (regbnd): Removed. (vec_disp8): Likewise.
2013-11-18Add a dummy "int bnd_prefix" argumentH.J. Lu1-2/+3
* config/tc-i386.c (lex_got): Add a dummy "int bnd_prefix" argument.
2013-11-17Add R_X86_64_PC32_BND and R_X86_64_PLT32_BNDH.J. Lu1-13/+42
bfd/ * elf64-x86-64.c (x86_64_elf_howto_table): Add R_X86_64_PC32_BND and R_X86_64_PLT32_BND. (R_X86_64_standard): Replace R_X86_64_RELATIVE64 with R_X86_64_PLT32_BND. (IS_X86_64_PCREL_TYPE): Add R_X86_64_PLT32_BND. (x86_64_reloc_map): Add BFD_RELOC_X86_64_PC32_BND and BFD_RELOC_X86_64_PLT32_BND. (elf_x86_64_check_relocs): Handle R_X86_64_PC32_BND and R_X86_64_PLT32_BND. (elf_x86_64_gc_sweep_hook): Likewise. (elf_x86_64_relocate_section): Likewise. * reloc.c (bfd_reloc_code_real): Add BFD_RELOC_X86_64_PC32_BND and BFD_RELOC_X86_64_PLT32_BND. * bfd-in2.h: Regenerated. * libbfd.h: Likewise. gas/ * config/tc-i386.c (reloc): Add an argument, bnd_prefix, to indicate if instruction has the BND prefix. Return BFD_RELOC_X86_64_PC32_BND instead of BFD_RELOC_32_PCREL if bnd_prefix isn't zero. (output_branch): Pass BFD_RELOC_X86_64_PC32_BND to frag_var if needed. (output_jump): Update reloc call. (output_interseg_jump): Likewise. (output_disp): Likewise. (output_imm): Likewise. (x86_cons_fix_new): Likewise. (lex_got): Add an argument, bnd_prefix, to indicate if instruction has the BND prefix. Use BFD_RELOC_X86_64_PLT32_BND if needed. (x86_cons): Update lex_got call. (i386_immediate): Likewise. (i386_displacement): Likewise. (md_apply_fix): Handle BFD_RELOC_X86_64_PC32_BND and BFD_RELOC_X86_64_PLT32_BND. (tc_gen_reloc): Likewise. * config/tc-i386-intel.c (i386_operator): Update lex_got call. gas/testsuite/ * gas/i386/i386.exp: Run x86-64-mpx-branch-1 and x86-64-mpx-branch-2 on 64-bit ELF targets. * gas/i386/x86-64-mpx-branch-1.d: New file. * gas/i386/x86-64-mpx-branch-1.s: Likewise. * gas/i386/x86-64-mpx-branch-2.d: Likewise. * gas/i386/x86-64-mpx-branch-2.s: Likewise. include/elf/ * x86-64.h: Add R_X86_64_PC32_BND and R_X86_64_PLT32_BND. ld/testsuite/ * ld-x86-64/mpx.exp: New file. * ld-x86-64/mpx1.out: Likewise. * ld-x86-64/mpx1a.c: Likewise. * ld-x86-64/mpx1a.rd: Likewise. * ld-x86-64/mpx1b.c: Likewise. * ld-x86-64/mpx1c.c: Likewise. * ld-x86-64/mpx1c.rd: Likewise.
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