aboutsummaryrefslogtreecommitdiff
path: root/gas/config/tc-i386.c
AgeCommit message (Expand)AuthorFilesLines
2012-10-09Add AMD bdver3 support.Nagajyothi Eggone1-0/+2
2012-09-20Replace CpuSSE3 with CpuCX16 for cmpxchg16bH.J. Lu1-0/+2
2012-08-17Add AMD btver1 and btver2 supportH.J. Lu1-1/+7
2012-08-14Terminate register name when reporting bad registerH.J. Lu1-0/+6
2012-08-07Despite them being ignored by the CPU, gas issues segment overrideJan Beulich1-10/+6
2012-08-07The VGATHER group of instructions requires that all three involvedJan Beulich1-29/+84
2012-08-07There were several cases where the registers in the REX encoded rangeJan Beulich1-23/+25
2012-08-07 * config/tc-i386.c (lex_got): Provide implementation for PENick Clifton1-0/+103
2012-07-31The current error message for bad imm4 operands wasn't really helpful,Jan Beulich1-1/+1
2012-07-31Since the word to byte register conversion isn't active for x86-64Jan Beulich1-13/+9
2012-07-31At the point where check_VecOperands()/VEX_check_operands() get run,Jan Beulich1-8/+8
2012-07-16Implement RDRSEED, ADX and PRFCHW instructionsH.J. Lu1-0/+6
2012-06-22gas/Roland McGrath1-3/+3
2012-06-13Fix .dc.a for x32H.J. Lu1-0/+11
2012-05-12Remove x32 addend overflow for BFD_RELOC_64H.J. Lu1-19/+0
2012-05-11Use int and bfd_signed_vma in x32 addend overflow checkH.J. Lu1-3/+5
2012-05-10Display signed hex number in x32 addend overflow checkH.J. Lu1-4/+11
2012-05-10Use fits_in_signed_long to check x32 addend overflowH.J. Lu1-2/+1
2012-05-10Check 64-bit relocation addend overflow for x32H.J. Lu1-0/+11
2012-05-04Add `instruction' to unsupported error messageH.J. Lu1-1/+1
2012-05-04Reformat output_insnH.J. Lu1-1/+1
2012-05-04Remove the extra VEX checkH.J. Lu1-2/+1
2012-05-04Improve unsupported error messageH.J. Lu1-2/+3
2012-03-13gas/Roland McGrath1-0/+12
2012-02-21Add HLEPrefixNone/HLEPrefixLock/HLEPrefixAny/HLEPrefixReleaseH.J. Lu1-4/+4
2012-02-08Implement Intel Transactional Synchronization ExtensionsH.J. Lu1-4/+72
2012-01-23* configure.tgt (i386-*-nacl*): Match it.Roland McGrath1-5/+6
2012-01-20Add .d8 suffix support to x86 assemblerH.J. Lu1-6/+27
2012-01-13Add vmfuncH.J. Lu1-0/+2
2012-01-062012-01-06 Tristan Gingold <gingold@adacore.com>Tristan Gingold1-6/+18
2011-08-01Check R_X86_64_32 overflow and allow R_X86_64_64 for x32.H.J. Lu1-49/+10
2011-07-22Add initial Intel K1OM support.H.J. Lu1-0/+29
2011-06-292011-06-29 Tristan Gingold <gingold@adacore.com>Tristan Gingold1-27/+13
2011-06-10Support AVX Programming Reference (June, 2011).H.J. Lu1-5/+104
2011-05-122011-05-12 Quentin Neill <quentin.neill@amd.com>Quentin Neill1-5/+5
2011-05-102011-05-10 Quentin Neill <quentin.neill@amd.com>Quentin Neill1-4/+6
2011-04-12Start error message with lower case.H.J. Lu1-19/+19
2011-04-112011-04-11 Kai Tietz <ktietz@redhat.com>Kai Tietz1-1/+1
2011-04-11 * config/tc-i386.c (x86_cons): Define even for non-ELF targets.Nick Clifton1-1/+1
2011-03-29Properly handle multiple operands for x32 quad.H.J. Lu1-8/+8
2011-03-28Support .quad for x32.H.J. Lu1-0/+48
2011-03-28Add support for DragonFlyBSD target.Nick Clifton1-0/+1
2011-03-05Revert the last change.H.J. Lu1-10/+3
2011-03-05Set x86_cie_data_alignment to -4 for x32.H.J. Lu1-3/+10
2011-02-25Don't sign-checking 4-byte relocations for x32.H.J. Lu1-1/+1
2011-02-08Use f32_patt in i386_align_code when tuning for i686.H.J. Lu1-1/+1
2011-02-08Also update cpu_arch_isa_flags for ISA extensions.H.J. Lu1-0/+2
2011-01-262011-01-26 Kai Tietz <kai.tietz@onevision.com>Kai Tietz1-0/+5
2011-01-17Add support for TBM instructions.Quentin Neill1-0/+2
2011-01-16Disallow 64bit relocations in x32 mode.H.J. Lu1-17/+27
generated by cgit v1.1 at 2024-12-13 02:53:19 +0000