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path: root/gas/config/tc-i386.c
AgeCommit message (Expand)AuthorFilesLines
2024-09-11x86: error handling in set_cpu_arch()Jan Beulich1-30/+34
2024-09-06x86/APX: use D for 2-operand CFCMOVccJan Beulich1-1/+7
2024-09-06x86/APX: optimize certain reg-only CFCMOVcc formsJan Beulich1-0/+35
2024-09-02Support ymm rounding control for Intel AVX10.2Haochen Jiang1-56/+64
2024-08-30x86: replace conditional operators used to calculate booleansJan Beulich1-10/+11
2024-08-30x86: limit RegRex64 useJan Beulich1-9/+7
2024-08-28x86: Report invalid TLS operatorH.J. Lu1-2/+2
2024-08-27x86: Report invalid TLS relocation nameH.J. Lu1-91/+98
2024-08-27x86: Allow R_386_TLS_LE_32 with KMOVDH.J. Lu1-2/+2
2024-08-23x86: simplify SAE checkingJan Beulich1-12/+10
2024-08-14x86: correct .insn with opcode extension and VEX/XOP/EVEX encodingJan Beulich1-1/+2
2024-07-31x86: move ginsn stuffJan Beulich1-1102/+3
2024-07-26x86: accept whitespace around prefix separatorJan Beulich1-19/+30
2024-07-26x86/APX: optimize certain {nf}-form insns to BMI2 onesJan Beulich1-0/+107
2024-07-19x86: accept whitespace inside curly bracesJan Beulich1-5/+18
2024-07-19x86: undo '{' being a symbol-start characterJan Beulich1-14/+98
2024-07-19x86: split pseudo-prefix state from i386_insnJan Beulich1-196/+197
2024-07-19x86/APX: add CMPcc/CTESTcc cases to noreg64 testsJan Beulich1-11/+29
2024-07-12x86/APX: remove two inconsistenciesJan Beulich1-18/+23
2024-07-12x86/APX: correct TEST/CTESTcc with 1st operand being a memory oneJan Beulich1-4/+8
2024-07-05x86-64: Fix support for APX NF TLS IE with 2 operandsLingling Kong1-3/+2
2024-07-04gas: Enhance arch-specific SFrame configuration descriptionsJens Remus1-0/+5
2024-07-04x86: Remove unused SFrame CFI RA register variableJens Remus1-1/+0
2024-07-04Support APX CFCMOVCui, Lili1-1/+1
2024-07-03x86-64: Support APX NF TLS IE with 2 operandsLingling Kong1-2/+8
2024-06-28x86/APX: apply NDD-to-legacy transformation to further CMOVcc formsJan Beulich1-1/+16
2024-06-28x86/APX: extend TEST-by-imm7 optimization to CTESTccJan Beulich1-2/+8
2024-06-28x86/APX: optimize {nf}-form IMUL-by-power-of-2 to SHLJan Beulich1-0/+70
2024-06-28x86-64: restrict by-imm31 optimizationJan Beulich1-12/+15
2024-06-28x86/APX: optimize certain {nf}-form insns to LEAJan Beulich1-8/+236
2024-06-28x86/APX: optimize {nf}-form rotate-by-width-less-1Jan Beulich1-1/+21
2024-06-28x86/APX: optimize {nf} forms of ADD/SUB with specific immediatesJan Beulich1-1/+83
2024-06-21x86: optimize {,V}PEXTR{D,Q} with immediate of 0Jan Beulich1-0/+38
2024-06-21x86: optimize left-shift-by-1Jan Beulich1-0/+79
2024-06-21x86: %riz, %rip, and %eip don't require REXJan Beulich1-2/+2
2024-06-21x86: don't suppress errors when optimizingJan Beulich1-1/+16
2024-06-18Support APX CCMP and CTESTCui, Lili1-1/+145
2024-06-10x86/APX: convert ZU to operand constraintJan Beulich1-1/+5
2024-05-31x86: reduce check_{byte,word,long,qword}_reg() overheadJan Beulich1-4/+15
2024-05-29x86/Intel: warn about undue mnemonic suffixesJan Beulich1-0/+13
2024-05-29x86/Intel: SHLD/SHRD have dual meaningJan Beulich1-2/+5
2024-05-24x86: simplify VexVVVV_SRC2 handling for the XOP caseJan Beulich1-9/+5
2024-05-24x86: simplify / consolidate check_{word,long,qword}_reg()Jan Beulich1-16/+4
2024-05-24x86: correct VCVT{,U}SI2SDJan Beulich1-5/+47
2024-05-22Support APX zero-upperCui, Lili1-2/+3
2024-05-22X86: Remove "i.rex" to eliminate extra conditional branchCui, Lili1-1/+1
2024-05-22Add check for 8-bit old registers in EVEX formatCui, Lili1-3/+4
2024-05-22x86: Split REX/REX2 old registers judgment.Cui, Lili1-16/+14
2024-05-06x86: Drop using extension_opcode to encode vvvv registerCui, Lili1-6/+3
2024-05-06x86: Drop SwapSourcesCui, Lili1-8/+11