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path: root/gas/config/tc-i386.c
AgeCommit message (Expand)AuthorFilesLines
2010-09-16 PR gas/12011Alan Modra1-2/+2
2010-09-09Check VEXW1 for 2-byte VEX prefix.H.J. Lu1-0/+1
2010-09-03Check flag_code instead of use_rela_relocations for 64bit.H.J. Lu1-2/+2
2010-08-19Fix a typo in comments.H.J. Lu1-1/+1
2010-08-18Check i.imm_operands VEXXDS.H.J. Lu1-3/+3
2010-08-06Re-indent config/tc-i386.c.H.J. Lu1-3/+3
2010-08-06Don't generate multi-byte NOPs for i686.H.J. Lu1-82/+85
2010-08-04Move the first i.error out of the loop.H.J. Lu1-2/+3
2010-07-03Don't call section_symbol() with expr_section.H.J. Lu1-1/+2
2010-07-01Support AVX Programming Reference (June, 2010)H.J. Lu1-0/+8
2010-06-11gas/Jan Beulich1-4/+12
2010-06-10Stop if -march=XXX is invalid.H.J. Lu1-5/+24
2010-06-10gas/Jan Beulich1-45/+10
2010-06-082010-06-08 Quentin Neill <quentin.neill@amd.com>Sebastian Pop1-25/+25
2010-06-032010-06-02 Quentin Neill <quentin.neill@amd.com>Sebastian Pop1-1/+1
2010-04-22Remove i386_is_register.H.J. Lu1-10/+2
2010-04-22Don't use i386_is_register in tc_x86_parse_to_dw2regnum.H.J. Lu1-1/+1
2010-04-22Remove is_intel_syntax from i386_is_register.H.J. Lu1-8/+7
2010-04-21Properly handle ".equ symbol, reg + NUM" in x86 Intel syntax.H.J. Lu1-3/+13
2010-03-22Use STRING_COMMA_LEN to avoid strlen.H.J. Lu1-38/+36
2010-03-22Replace oprand_size_mismatch with operand_size_mismatch.H.J. Lu1-3/+3
2010-03-22Set error instead of err_msg on failure.H.J. Lu1-12/+62
2010-02-25Update x86 assembler error messages.H.J. Lu1-2/+2
2010-02-25Improve x86 assembler error message.H.J. Lu1-25/+42
2010-02-11Reformat build_modrm_byte.H.J. Lu1-6/+10
2010-02-11Update copyright.H.J. Lu1-1/+1
2010-02-112010-02-10 Quentin Neill <quentin.neill@amd.com>Sebastian Pop1-42/+142
2010-02-032010-02-03 Quentin Neill <quentin.neill@amd.com>Sebastian Pop1-5/+5
2010-01-27Allow VL=1 on AVX scalar instructions.H.J. Lu1-1/+25
2010-01-24Set the first 3byte VEX prefix individually.H.J. Lu1-1/+3
2010-01-152010-01-15 Sebastian Pop <sebastian.pop@amd.com>Sebastian Pop1-2/+2
2010-01-062010-01-06 Quentin Neill <quentin.neill@amd.com>Sebastian Pop1-1/+6
2009-12-19Replace VexNDS, VexNDD and VexLWP with VexVVVV.H.J. Lu1-14/+11
2009-12-16Remove ByteOkIntel.H.J. Lu1-7/+15
2009-12-16Replace Vex0F, Vex0F38, Vex0F3A, XOP08, XOP09 and XOP0A with VexOpcode.H.J. Lu1-17/+20
2009-12-16Replace VEX2SOURCES with XOP2SOURCES.H.J. Lu1-1/+1
2009-12-16Replace Vex2Sources and Vex3Sources with VexSources.H.J. Lu1-6/+6
2009-12-16Remove VexW0 and VexW1. Add VexW.H.J. Lu1-5/+5
2009-12-15Define VEX128 and VEX256.H.J. Lu1-1/+1
2009-12-11Add -Wshadow to the gcc command line options used when compiling the binutils.Nick Clifton1-79/+80
2009-12-102009-12-09 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-152/+218
2009-11-182009-11-18 Sebastian Pop <sebastian.pop@amd.com>Sebastian Pop1-3/+1
2009-11-182009-11-17 Sebastian Pop <sebastian.pop@amd.com>Sebastian Pop1-5/+53
2009-11-14Check destination operand for lockable instructions.H.J. Lu1-2/+5
2009-11-142009-11-13 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-1/+1
2009-11-12gas/H.J. Lu1-17/+45
2009-11-122009-11-11 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-12/+16
2009-11-052009-11-05 Sebastian Pop <sebastian.pop@amd.com>Sebastian Pop1-6/+31
2009-10-29gas/H.J. Lu1-8/+0
2009-10-132009-10-13 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-1/+2
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