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path: root/gas/config/tc-i386.c
AgeCommit message (Expand)AuthorFilesLines
2020-09-23Enable support to Intel Keylocker instructionsTerry Guo1-1/+9
2020-08-23PR26513, 629310abec breaks assembling PowerPC Linux kernelsAlan Modra1-10/+16
2020-08-21Rearrange symbol_create parametersAlan Modra1-1/+1
2020-08-20Port gas/config/* to str_htab.Martin Liska1-34/+18
2020-07-30x86: Add {disp16} pseudo prefixH.J. Lu1-13/+37
2020-07-28x86: Handle {disp32} for (%bp)/(%ebp)/(%rbp)H.J. Lu1-2/+10
2020-07-20x86: handle SVR4 escaped binary operatorsJan Beulich1-7/+10
2020-07-20x86: honor absolute section when emitting codeJan Beulich1-32/+76
2020-07-19x86: Change PLT32 reloc against section to PC32H.J. Lu1-4/+15
2020-07-13x86: Remove 32-bit sign extension in offset_in_rangeH.J. Lu1-8/+0
2020-07-11x86: Support GNU_PROPERTY_X86_FEATURE_2_TMMH.J. Lu1-0/+4
2020-07-10x86: Extract extended states from instruction templateH.J. Lu1-73/+54
2020-07-10x86: Add support for Intel AMX instructionsLili Cui1-13/+84
2020-07-09x86: Properly set YMM/ZMM featuresH.J. Lu1-2/+7
2020-07-02x86: Add SwapSourcesH.J. Lu1-4/+2
2020-06-30Remove x86 NaCl target supportH.J. Lu1-1/+0
2020-06-29x86: Support VEX base opcode length > 1H.J. Lu1-6/+2
2020-06-26x86: Process ImmExt without operandsH.J. Lu1-1/+5
2020-06-26x86: Rename VecSIB to SIB for Intel AMXH.J. Lu1-14/+14
2020-06-25x86: move ImmExt processingJan Beulich1-5/+3
2020-06-25x86: operand sizing prefixes can disambiguate insnsJan Beulich1-0/+24
2020-06-25x86-64: REX prefix is invalid with VEX etcJan Beulich1-3/+10
2020-06-25x86-64: honor REX prefixes for SSE2AVXJan Beulich1-28/+37
2020-06-25x86: also refuse data size prefix on SIMD insnsJan Beulich1-3/+7
2020-06-25x86: drop stray assignment from build_evex_prefix()Jan Beulich1-1/+0
2020-06-16x86: Correct noavx512_vp2intersectCui,Lili1-1/+2
2020-06-16x86: drop SSE4a from SSE check againJan Beulich1-1/+0
2020-06-09x86-64: adjust far indirect branch handlingJan Beulich1-1/+3
2020-06-09x86: don't ignore mandatory pseudo prefixesJan Beulich1-23/+47
2020-06-08x86: also handle %k<N> and %bnd<N> in debugging helpersJan Beulich1-1/+3
2020-06-08x86: simplify check_byte_reg()Jan Beulich1-15/+4
2020-06-08x86: restrict %tr<N> visibilityJan Beulich1-2/+8
2020-06-08x86: also allow %st(N) in CFI directivesJan Beulich1-1/+2
2020-06-08x86: restrict use of register aliasesJan Beulich1-65/+95
2020-05-18Don't handle lret/iret when -mlfence-before-ret=[or|not|shl|yes] since they a...liuhongt1-15/+5
2020-04-27x86: Add i386 PE big-object supportTamar Christina1-1/+1
2020-04-26Improve -mlfence-after-loadliuhongt1-32/+88
2020-04-07Add support for intel TSXLDTRK instructions$Cui,Lili1-0/+3
2020-04-02Add support for intel SERIALIZE instructionLiliCui1-0/+3
2020-03-11i386: Generate lfence with load/indirect branch/ret [CVE-2020-0551]H.J. Lu1-1/+365
2020-03-06x86: reduce amount of various VCVT* templatesJan Beulich1-5/+15
2020-03-06x86: drop/replace IgnoreSizeJan Beulich1-5/+9
2020-03-06x86: fold (supposed to be) identical codeJan Beulich1-27/+14
2020-03-06x86: replace NoRex64 on VEX-encoded insnsJan Beulich1-0/+1
2020-03-06x86: drop Rex64 attributeJan Beulich1-3/+5
2020-03-06x86: correct MPX insn w/o base or index encoding in 16-bit modeJan Beulich1-0/+15
2020-03-06x86: refine TPAUSE and UMWAITJan Beulich1-4/+7
2020-03-04x86: support VMGEXITJan Beulich1-0/+2
2020-03-03x86: Replace IgnoreSize/DefaultSize with MnemonicSizeH.J. Lu1-13/+15
2020-03-03x86: Improve -malign-branchHongtao Liu1-32/+133
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