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2015-05-20[AArch64] Sort relocation case labels alphabeticallyJiong Wang1-18/+18
2015-05-19 Jiong. Wang <jiong.wang@arm.com> gas/ * config/tc-aarch64.c (process_movw_reloc_info): Sort relocation case labels alphabetically. (md_apply_fix): Ditto. (aarch64_force_relocation): Ditto.
2015-05-06[AArch64] Record instruction alignment for .inst directiveRenlin Li1-5/+5
2015-05-06 Renlin Li <renlin.li@arm.com> gas/ * config/tc-aarch64.c (mapping_state): Recording alignment before exit. gas/testsuite/ * gas/aarch64/codealign_1.s: New. * gas/aarch64/codealign_1.d: New.
2015-05-05[AARCH64] Positively emit symbols for alignmentRenlin Li1-14/+13
2015-05-05 Renlin Li <renlin.li@arm.com> gas/ * config/tc-aarch64.c (aarch64_init_frag): Always generate mapping symbols. gas/testsuite/ * gas/aarch64/mapping_5.d: New. * gas/aarch64/mapping_5.s: New. * gas/aarch64/mapping_6.d: New. * gas/aarch64/mapping_6.s: New.
2015-04-27[AArch64] Don't try to align insn in non-executale sectionRenlin Li1-12/+10
2015-04-27 Renlin Li <renlin.li@arm.com> gas/ * config/tc-aarch64.c (s_aarch64_inst): Don't align code for non-text section. (md_assemble): Likewise, move the align code outside the loop.
2015-04-24gas thunderx supportJim Wilson1-1/+3
gas/ * config/tc-aarch64.c (aarch64_cpus): Add CRC and CRYPTO features for thunderx.
2015-04-07[AArch64] use subseg_text_p to check .textRenlin Li1-9/+9
2015-04-07 Renlin Li <renlin.li@arm.com> gas/ * config/tc-aarch64.c (mapping_state): Use subseg_text_p. (s_aarch64_inst): Likewise. (md_assemble): Likewise.
2015-04-02[AArch64] Emit DATA_MAP in order within text sectionRenlin Li1-19/+35
2015-03-27 Renlin Li <renlin.li@arm.com> gas/ * config/tc-aarch64.c (mapping_state): Emit MAP_DATA within text section in order. (mapping_state_2): Don't emit MAP_DATA here. (s_aarch64_inst): Align frag during state transition. (md_assemble): Likewise.
2015-04-02Remove unused functions in tc-aarch64.c.Ed Maste1-12/+0
* config/tc-aarch64.c (set_error_kind): Delete. (set_error_message): Delete.
2015-04-01[AArch64] Add support for the Samsung Exynos M1 processorEvandro Menezes1-0/+3
2015-03-26 Evandro Menezes <e.menezes@samsung.com> gas/ * config/tc-aarch64.c: Add support for Samsung Exynos M1. * doc/c-aarch64.texi (-mcpu=): Add "exynos-m1".
2015-03-25[AARCH64]Fix "align directive causes MAP_DATA symbol to be lost"Renlin Li1-16/+16
gas/ChangeLog: 2015-03-25 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (mapping_state): Remove first MAP_DATA emitting code. (mapping_state_2): Emit first MAP_DATA symbol here.
2015-03-13[AArch64] Don't warn on XZR/SP overlapping when it's in load/storeJiong Wang1-0/+2
2015-03-13 Jiong Wang <jiong.wang@arm.com> gas/ * config/tc-aarch64.c (warn_unpredictable_ldst): Don't warn on reg number 31. gas/testsuite/ * gas/aarch64/diagnostic.s: New testcases. * gas/aarch64/diagnostic.l: New error match.
2015-03-10[AArch64] Set the minimum alignment on code segmentsJiong Wang1-1/+8
gas/ 2015-03-10 Matthew Wahab <matthew.wahab@arm.com> * config/tc-aarch64.c (mapping_state): Set minimum alignment for code sections. gas/testsuite 2015-03-10 Matthew Wahab <matthew.wahab@arm.com> * gas/aarch64/codealign.d: Add test for code section alignment. * gas/aarch64/codealign.s: New file.
2015-03-04Allow MOVK for R_AARCH64_TLSLE_MOVW_TPREL_G{0,1}NCRichard Sandiford1-2/+0
bfd/ PR gas/17843 * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Expect R_AARCH64_TLSLE_MOVW_TPREL_G0_NC and R_AARCH64_TLSLE_MOVW_TPREL_G1_NC to be used with MOVK rather than MOVZ. gas/ PR gas/17843 * config/tc-aarch64.c (process_movw_reloc_info): Allow R_AARCH64_TLSLE_MOVW_TPREL_G0_NC and R_AARCH64_TLSLE_MOVW_TPREL_G1_NC for MOVK. gas/testsuite/ PR gas/17843 * gas/aarch64/tls.s, gas/aarch64/tls.d: Add test for R_AARCH64_TLSLE_MOVW_TPREL_G0/R_AARCH64_TLSLE_MOVW_TPREL_G1_NC sequence. ld/testsuite/ PR gas/17843 * ld-aarch64/tlsle.s, ld-aarch64/tlsle.d: New test. * ld-aarch64/aarch64-elf.exp: Run it.
2015-02-26[AArch64] Add support for :tlsdesc: and TLSDESC_LD_PREL19Marcus Shawcroft1-1/+3
2015-02-26[AArch64] Add support for :tlsdesc: and TLSDESC_ADR_PREL21Marcus Shawcroft1-1/+3
2015-02-26Add ADR :tlsgd: directive and TLSGD_ADR_PREL21 support.Marcus Shawcroft1-1/+3
2015-02-26Adding support for TLSIE_LD_GOTTREL_PREL19.Marcus Shawcroft1-1/+3
2015-02-26Adding ld_literal_type.Marcus Shawcroft1-5/+36
Extend the address modifier parsing to distinguish between the modifers used in LDR literal and LDR register offset address modes. The current parser incorrectly accepts the :got: modifier on a register offset instruction resulting in silent corruption of the output binary.
2015-02-26Adding adr_type and prevent adr :got:Marcus Shawcroft1-3/+47
The current implementation of the :got: assembler modifier does not distinguish the ADR and ADRP instruction. The :got: modifier does not make sense on and ADR instruction and should be error'd rather than the current behavior of applying an inappropriate relocation to the output and scrambling the underlying instruction silently.
2015-02-26Remove dead code.Marcus Shawcroft1-3/+0
2015-02-11[AArch64] Fix code formatting in the cpu-tableJiong Wang1-6/+6
2015-02-11 Matthew Wahab <matthew.wahab@arm.com> * config/tc-aarch64.c (aarch64_cpus): Fix code formatting.
2015-02-04[AArch64] Add support for Cortex-A72Jiong Wang1-0/+2
2015-02-04 Matthew Wahab <matthew.wahab@arm.com> * config/tc-aarch64.c (aarch64_cpus): Add support for Cortex-A72. * doc/c-aarch64.texi (-mcpu=): Add "cortex-a72".
2015-01-02ChangeLog rotatation and copyright year updateAlan Modra1-1/+1
2014-11-20[AArch64] Fix mis-detection of unpredictable load/store operations with FP regs.Richard Earnshaw1-6/+13
* config/tc-aarch64.c (warn_unpredictable_ldst): Check that transfer registers are in the GP register set. Adjust warnings. Use correct field member for address register. * testsuite/gas/aarch64/diagnostic.l: Update.
2014-11-19[AArch64] Warn on load pair to same registerJiong Wang1-0/+36
2014-11-19 Ryan Mansfield <rmansfield@qnx.com> * config/tc-aarch64.c (md_assemble): Call warn_unpredictable_ldst. (warn_unpredictable_ldst): New. 2014-11-19 Ryan Mansfield <rmansfield@qnx.com> * gas/aarch64/diagnostic.s: Add new warnings test patterns. * gas/aarch64/diagnostic.l: Update expected diagnostic output.
2014-11-18aarch64: allow adding/removing just feature flags via .arch_extensionJan Beulich1-12/+39
Rather than requiring to always also set/change the base architecture, allow just en-/disabling of architecture extensions, matching what ARM has.
2014-11-18[AArch64] Add xgene2.Philipp Tomsich1-0/+2
2014-11-18[AArch64] Add xgene1.Philipp Tomsich1-0/+4
The name xgene1 superceeds xgene-1. We retain support for the original xgene-1 for compatibility but drop it from documentation.
2014-11-14[AArch64] Enable CRC feature in GAS for cortex-a53 and cortex-a57.Marcus Shawcroft1-3/+5
2014-11-13[AArch64] Remove example processors from GAS.Marcus Shawcroft1-5/+0
2014-10-30Remove the artificial limit on code alignment through the use of theDr Philipp Tomsich1-43/+24
fixed part of a fragment for output generation only, which required MAX_MEM_FOR_RS_ALIGN_CODE to be large enough to hold the maximum pad. * config/tc-aarch64.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define to 7. * config/tc-aarch64.c (aarch64_handle_align): Rewrite to handle large alignments with a constant fragment size of MAX_MEM_FOR_RS_ALIGN_CODE.
2014-10-21[AARCH64] Add thunderx support to gasAndrew Pinski1-0/+1
This patch adds -mcpu=thunderx support to gas. OK? Tested with no regressions. ChangeLog: * config/tc-aarch64.c (aarch64_cpus): Add thunderx. * doc/c-aarch64.texi: Document that thunderx is a valid processor name.
2014-10-21aarch64: move bogus assertionJan Beulich1-12/+14
Asserting "idx" to be non-negative when subsequent code handles this case is bogus. In fact the assertion triggers e.g. when mistakenly using the arm32 comment character @ following an instruction. While doing this I also noticed that despite there being local variables "detail" and "idx", not all places where they could be used did actually make use of them, so this is being adjusted at once. Finally, for the code to be slightly more robust, also change comparisons against -1 to such checking for a (non-)negative value.
2014-09-03[PATCH/AArch64] Generic support for all system registers using mrs and msrJiong Wang1-11/+5
2014-09-03 Jiong Wang <jiong.wang@arm.com> opcode/ * aarch64-tbl.h (aarch64_opcode_table): Update encoding for mrs/msr. * aarch64-dis-2.c: Update auto-generated file. gas/ * config/tc-aarch64.c (parse_sys_reg): Remove the restriction on op0 field. gas/testsuite/ * gas/aarch64/illegal.s: Update testcase. * gas/aarch64/illegal.d: Likewise. * gas/aarch64/sysreg-1.s: Likewise. * gas/aarch64/sysreg-1.d: Likewise.
2014-09-03[PATCH/AArch64] Implement LSE featureJiong Wang1-0/+2
2014-09-03 Jiong Wang <jiong.wang@arm.com> gas/ * config/tc-aarch64.c (parse_operands): Recognize PAIRREG. (aarch64_features): Add entry for lse extension. include/opcode/ * aarch64.h (AARCH64_FEATURE_LSE): New feature added. (aarch64_opnd): Add AARCH64_OPND_PAIRREG. (aarch64_insn_class): Add lse_atomic. (F_LSE_SZ): New field added. (opcode_has_special_coder): Recognize F_LSE_SZ. opcode/ * aarch64-tbl.h (QL_R4NIL): New qualifiers. (aarch64_feature_lse): New feature added. (LSE): New Added. (aarch64_opcode_table): New LSE instructions added. Improve descriptions for ldarb/ldarh/ldar. (aarch64_opcode_table): Describe PAIRREG. * aarch64-opc.h (aarch64_field_kind): Add FLD_lse_sz. * aarch64-opc.c (fields): Add entry for F_LSE_SZ. (aarch64_print_operand): Recognize PAIRREG. (operand_general_constraint_met_p): Check reg pair constraints for CASP instructions. * aarch64-dis.c (aarch64_ext_regno_pair): New extractor for paired reg. (do_special_decoding): Recognize F_LSE_SZ. * aarch64-asm.c (do_special_encoding): Recognize F_LSE_SZ. gas/testsuite/ * gas/aarch64/lse-atomic.d: New. * gas/aarch64/lse-atomic.s: Likewise. * gas/aarch64/illegal-lse.d: Likewise. * gas/aarch64/illegal-lse.l: Likewise. * gas/aarch64/illegal-lse.s: Likewise. * gas/aarch64/diagnostic.s: Check processor feature detect for lse instruction. * gas/aarch64/diagnostic.l: Likewise.
2014-08-22aarch64: Fix CFA encoding of vector registersRichard Henderson1-1/+4
* config/tc-aarch64.c (tc_aarch64_regname_to_dw2regnum): Fix register number for vector register types.
2014-07-26Prepare gas for 64-bit obstacksAlan Modra1-1/+1
Use size_t in a few places involved with obstacks, and don't include obstack.h in files that don't use obstacks. gas/ * config/bfin-parse.y: Don't include obstack.h. * config/obj-aout.c: Likewise. * config/obj-coff.c: Likewise. * config/obj-som.c: Likewise. * config/tc-bfin.c: Likewise. * config/tc-i960.c: Likewise. * config/tc-rl78.c: Likewise. * config/tc-rx.c: Likewise. * config/tc-tic4x.c: Likewise. * expr.c: Likewise. * listing.c: Likewise. * config/obj-elf.c (elf_file_symbol): Make name_length a size_t. * config/tc-aarch64.c (symbol_locate): Likewise. * config/tc-arm.c (symbol_locate): Likewise. * config/tc-mmix.c (mmix_handle_mmixal): Make len_0 a size_t. * config/tc-score.c (s3_build_score_ops_hsh): Make len a size_t. (s3_build_dependency_insn_hsh): Likewise. * config/tc-score7.c (s7_build_score_ops_hsh): Likewise. (s7_build_dependency_insn_hsh): Likewise. * frags.c (frag_grow): Make parameter a size_t, and use size_t locals. (frag_new): Make parameter a size_t. (frag_var_init): Make max_chars and var parameters size_t. (frag_var, frag_variant): Likewise. (frag_room): Return a size_t. (frag_align_pattern): Make n_fill parameter a size_t. * frags.h: Update function prototypes. * symbols.c (save_symbol_name): Make name_length a size_t.
2014-06-16Fixes a problem exposed by the aarcg64/illegal.s test case - where the ↵Nick Clifton1-0/+4
assembler was generating too many error messages. * config/tc-aarch64.c (md_apply_fix): Ignore unused relocs.
2014-06-16This fixes the aarch64 assembler so that it will generate error messages whenJiong Wang1-9/+33
a syntax error is detected in an optional operand. * config/tc-aarch64.c (END_OF_INSN): New macro. (parse_operands): Handle operand given and be in wrong format when operand is optional. * gas/aarch64/diagnostic.s: New test patterns. * gas/aarch64/diagnostic.l: Likewise.
2014-03-18Enable verbose error messages by default for AArch64 gas.Yufeng Zhang1-3/+5
gas/ * config/tc-aarch64.c (aarch64_opts): Add new option "mno-verbose-error". (verbose_error_p): Initialize to 1. * doc/c-aarch64.texi (AArch64 Options): Document -mverbose-error and -mno-verbose-error. gas/testsuite/ * gas/aarch64/illegal.d: Pass -mno-verbose-error. * gas/aarch64/verbose-error.s: Add more verbose message testcases. * gas/aarch64/verbose-error.l: Ditto.
2014-03-12The value of a bignum expression is held in a single global array. This meansNick Clifton1-12/+49
that if multiple bignum values are encountered only the most recent is valid. If such expressions are cached, eg to be emitted into a literal pool later on in the assembly, then only one expression - the last - will be correct. This patch fixes the problem for the AArch64 target by caching each bignum value locally. PR gas/16688 * config/tc-aarch64.c (literal_expression): New structure. (literal_pool): Replace exp array with literal_expression array. (add_to_lit_pool): When adding a bignum cache the big value. (s_ltorg): When emitting a bignum initialise the global bignum array from the cached value. * gas/aarch64/litpool.s: New test case. * gas/aarch64/litpool.d: Expected disassembly.
2014-03-05Update copyright yearsAlan Modra1-2/+1
2014-01-07[AArch64] Add GAS recognition for "xgene-1"Philipp Tomsich1-0/+1
* config/tc-aarch64.c (aarch64_cpus): Add entry for "xgene-1" This adds support for the AppliedMicro X-Gene 1 processor to the assembler.
2013-12-18gas/Yufeng Zhang1-8/+8
* config/tc-aarch64.c (md_assemble): Defer the feature checking until do_encode () succeeds. gas/testsuite/ * gas/aarch64/rm-simd-ext.d: New file. * gas/aarch64/rm-simd-ext.l: Likewise. * gas/aarch64/rm-simd-ext.s: Likewise.
2013-11-20Revert "Do not issue error messages when parsing a PSTATE register".Yufeng Zhang1-4/+1
This reverts commit 03e621be975dacc9cec9f5782698bdb098f6a49c.
2013-11-19 * config/tc-aarch64.c (parse_sys_reg): Do not issue error messagesNick Clifton1-1/+4
for deprecated system registers when parsing pstate fields.
2013-11-18gas/Yufeng Zhang1-5/+5
* config/tc-aarch64.c (parse_sys_reg): Support S2_<op1>_<Cn>_<Cm>_<op2>. gas/testsuite/ * gas/testsuite/sysreg.s: Add test. * gas/testsuite/sysreg.d: Update.
2013-11-18Revert "Add support for AArch64 trace unit registers."Yufeng Zhang1-33/+8
This reverts commit 75468c93c14e9f14dd9020712538c5303a455876.
2013-11-15gas/Yufeng Zhang1-8/+33
* config/tc-aarch64.c (set_other_error): New function. (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set the variable to which it points with 'o'. (parse_operands): Update; check for write to read-only system registers or read from write-only ones. gas/testsuite/ * gas/aarch64/diagnostic.s: Add tests. * gas/aarch64/diagnostic.l: Update. * gas/aarch64/tracereg-illegal.d: New file. * gas/aarch64/tracereg-illegal.l: Ditto. * gas/aarch64/tracereg-illegal.s: Ditto. * gas/aarch64/tracereg.d: Ditto. * gas/aarch64/tracereg.s: Ditto. include/opcode * aarch64.h (aarch64_sys_reg_readonly_p): New declaration. (aarch64_sys_reg_writeonly_p): Ditto. opcodes/ * aarch64-opc.c (CPENT): New define. (F_READONLY, F_WRITEONLY): Likewise. (aarch64_sys_regs): Add trace unit registers. (aarch64_sys_reg_readonly_p): New function. (aarch64_sys_reg_writeonly_p): Ditto.
2013-11-05gas/Yufeng Zhang1-2/+7
* config/tc-aarch64.c (parse_sys_reg): Update to use aarch64_sys_reg; call aarch64_sys_reg_deprecated_p and warn about the deprecated system registers. gas/testsuite/ * gas/aarch64/deprecated.d: New file. * gas/aarch64/deprecated.l: New file. * gas/aarch64/deprecated.s: New file. * gas/aarch64/sysreg-1.s: Add tests. * gas/aarch64/sysreg-1.d: Add tests. include/opcode/ * aarch64.h (aarch64_sys_reg): New typedef. (aarch64_sys_regs): Change to define with the new type. (aarch64_sys_reg_deprecated_p): Declare. opcodes/ * aarch64-opc.c (F_DEPRECATED): New macro. (aarch64_sys_regs): Update; flag "spsr_svc" and "spsr_hyp" with F_DEPRECATED. (aarch64_print_operand): Call aarch64_sys_reg_deprecated_p on AARCH64_OPND_SYSREG.
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