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2017-01-02Update year range in copyright notice of all files.Alan Modra1-1/+1
2016-10-26Revert "bison warning fixes"Alan Modra1-1/+1
This reverts commit 95e61695c199a07c832153cea25ae9c331d16a3c. People still want to use older versions of bison, apparently. Revert 2016-10-06 Alan Modra <amodra@gmail.com> * config/rl78-parse.y: Do use old %name-prefix syntax. * config/rx-parse.y: Likewise.
2016-10-06bison warning fixesAlan Modra1-1/+1
* config/rl78-parse.y: Don't use deprecated %name-prefix. * config/rx-parse.y: Likewise.
2016-01-01Copyright update for binutilsAlan Modra1-1/+1
2015-12-08rl78: relaxation fixesDJ Delorie1-15/+15
Various fixes to linker relaxation. In general, we need to support relaxing every branch, even if we don't relax it in the assembler, so we can optionally defer relaxation to the linker. * elf32-rl78.c (rl78_offset_for_reloc): Add more relocs. (rl78_elf_relax_section): Add bc/bz/bnc/bnz/bh/bnh. Fix reloc choices. * config/rl78-parse.y: Make all branches relaxable via rl78_linkrelax_branch(). * config/tc-rl78.c (rl78_linkrelax_branch): Mark all relaxable branches with relocs. (options): Add OPTION_NORELAX. (md_longopts): Add -mnorelax. (md_parse_option): Support OPTION_NORELAX. (op_type_T): Add bh, sk, call, and br. (rl78_opcode_type): Likewise. (rl78_relax_frag): Fix not-relaxing logic. Add sk. (md_convert_frag): Fix relocation handling. (tc_gen_reloc): Strip relax relocs when not linker relaxing. (md_apply_fix): Defer overflow handling for anything that needs a PLT, to the linker. * config/tc-rl78.h (TC_FORCE_RELOCATION): Force all relocations to the linker when linker relaxing. * doc/c-rl78.texi (norelax): Add.
2015-08-12Remove trailing spaces in gasH.J. Lu1-1/+1
2015-06-30Add support for SADDR addressing to the RL78 port.Nick Clifton1-27/+25
gas * config/rl78-parse.y: Tag all saddr expressions throughout. (SET_SA): New. (expr_is_saddr): Allow symbolic expressions. * config/tc-rl78.c (md_apply_fix): Handle SADDR. bfd * elf32-rl78.c (rl78_elf_howto_table): Add RH_SADDR. (rl78_reloc_map): Add R_RL78_RH_SADDR. * reloc.c: Add BFD_RELOC_RL78_SADDR. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate.
2015-05-01Fix typos in previous patch.DJ Delorie1-6/+6
* config/rl78-parse.y (MULU): Remove ISA_G14. (MULH, DIVHU, DIVWU, MACHI, MACH): Update error strings.
2015-04-30Make RL78 disassembler and simulator respect ISA for mul/divDJ Delorie1-7/+11
[gas] * config/rl78-defs.h (rl78_isa_g10): New. (rl78_isa_g13): New. (rl78_isa_g14): New. * config/rl78-parse.y (ISA_G10): New. (ISA_G13): New. (ISA_G14): New. (MULHU, MULH, MULU, DIVHU, DIVWU, MACHU, MACH): Use them. * config/tc-rl78.c (rl78_isa_g10): New. (rl78_isa_g13): New. (rl78_isa_g14): New. [gdb] * rl78-tdep.c (rl78_analyze_prologue): Pass RL78_ISA_DEFAULT to rl78_decode_opcode [include] * dis-asm.h (print_insn_rl78_g10): New. (print_insn_rl78_g13): New. (print_insn_rl78_g14): New. (rl78_get_disassembler): New. * opcode/rl78.h (RL78_Dis_Isa): New. (rl78_decode_opcode): Add ISA parameter. [opcodes] * disassemble.c (disassembler): Choose suitable disassembler based on E_ABI. * rl78-decode.opc (rl78_decode_opcode): Take ISA parameter. Use it to decode mul/div insns. * rl78-decode.c: Regenerate. * rl78-dis.c (print_insn_rl78): Rename to... (print_insn_rl78_common): ...this, take ISA parameter. (print_insn_rl78): New. (print_insn_rl78_g10): New. (print_insn_rl78_g13): New. (print_insn_rl78_g14): New. (rl78_get_disassembler): New. [sim] * rl78/cpu.c (g14_multiply): New. * rl78/cpu.h (g14_multiply): New. * rl78/load.c (rl78_load): Decode ISA completely. * rl78/main.c (main): Expand -M to include other ISAs. * rl78/rl78.c (decode_opcode): Decode based on ISA. * rl78/trace.c (rl78_disasm_fn): New. (sim_disasm_init): Reset it. (sim_disasm_one): Get correct disassembler for ISA.
2015-02-04Fix encoding of "addw ax, [hl]" and "subw ax, [hl]".Nick Clifton1-1/+1
* config/rl78-parse.y (addsubw): Fix encoding of [HL] variant of these instructions.
2015-01-02ChangeLog rotatation and copyright year updateAlan Modra1-1/+1
2014-03-20Add opcode relaxation for rl78-elfDJ Delorie1-9/+9
This patch adds initial in-gas opcode relaxation for the rl78 backend. Specifically, it checks for conditional branches that are too far and replaces them with inverted branches around longer fixed branches.
2014-03-05Update copyright yearsAlan Modra1-1/+1
2013-02-25 * rl78-decode.opc: Fix encoding of DIVWU insn.Nick Clifton1-3/+7
* rl78-decode.c: Regenerate. * config/rl78-parse.y: Fix encoding of DIVWU insn.
2012-01-25* rl78-decode.opc (rl78_decode_opcode): Add NOT1.DJ Delorie1-1/+7
* rl78-decode.c: Regenerate. * config/rl78-parse.y (NOT1): Add.
2011-12-23[bfd]DJ Delorie1-48/+104
* elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-11-21* config/rl78-defs.h (rl78_error): Add "const".DJ Delorie1-1/+1
* config/rl78-parse.y (rl78_error): Likewise.
2011-11-02[.]DJ Delorie1-0/+1532
* configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
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