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2020-04-27x86: Add i386 PE big-object supportTamar Christina1-0/+2
The 64-bit version of binutils got support for the PE COFF BIG OBJ format a couple of years ago. The BIG OBJ format is a slightly different COFF format which extends the size of the number of section field in the header from a uint16_t to a uint32_t and so greatly increases the number of sections allowed. However the 32-bit version of bfd never got support for this. The GHC Haskell compiler generates a great deal of symbols due to it's use of -ffunction-sections and -fdata-sections. This meant that we could not build the 32-bit version of the GHC Compiler for many releases now as binutils didn't have this support. This patch adds the support to the 32-bit port of binutils as well and also does come cleanup in the code. bfd/ChangeLog: * coff-i386.c (COFF_WITH_PE_BIGOBJ): New. * coff-x86_64.c (COFF_WITH_PE_BIGOBJ): New. * config.bfd (targ_selvecs): Rename x86_64_pe_be_vec to x86_64_pe_big_vec as it not a big-endian format. (vec i386_pe_big_vec): New. * configure.ac: Likewise. * targets.c: Likewise. * configure: Regenerate. * pe-i386.c (TARGET_SYM_BIG, TARGET_NAME_BIG, COFF_WITH_PE_BIGOBJ): New. * pe-x86_64.c (TARGET_SYM_BIG, TARGET_NAME_BIG): New. (x86_64_pe_be_vec): Moved. gas/ChangeLog: * NEWS: Add news entry for big-obj. * config/tc-i386.c (i386_target_format): Support new format. * doc/c-i386.texi: Add i386 support. * testsuite/gas/pe/big-obj.d: Rename test to not be x64 specific. * testsuite/gas/pe/pe.exp (big-obj): Make test run on i386 as well. ld/ChangeLog: * pe-dll.c (pe_detail_list): Add pe-bigobj-i386.
2020-04-21gas: Extend .symver directiveH.J. Lu1-0/+3
Extend .symver directive to update visibility of the original symbol and assign one original symbol to different versioned symbols: .symver foo, foo@VERS_1, local # Change foo to a local symbol. .symver foo, foo@VERS_2, hidden # Change foo to a hidden symbol. .symver foo, foo@@VERS_3, remove # Remove foo from symbol table. .symver foo, bar@V1 # Assign foo to bar@V1 and baz@V2. .symver foo, baz@V2 PR gas/23840 PR gas/25295 * NEWS: Mention .symver extension. * config/obj-elf.c (obj_elf_find_and_add_versioned_name): New function. (obj_elf_symver): Call obj_elf_find_and_add_versioned_name to add a version name. Add local, hidden and remove visibility support. (elf_frob_symbol): Handle the list of version names. Update the original symbol to local, hidden or remove it from the symbol table. (elf_frob_file_before_adjust): Handle the list of version names. * config/obj-elf.h (elf_visibility): New. (elf_versioned_name_list): Likewise. (elf_obj_sy): Change local to bitfield. Add rename, bad_version and visibility. Change versioned_name pointer to struct elf_versioned_name_list. * doc/as.texi: Update .symver directive. * testsuite/gas/symver/symver.exp: Run all *.d tests. Add more error checking tests. * testsuite/gas/symver/symver6.d: New file. * testsuite/gas/symver/symver7.d: Likewise. * testsuite/gas/symver/symver7.s: Likewise. * testsuite/gas/symver/symver8.d: Likewise. * testsuite/gas/symver/symver8.s: Likewise. * testsuite/gas/symver/symver9.s: Likewise. * testsuite/gas/symver/symver9a.d: Likewise. * testsuite/gas/symver/symver9b.d: Likewise. * testsuite/gas/symver/symver10.s: Likewise. * testsuite/gas/symver/symver10a.d: Likewise. * testsuite/gas/symver/symver10b.d: Likewise. * testsuite/gas/symver/symver11.d: Likewise. * testsuite/gas/symver/symver11.s: Likewise. * testsuite/gas/symver/symver12.d: Likewise. * testsuite/gas/symver/symver12.s: Likewise. * testsuite/gas/symver/symver13.d: Likewise. * testsuite/gas/symver/symver13.s: Likewise. * testsuite/gas/symver/symver14.d: Likewise. * testsuite/gas/symver/symver14.l: Likewise. * testsuite/gas/symver/symver15.d: Likewise. * testsuite/gas/symver/symver15.l: Likewise. * testsuite/gas/symver/symver6.l: Removed. * testsuite/gas/symver/symver6.s: Updated.
2020-04-07gas: Mention support for Intel SERIALIZE and TSXLDTRKH.J. Lu1-0/+2
* NEWS: Mention support for Intel SERIALIZE and TSXLDTRK instructions.
2020-03-11NEWS: Mention x86 assembler options for CVE-2020-0551H.J. Lu1-0/+4
* NEWS: Mention x86 assembler options for CVE-2020-0551.
2020-03-11Add support for generating DWARF-5 format directory and file name tables ↵Nick Clifton1-0/+4
from the assembler. PR 25611 PR 25614 * dwarf.h (DWARF2_Internal_LineInfo): Add li_address_size and li_segment_size fields. * dwarf.c (read_debug_line_header): Record the address size and segment selector size values (if present) in the lineinfo structure. (display_formatted_table): Warn if the format count is empty but the table itself is not empty. Display the format count and entry count at the start of the table dump. (display_debug_lines_raw): Display the address size and segement selector size fields, if present. * testsuite/binutils-all/dw5.W: Update expected output. gas * dwarf2dbg.c (DWARF2_FILE_TIME_NAME): Default to -1. (DWARF2_FILE_SIZE_NAME): Default to -1. (DWARF2_LINE_VERSION): Default to the current dwarf level or 3, whichever is higher. (DWARF2_LINE_MAX_OPS_PER_INSN): Provide a default value of 1. (NUM_MD5_BYTES): Define. (struct file entry): Add md5 field. (get_filenum): Delete and replace with... (get_basename): New function. (get_directory_table_entry): New function. (allocate_filenum): New function. (allocate_filename_to_slot): New function. (dwarf2_where): Use new functions. (dwarf2_directive_filename): Add support for extended .file pseudo-op. (dwarf2_directive_loc): Allow the use of file number zero with DWARF 5 or higher. (out_file_list): Rename to... (out_dir_and_file_list): Add DWARF 5 support. (out_debug_line): Emit extra values into the section header for DWARF 5. (out_debug_str): Allow for file 0 to be used with DWARF 5. * doc/as.texi (.file): Update the description of this pseudo-op. * testsuite/gas/elf-dwarf-5-file0.s: Add more lines. * testsuite/gas/elf-dwarf-5-file0.d: Update expected dump output. * testsuite/gas/lns/lns-diag-1.l: Update expected error message. * NEWS: Mention the new feature.
2020-02-06[2.34] Mention x86 assembler options to align branchesH.J. Lu1-0/+5
* NEWS: Mention x86 assembler options to align branches for binutils 2.34.
2020-01-18Add markers for 2.34 branch to the NEWS files and ChangeLogs.Nick Clifton1-0/+2
2020-01-02Add support for the GBZ80, Z180, and eZ80 variants of the Z80 architecure. ↵Sergey Belyashov1-0/+10
Add an ELF based target for these as well. PR 25224 bfd * Makefile.am: Add z80-elf target support. * configure.ac: Likewise. * targets.c: Likewise. * config.bfd: Add z80-elf target support and new arches: ez80 and z180. * elf32-z80.c: New file. * archures.c: Add new z80 architectures: eZ80 and Z180. * coffcode.h: Likewise. * cpu-z80.c: Likewise. * bfd-in2.h: Likewise plus additional Z80 relocations. * coff-z80.c: Add new relocations for Z80 target and local label check. gas * config/tc-z80.c: Add new architectures: Z180 and eZ80. Add support for assembler code generated by SDCC. Add new relocation types. Add z80-elf target support. * config/tc-z80.h: Add z80-elf target support. Enable dollar local labels. Local labels starts from ".L". * testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict. * testsuite/gas/all/fwdexp.s: Likewise. * testsuite/gas/z80/suffix.d: Fix failure on ELF target. * testsuite/gas/z80/z80.exp: Add new tests * testsuite/gas/z80/dollar.d: New file. * testsuite/gas/z80/dollar.s: New file. * testsuite/gas/z80/ez80_adl_all.d: New file. * testsuite/gas/z80/ez80_adl_all.s: New file. * testsuite/gas/z80/ez80_adl_suf.d: New file. * testsuite/gas/z80/ez80_isuf.s: New file. * testsuite/gas/z80/ez80_z80_all.d: New file. * testsuite/gas/z80/ez80_z80_all.s: New file. * testsuite/gas/z80/ez80_z80_suf.d: New file. * testsuite/gas/z80/r800_extra.d: New file. * testsuite/gas/z80/r800_extra.s: New file. * testsuite/gas/z80/r800_ii8.d: New file. * testsuite/gas/z80/r800_z80_doc.d: New file. * testsuite/gas/z80/z180.d: New file. * testsuite/gas/z80/z180.s: New file. * testsuite/gas/z80/z180_z80_doc.d: New file. * testsuite/gas/z80/z80_doc.d: New file. * testsuite/gas/z80/z80_doc.s: New file. * testsuite/gas/z80/z80_ii8.d: New file. * testsuite/gas/z80/z80_ii8.s: New file. * testsuite/gas/z80/z80_in_f_c.d: New file. * testsuite/gas/z80/z80_in_f_c.s: New file. * testsuite/gas/z80/z80_op_ii_ld.d: New file. * testsuite/gas/z80/z80_op_ii_ld.s: New file. * testsuite/gas/z80/z80_out_c_0.d: New file. * testsuite/gas/z80/z80_out_c_0.s: New file. * testsuite/gas/z80/z80_reloc.d: New file. * testsuite/gas/z80/z80_reloc.s: New file. * testsuite/gas/z80/z80_sli.d: New file. * testsuite/gas/z80/z80_sli.s: New file. ld * Makefile.am: Add new target z80-elf * configure.tgt: Likewise. * emultempl/z80.em: Add support for eZ80 and Z180 architectures. * emulparams/elf32z80.sh: New file. * emultempl/z80elf.em: Likewise. * testsuite/ld-z80/arch_ez80_adl.d: Likewise. * testsuite/ld-z80/arch_ez80_z80.d: Likewise. * testsuite/ld-z80/arch_r800.d: Likewise. * testsuite/ld-z80/arch_z180.d: Likewise. * testsuite/ld-z80/arch_z80.d: Likewise. * testsuite/ld-z80/comb_arch_ez80_z80.d: Likewise. * testsuite/ld-z80/comb_arch_z180.d: Likewise. * testsuite/ld-z80/labels.s: Likewise. * testsuite/ld-z80/relocs.s: Likewise. * testsuite/ld-z80/relocs_b_ez80.d: Likewise. * testsuite/ld-z80/relocs_b_z80.d: Likewise. * testsuite/ld-z80/relocs_f_z80.d: Likewise. * testsuite/ld-z80/z80.exp: Likewise. opcodes * z80-dis.c: Add support for eZ80 and Z80 instructions.
2020-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2019-11-18gas: Add --gdwarf-cie-version command line flagAndrew Burgess1-0/+3
Add a flag to control the version of CIE that is generated. By default gas produces CIE version 1, and this continues to be the default after this patch. However, a user can now provide --gdwarf-cie-version=NUMBER to switch to either version 3 or version 4 of CIE, version 2 was never released, and so causes an error as does any number less than 1 or greater than 4. Producing version 4 CIE requires two new fields to be added to the CIE, an address size field, and an segment selector field. For a flat address space the DWARF specification indicates that the segment selector should be 0, and the address size fields just contains the address size in bytes. For now we support 4 or 8 byte addresses, and the segment selector is always produced as 0. At some future time we might need to allow targets to override this. gas/ChangeLog: * as.c (parse_args): Parse --gdwarf-cie-version option. (flag_dwarf_cie_version): New variable. * as.h (flag_dwarf_cie_version): Declare. * dw2gencfi.c (output_cie): Switch from DW_CIE_VERSION to flag_dwarf_cie_version. * doc/as.texi (Overview): Document --gdwarf-cie-version. * NEWS: Likewise. * testsuite/gas/cfi/cfi.exp: Add new tests. * testsuite/gas/cfi/cie-version-0.d: New file. * testsuite/gas/cfi/cie-version-1.d: New file. * testsuite/gas/cfi/cie-version-2.d: New file. * testsuite/gas/cfi/cie-version-3.d: New file. * testsuite/gas/cfi/cie-version-4.d: New file. * testsuite/gas/cfi/cie-version.s: New file. include/ChangeLog: * dwarf2.h (DW_CIE_VERSION): Delete. Change-Id: I9de19461aeb8332b5a57bbfe802953d0725a7ae8
2019-09-19[gas][news] NEWS (2.33) note new SVE2 and TME instructions for AArch64Matthew Malcomson1-0/+6
These NEWS entries had been missed when the instructions were added. gas/ChangeLog: 2019-09-19 Matthew Malcomson <matthew.malcomson@arm.com> * NEWS: Add SVE2 and TME entries.
2019-09-09Add markers for 2.33 branch to NEWS and ChangeLog files.Phil Blundell1-0/+2
2019-08-22Implement a float16 directive for assembling 16 bit IEEE 754 floating point ↵Barnaby Wilks1-4/+9
numbers for the AArch64 assembler. The syntax of the directive is: .float16 <0-n decimal numbers> e.g. .float16 0.5 .float16 10.2, NaN, 452.09 The floats will always be encoded using the binary16 format as described in the IEEE 754-2008 standard. There is no need to support Arm's alternative half-precision format since AArch64 only supports the IEEE format. gas * config/tc-aarch64.c: Add float16 directive and add "Hh" to acceptable float characters. * doc/c-aarch64.texi: Documentation for float16 directive. * testsuite/gas/aarch64/float16-be.d: New test. * testsuite/gas/aarch64/float16-le.d: New test. * testsuite/gas/aarch64/float16.s: New test. * NEWS: Add NEWS entry.
2019-08-20Adds support for following CPUs to the ARM and Aarch64 assemblers: ↵Dennis Zhang1-0/+6
Cortex-A77, Cortex-A76AE, Cortex-A34, Cortex-A65, and Cortex-A65AE. Related specifications can be found at https://developer.arm.com/ip-products/processors. gas * NEWS: Mention the Arm and AArch64 new processors. * config/tc-aarch64.c: New entries for Cortex-A34, Cortex-A65, Cortex-A77, cortex-A65AE, and Cortex-A76AE. * doc/c-aarch64.texi: Document new CPUs. * testsuite/gas/aarch64/cpu-cortex-a34.d: New test. * testsuite/gas/aarch64/cpu-cortex-a65.d: New test. * testsuite/gas/aarch64/cpu-cortex-a65ae.d: New test. * testsuite/gas/aarch64/cpu-cortex-a76ae.d: New test. * testsuite/gas/aarch64/cpu-cortex-a77.d: New test. * testsuite/gas/aarch64/nop-asm.s: New test. bfd * cpu-aarch64.c: New entries for Cortex-A34, Cortex-A65, Cortex-A77, cortex-A65AE, and Cortex-A76AE.
2019-05-16[PATCH, binutils, Arm] Add Armv8.1-M Mainline and MVE enablement to NEWSAndre Vieira1-0/+3
gas/ChangeLog: 2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com> * NEWS: Mention Armv8.1-M Mainline and MVE. binutils/ChangeLog: 2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com> * NEWS: Mention Armv8.1-M Mainline and MVE.
2019-02-19Fix a potential deadlock in some older Loongson 3A1000 MIPS processors.Paul Hua1-0/+5
* NEWS: Mention -m[no-]fix-loongson3-llsc. * configure.ac: Add --enable-mips-fix-loongson3-llsc. Define DEFAULT_MIPS_FIX_LOONGSON3_LLSC. * config.in: Regenerated. * configure: Likewise. * config/tc-mips.c (sync_insn, mips_fix_loongson3_llsc): New variables. (options): New OPTION_FIX_LOONGSON3_LLSC, OPTION_NO_FIX_LOONGSON3_LLSC. (md_longopts): Add -m[no-]fix-loongson3-llsc. (md_begin): Initialize sync insn. (fix_loongson3_llsc): New. (append_insn): Call fix_loongson3_llsc. (md_parse_option): Handle OPTION_FIX_LOONGSON3_LLSC, OPTION_NO_FIX_LOONGSON3_LLSC. (md_show_usage): Display -m[no-]fix-loongson3-llsc. * doc/c-mips.texi: Document -m[no-]fix-loongson3-llsc, --enable-mips-fix-loongson3-llsc=[yes|no].
2019-01-19Add markers for 2.32 branch to NEWS and ChangeLog files.Nick Clifton1-0/+2
2019-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2018-09-17x86: Add -mvexwig=[0|1] option to assemblerH.J. Lu1-0/+3
Add -mvexwig=[0|1] option to x86 assembler to control how the assembler should encode the VEX.W bit in WIG VEX instructions. * gas/NEWS: Mention -mvexwig=[0|1] option. * config/tc-i386.c (vexwig): New. (build_vex_prefix): Set the VEX.W bit for -mvexwig=1 for WIG VEX instructions. (OPTION_MVEXWIG): New. (md_longopts): Add -mvexwig=. (md_parse_option): Handle OPTION_MVEXWIG. (md_show_usage): Show -mvexwig=[0|1]. * doc/c-i386.texi: Document -mvexwig=[0|1]. * testsuite/gas/i386/avx-wig.d: New file. * testsuite/gas/i386/avx-wig.s: Likewise. * testsuite/gas/i386/avx2-wig.d: Likewise. * testsuite/gas/i386/avx2-wig.s: Likewise. * testsuite/gas/i386/x86-64-avx-wig.d: Likewise. * testsuite/gas/i386/x86-64-avx-wig.s: Likewise. * testsuite/gas/i386/x86-64-avx2-wig.d: Likewise. * testsuite/gas/i386/x86-64-avx2-wig.s: Likewise. * testsuite/gas/i386/i386.exp: Run avx-wig, avx2-wig, x86-64-avx-wig and x86-64-avx2-wig.
2018-08-31x86: Extend assembler to generate GNU property notesH.J. Lu1-0/+5
Add -mx86-used-note=[yes|no] option to generate (or not) GNU property notes with GNU_PROPERTY_X86_FEATURE_2_USED and GNU_PROPERTY_X86_ISA_1_USED properties. If the assembly input contains no instructions, set the GNU_PROPERTY_X86_UINT32_VALID bit in GNU_PROPERTY_X86_FEATURE_2_USED property. Add a --enable-x86-used-note configure time option to set the default behavior. Set the default if the configure option is not used to "no". * NEWS: Mention -mx86-used-note=[no|yes]. * configure.ac: Add --enable-x86-used-note. Define DEFAULT_X86_USED_NOTE. * config.in: Regenerated. * configure: Likewise. * config/tc-i386.c (x86_isa_1_used): New. (x86_feature_2_used): Likewise. (x86_used_note): Likewise. (_i386_insn): Add has_regmmx, has_regxmm, has_regymm and has_regzmm. (build_modrm_byte): Set i.has_regmmx, i.has_regzmm. i.has_regymm and i.has_regxmm. (x86_cleanup): New function. (output_insn): Update x86_isa_1_used and x86_feature_2_used. (OPTION_X86_USED_NOTE): New. (md_longopts): Add -mx86-used-note=. (md_parse_option): Handle OPTION_X86_USED_NOTE. (md_show_usage): Display -mx86-used-note=. * config/tc-i386.h (x86_cleanup): New prototype. (md_cleanup): New. * doc/c-i386.texi: Document -mx86-used-note=.
2018-08-29[MIPS/GAS] Add Loongson EXT2 Instructions support.Chenghua Xu1-0/+2
bfd/ * elfxx-mips.c (print_mips_ases): Add Loongson EXT2 extension. binutils/ * readelf.c (print_mips_ases): Add Loongson EXT2 extension. gas/ * NEWS: Mention Loongson EXTensions R2 (EXT2) support. * config/tc-mips.c (options): Add OPTION_LOONGSON_EXT2 and OPTION_NO_LOONGSON_EXT2. (md_longopts): Likewise. (mips_ases): Define availability for EXT. (mips_convert_ase_flags): Map ASE_LOONGSON_EXT2 to AFL_ASE_LOONGSON_EXT2. (md_show_usage): Add help for -mloongson-ext2 and -mno-loongson-ext2. * doc/as.texi: Document -mloongson-ext2, -mno-loongson-ext2. * doc/c-mips.texi: Document -mloongson-ext2, -mno-loongson-ext2, .set loongson-ext2 and .set noloongson-ext2. * testsuite/gas/mips/loongson-ext2.d: New test. * testsuite/gas/mips/loongson-ext2.s: New test. * testsuite/gas/mips/mips.exp: Run loongson-ext2 test. include/ * elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro. (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2. * opcode/mips.h (ASE_LOONGSON_EXT2): New macro. opcodes/ * mips-dis.c (parse_mips_ase_option): Handle -M loongson-ext option. (print_mips_disassembler_options): Document -M loongson-ext. * mips-opc.c (LEXT2): New macro. (mips_opcodes): Add cto, ctz, dcto, dctz instructions.
2018-08-29[MIPS/GAS] Split Loongson EXT Instructions from loongson3a.Chenghua Xu1-0/+2
bfd/ * elfxx-mips.c (infer_mips_abiflags): Use ases instead of isa_ext for infer ABI flags. (print_mips_ases): Add Loongson EXT extension. binutils/ * readelf.c (print_mips_ases): Add Loongson EXT extension. elfcpp/ * mips.h (AFL_ASE_LOONGSON_EXT): New enum. gas/ * NEWS: Mention Loongson EXTensions (EXT) support. * config/tc-mips.c (options): Add OPTION_LOONGSON_EXT and OPTION_NO_LOONGSON_EXT. (md_longopts): Likewise. (mips_ases): Define availability for EXT. (mips_convert_ase_flags): Map ASE_LOONGSON_EXT to AFL_ASE_LOONGSON_EXT. (mips_cpu_info_table): Add ASE_LOONGSON_EXT for loongson3a. (md_show_usage): Add help for -mloongson-ext and -mno-loongson-ext. * doc/as.texi: Document -mloongson-ext, -mno-loongson-ext. * doc/c-mips.texi: Document -mloongson-ext, -mno-loongson-ext, .set loongson-ext and .set noloongson-ext. * testsuite/gas/mips/loongson-mmi.d: Add ASE flag. include/ * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro. (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT. * opcode/mips.h (ASE_LOONGSON_EXT): New macro. opcodes/ * mips-dis.c (mips_arch_choices): Add EXT to loongson3a descriptors. (parse_mips_ase_option): Handle -M loongson-ext option. (print_mips_disassembler_options): Document -M loongson-ext. * mips-opc.c (IL3A): Delete. * mips-opc.c (LEXT): New macro. (mips_opcodes): Replace IL2F|IL3A marking with LEXT for EXT instructions.
2018-08-29[MIPS/GAS] Split Loongson CAM Instructions from loongson3aChenghua Xu1-0/+2
bfd/ * elfxx-mips.c (print_mips_ases): Add CAM extension. binutils/ * readelf.c (print_mips_ases): Add CAM extension. gas/ * NEWS: Mention Loongson Content Address Memory (CAM) support. * config/tc-mips.c (options): Add OPTION_LOONGSON_CAM and OPTION_NO_LOONGSON_CAM. (md_longopts): Likewise. (mips_ases): Define availability for CAM. (mips_convert_ase_flags): Map ASE_LOONGSON_CAM to AFL_ASE_LOONGSON_CAM. (mips_cpu_info_table): Add ASE_LOONGSON_CAM for loongson3a. (md_show_usage): Add help for -mloongson-cam and -mno-loongson-cam. * doc/as.texi: Document -mloongson-cam, -mno-loongson-cam. * doc/c-mips.texi: Document -mloongson-cam, -mno-loongson-cam, .set loongson-cam and .set noloongson-cam. * testsuite/gas/mips/loongson-3a-2.d: Move cam test to ... * testsuite/gas/mips/loongson-cam.d: Here. Add ISA/ASE flag verification. * testsuite/gas/mips/loongson-3a-2.s: Move cam test to ... * testsuite/gas/mips/loongson-cam.s: Here. * testsuite/gas/mips/loongson-3a-mmi.d: Add ASE flag. * testsuite/gas/mips/mips.exp: Run loongson-cam test. include/ * elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro. (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM. * opcode/mips.h (ASE_LOONGSON_CAM): New macro. opcodes/ * mips-dis.c (mips_arch_choices): Add CAM to loongson3a descriptors. (parse_mips_ase_option): Handle -M loongson-cam option. (print_mips_disassembler_options): Document -M loongson-cam. * mips-opc.c (LCAM): New macro. (mips_opcodes): Replace IL2F|IL3A marking with LCAM for CAM instructions.
2018-07-30Add support for the C_SKY series of processors.Andrew Jenner1-0/+2
This patch series is a new binutils port for C-SKY processors, including support for both the V1 and V2 processor variants. V1 is derived from the MCore architecture while V2 is substantially different, with mixed 16- and 32-bit instructions, a larger register set, a different (but overlapping) ABI, etc. There is support for bare-metal ELF targets and Linux with both glibc and uClibc. This code is being contributed jointly by C-SKY Microsystems and Mentor Graphics. C-SKY is responsible for the technical content and has proposed Lifang Xia and Yunhai Shang as port maintainers. (Note that C-SKY does have a corporate copyright assignment on file with the FSF.) Mentor Graphics' role has been cleaning up the code, adding documentation and additional test cases, etc, to address issues we anticipated reviewers would complain about. bfd * Makefile.am (ALL_MACHINES, ALL_MACHINES_CFILES): Add C-SKY. (BFD32_BACKENDS, BFD_BACKENDS_CFILES): Likewise. * Makefile.in: Regenerated. * archures.c (enum bfd_architecture): Add bfd_arch_csky and related bfd_mach defines. (bfd_csky_arch): Declare. (bfd_archures_list): Add C-SKY. * bfd-in.h (elf32_csky_build_stubs): Declare. (elf32_csky_size_stubs): Declare. (elf32_csky_next_input_section: Declare. (elf32_csky_setup_section_lists): Declare. * bfd-in2.h: Regenerated. * config.bfd: Add C-SKY. * configure.ac: Likewise. * configure: Regenerated. * cpu-csky.c: New file. * elf-bfd.h (enum elf_target_id): Add C-SKY. * elf32-csky.c: New file. * libbfd.h: Regenerated. * reloc.c: Add C-SKY relocations. * targets.c (csky_elf32_be_vec, csky_elf32_le_vec): Declare. (_bfd_target_vector): Add C-SKY target vector entries. binutils* readelf.c: Include elf/csky.h. (guess_is_rela): Handle EM_CSKY. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. include * dis-asm.h (csky_symbol_is_valid): Declare. * opcode/csky.h: New file. opcodes * Makefile.am (TARGET_LIBOPCODES_CFILES): Add csky-dis.c. * Makefile.in: Regenerated. * configure.ac: Add C-SKY. * configure: Regenerated. * csky-dis.c: New file. * csky-opc.h: New file. * disassemble.c (ARCH_csky): Define. (disassembler, disassemble_init_for_target): Add case for ARCH_csky. * disassemble.h (print_insn_csky, csky_get_disassembler): Declare. gas * Makefile.am (TARGET_CPU_CFILES): Add entry for C-SKY. (TARGET_CPU_HFILES, TARGET_ENV_HFILES): Likewise. * Makefile.in: Regenerated. * config/tc-csky.c: New file. * config/tc-csky.h: New file. * config/te-csky_abiv1.h: New file. * config/te-csky_abiv1_linux.h: New file. * config/te-csky_abiv2.h: New file. * config/te-csky_abiv2_linux.h: New file. * configure.tgt: Add C-SKY. * doc/Makefile.am (CPU_DOCS): Add entry for C-SKY. * doc/Makefile.in: Regenerated. * doc/all.texi: Set CSKY feature. * doc/as.texi (Overview): Add C-SKY options. (Machine Dependencies): Likewise. * doc/c-csky.texi: New file. * testsuite/gas/csky/*: New test cases. ld * Makefile.am (ALL_EMULATION_SOURCES): Add C-SKY emulations. (ecskyelf.c, ecskyelf_linux.c): New rules. * Makefile.in: Regenerated. * configure.tgt: Add C-SKY. * emulparams/cskyelf.sh: New file. * emulparams/cskyelf_linux.sh: New file. * emultempl/cskyelf.em: New file. * gen-doc.texi: Add C-SKY. * ld.texi: Likewise. (Options specific to C-SKY targets): New section. * testsuite/ld-csky/*: New tests.
2018-07-20MIPS/GAS: Split Loongson MMI Instructions from loongson2f/3aChenghua Xu1-0/+3
The MMI instruction set has been implemented in many Loongson processors. There is a lot of software optimized for MMI. This patch splits MMI from loongson2f/3a, and adds GAS and disassembler options for MMI instructions. 2018-07-20 Chenghua Xu <paul.hua.gm@gmail.com> Maciej W. Rozycki <macro@mips.com> bfd/ * elfxx-mips.c (print_mips_ases): Add MMI extension. binutils/ * readelf.c (print_mips_ases): Add MMI extension. gas/ * NEWS: Mention MultiMedia extensions Instructions (MMI) support. * config/tc-mips.c (options): Add OPTION_LOONGSON_MMI and OPTION_NO_LOONGSON_MMI. (md_longopts): Likewise. (mips_ases): Define availability for MMI. (mips_convert_ase_flags): Map ASE_LOONGSON_MMI to AFL_ASE_LOONGSON_MMI. (mips_cpu_info_table): Add ASE_LOONGSON_MMI for loongson2f/3a. (md_show_usage): Add help for -mloongson-mmi and -mno-loongson-mmi. * doc/as.texi: Document -mloongson-mmi, -mno-loongson-mmi. * doc/c-mips.texi: Document -mloongson-mmi, -mno-loongson-mmi, .set loongson-mmi and .set noloongson-mmi. * testsuite/gas/mips/loongson-2f.d: Move mmi test to ... * testsuite/gas/mips/loongson-2f-mmi.d: Here. Add ISA/ASE flag verification. * testsuite/gas/mips/loongson-2f.s: Move mmi test to ... * testsuite/gas/mips/loongson-2f-mmi.s: Here. * testsuite/gas/mips/loongson-3a.d: Move mmi test to ... * testsuite/gas/mips/loongson-3a-mmi.d: Here. Add ISA/ASE flag verification. * testsuite/gas/mips/loongson-3a.s: Move mmi test to ... * testsuite/gas/mips/loongson-3a-mmi.s: Here. * testsuite/gas/mips/mips.exp: Run loongson-2f-mmi and loongson-3a-mmi tests. include/ * elf/mips.h (AFL_ASE_MMI): New macro. (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI. * opcode/mips.h (ASE_LOONGSON_MMI): New macro. opcodes/ * mips-dis.c (mips_arch_choices): Add MMI to loongson2f and loongson3a descriptors. (parse_mips_ase_option): Handle -M loongson-mmi option. (print_mips_disassembler_options): Document -M loongson-mmi. * mips-opc.c (LMMI): New macro. (mips_opcodes): Replace IL2F|IL3A marking with LMMI for MMI instructions.
2018-07-02Fix use of "command line X" in binutils docThomas Preud'homme1-21/+21
Binutils documentation uses a mix of spelling for the compound word "command-line X". According to [1]: "Sometimes compound words are written separately (nail polish), sometimes with a hyphen (short-sighted) and sometimes as one word (eyelashes). Often new compounds are written as two separate words and, as they become more familiar, they are either connected with a hyphen (-) or made into one word." I think command-line X is common enough in our industry that the two workds command and line should be connected. Since command-line is more common than commandline, I propose to update binutils documentation to consistently use "command-line" when this is used as an adjective to a noun (eg. command-line argument, command-line switch, command-line option and command-line flag). I've left occurences of "the command line" as is. I've also left gdb, sim and readline alone and have only touched public documentation (texi and NEWS files). [1] http://dictionary.cambridge.org/grammar/british-grammar/word-formation/compounds 2018-07-02 Thomas Preud'homme <thomas.preudhomme@arm.com> bfd/ * doc/bfdint.texi: Use command-line consistently when used in a compount word. * doc/bfdsumm.texi: Likewise. binutils/ * NEWS: Use command-line consistently when used in a compount word. * doc/binutils.texi: Likewise and fix trailing whitespace on same line. gas/ * NEWS: Use command-line consistently when used in a compount word. * doc/as.texi: Likewise. * doc/c-aarch64.texi: Likewise. * doc/c-alpha.texi: Likewise. * doc/c-arc.texi: Likewise. * doc/c-arm.texi: Likewise. * doc/c-avr.texi: Likewise. * doc/c-bfin.texi: Likewise. * doc/c-cris.texi: Likewise. * doc/c-epiphany.texi: Likewise. * doc/c-i386.texi: Likewise. * doc/c-ia64.texi: Likewise. * doc/c-lm32.texi: Likewise. * doc/c-m32r.texi: Likewise. * doc/c-m68k.texi: Likewise. * doc/c-mips.texi: Likewise. * doc/c-mmix.texi: Likewise. * doc/c-msp430.texi: Likewise. * doc/c-mt.texi: Likewise. * doc/c-nios2.texi: Likewise. * doc/c-ppc.texi: Likewise. * doc/c-pru.texi: Likewise. * doc/c-rl78.texi: Likewise. * doc/c-rx.texi: Likewise. * doc/c-tic6x.texi: Likewise. * doc/c-v850.texi: Likewise. * doc/c-vax.texi: Likewise. * doc/c-visium.texi: Likewise. * doc/c-xstormy16.texi: Likewise. * doc/c-xtensa.texi: Likewise. * doc/c-z80.texi: Likewise. * doc/c-z8k.texi: Likewise. * doc/internals.texi: Likewise. gprof/ * gprof.texi: Use command-line consistently when used in a compount word. ld/ * NEWS: Use command-line consistently when used in a compount word. * ld.texinfo: Likewise. * ldint.texinfo: Likewise.
2018-06-24Add 2.30 branch notes to ChangeLogs and NEWS files.Nick Clifton1-0/+2
2018-06-20Change the ARM assembler's ADR and ADRl pseudo-ops so that they will only ↵Nick Clifton1-0/+4
set the bottom bit of imported thumb function symbols if the -mthumb-interwork option is active. For more information see the email thread starting here: https://www.sourceware.org/ml/binutils/2018-05/msg00348.html PR 21458 * tc-arm.c (do_adr): Only set the bottom bit of an imported thumb function symbol address if -mthumb-interwork is active. (do_adrl): Likewise. * doc/c-arm.texi: Update descriptions of the -mthumb-interwork option and the ADR and ADRL pseudo-ops. * NEWS: Mention the new behaviour of the ADR and ADRL pseudo-ops. * testsuite/gas/arm/pr21458.d: Add -mthumb-interwork option to assembler command line. * testsuite/gas/arm/adr.d: Likewise. * testsuite/gas/arm/adrl.d: Likewise.
2018-06-14MIPS: Add Global INValidate ASE supportFaraz Shahbazker1-0/+2
Add support for the Global INValidate Application Specific Extension for Release 6 of the MIPS Architecture. [1] "MIPS Architecture for Programmers Volume II-A: The MIPS32 Instruction Set Manual", Imagination Technologies Ltd., Document Number: MD00086, Revision 6.06, December 15, 2016, Section 3.2 "Alphabetical List of Instructions", pp. 187-191 bfd/ * elfxx-mips.c (print_mips_ases): Add GINV extension. binutils/ * readelf.c (print_mips_ases): Add GINV extension. gas/ * NEWS: Mention MIPS Global INValidate ASE support. * config/tc-mips.c (options): Add OPTION_GINV and OPTION_NO_GINV. (md_longopts): Likewise. (mips_ases): Define availability for GINV. (mips_convert_ase_flags): Map ASE_GINV to AFL_ASE_GINV. (md_show_usage): Add help for -mginv and -mno-ginv. * doc/as.texinfo: Document -mginv, -mno-ginv. * doc/c-mips.texi: Document -mginv, -mno-ginv, .set ginv and .set noginv. * testsuite/gas/mips/ase-errors-1.s: Add error checks for GINV ASE. * testsuite/gas/mips/ase-errors-2.s: Likewise. * testsuite/gas/mips/ase-errors-1.l: Likewise. * testsuite/gas/mips/ase-errors-2.l: Likewise. * testsuite/gas/mips/ginv.d: New test. * testsuite/gas/mips/ginv-err.d: New test. * testsuite/gas/mips/ginv-err.l: New test stderr output. * testsuite/gas/mips/ginv.s: New test source. * testsuite/gas/mips/ginv-err.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests. include/ * elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros. (AFL_ASE_MASK): Update to include AFL_ASE_GINV. * opcode/mips.h: Document "+\" operand format. (ASE_GINV): New macro. opcodes/ * mips-dis.c (mips_arch_choices): Add GINV to mips32r6 and mips64r6 descriptors. (parse_mips_ase_option): Handle -Mginv option. (print_mips_disassembler_options): Document -Mginv. * mips-opc.c (decode_mips_operand) <+\>: New operand format. (GINV): New macro. (mips_opcodes): Define ginvi and ginvt.
2018-06-13MIPS: Add CRC ASE supportScott Egerton1-0/+2
Add support for the CRC Application Specific Extension for Release 6 of the MIPS Architecture. [1] "MIPS Architecture for Programmers Volume II-A: The MIPS32 Instruction Set Manual", Imagination Technologies Ltd., Document Number: MD00086, Revision 6.06, December 15, 2016, Section 3.2 "Alphabetical List of Instructions", pp. 143-148 [2] "MIPS Architecture for Programmers Volume II-A: The MIPS64 Instruction Set Manual", Imagination Technologies Ltd., Document Number: MD00087, Revision 6.06, December 15, 2016, Section 3.2 "Alphabetical List of Instructions", pp. 165-170 ChangeLog: bfd/ 2018-06-13 Scott Egerton <scott.egerton@imgtec.com> Faraz Shahbazker <Faraz.Shahbazker@mips.com> * elfxx-mips.c (print_mips_ases): Add CRC. binutils/ 2018-06-13 Scott Egerton <scott.egerton@imgtec.com> Faraz Shahbazker <Faraz.Shahbazker@mips.com> * readelf.c (print_mips_ases): Add CRC. gas/ 2018-06-13 Scott Egerton <scott.egerton@imgtec.com> Faraz Shahbazker <Faraz.Shahbazker@mips.com> Maciej W. Rozycki <macro@mips.com> * config/tc-mips.c (options): Add OPTION_CRC and OPTION_NO_CRC. (md_longopts): Likewise. (md_show_usage): Add help for -mcrc and -mno-crc. (mips_ases): Define availability for CRC and CRC64. (mips_convert_ase_flags): Map ASE_CRC to AFL_ASE_CRC. * doc/as.texinfo: Document -mcrc, -mno-crc. * doc/c-mips.texi: Document -mcrc, -mno-crc, .set crc and .set no-crc. * testsuite/gas/mips/ase-errors-1.l: Add error checks for CRC ASE. * testsuite/gas/mips/ase-errors-2.l: Likewise. * testsuite/gas/mips/ase-errors-1.s: Likewise. * testsuite/gas/mips/ase-errors-2.s: Likewise. * testsuite/gas/mips/crc.d: New test. * testsuite/gas/mips/crc64.d: New test. * testsuite/gas/mips/crc-err.d: New test. * testsuite/gas/mips/crc64-err.d: New test. * testsuite/gas/mips/crc-err.l: New test stderr output. * testsuite/gas/mips/crc64-err.l: New test stderr output. * testsuite/gas/mips/crc.s: New test source. * testsuite/gas/mips/crc64.s: New test source. * testsuite/gas/mips/crc-err.s: New test source. * testsuite/gas/mips/crc64-err.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests. include/ 2018-06-13 Scott Egerton <scott.egerton@imgtec.com> Faraz Shahbazker <Faraz.Shahbazker@mips.com> * elf/mips.h (AFL_ASE_CRC): New macro. (AFL_ASE_MASK): Update to include AFL_ASE_CRC. * opcode/mips.h (ASE_CRC): New macro. * opcode/mips.h (ASE_CRC64): Likewise. opcodes/ 2018-06-13 Scott Egerton <scott.egerton@imgtec.com> Faraz Shahbazker <Faraz.Shahbazker@mips.com> * mips-dis.c (mips_arch_choices): Add CRC and CRC64 ASEs. * mips-opc.c (CRC, CRC64): New macros. (mips_builtin_opcodes): Define crc32b, crc32h, crc32w, crc32cb, crc32ch and crc32cw for CRC. Define crc32d and crc32cd for CRC64.
2018-05-18Add support for the Freescale s12z processor.John Darrington1-0/+2
bfd * Makefile.am: Add s12z files. * Makefile.in: Regenerate. * archures.c: Add bfd_s12z_arch. * bfd-in.h: Add exports of bfd_putb24 and bfd_putl24. * bfd-in2.h: Regenerate. * config.bfd: Add s12z target. * configure.ac: Add s12z target. * configure: Regenerate. * cpu-s12z.c: New file. * elf32-s12z.c: New file. * libbfd.c (bfd_putb24): New function. (bfd_putl24): New function. * libbfd.h: Regenerate. * reloc.c: Add s12z relocations. (bfd_get_reloc_size): Handle size 5 relocs. * targets.c: Add s12z_elf32_vec. opcodes * Makefile.am: Add support for s12z architecture. * configure.ac: Likewise. * disassemble.c: Likewise. * disassemble.h: Likewise. * Makefile.in: Regenerate. * configure: Regenerate. * s12z-dis.c: New file. * s12z.h: New file. include * elf/s12z.h: New header. ld * Makefile.am: Add support for s12z architecture. * configure.tgt: Likewise. * Makefile.in: Regenerate. * emulparams/m9s12zelf.sh: New file. * scripttempl/elfm9s12z.sc: New file. * testsuite/ld-discard/static.d: Expect to fail for the s12z target. * testsuite/ld-elf/endsym.d: Likewise. * testsuite/ld-elf/merge.d: Likewise. * testsuite/ld-elf/pr14926.d: Skip for the s12z target. * testsuite/ld-elf/sec64k.exp: Likewise. * testsuite/ld-s12z: New directory. * testsuite/ld-s12z/opr-linking.d: New file. * testsuite/ld-s12z/opr-linking.s: New file. * testsuite/ld-s12z/relative-linking.d: New file. * testsuite/ld-s12z/relative-linking.s: New file. * testsuite/ld-s12z/z12s.exp: New file. gas * Makefile.am: Add support for s12z target. * Makefile.in: Regenerate. * NEWS: Mention the new support. * config/tc-s12z.c: New file. * config/tc-s12z.h: New file. * configure.tgt: Add s12z support. * doc/Makefile.am: Likewise. * doc/Makefile.in: Regenerate. * doc/all.texi: Add s12z documentation. * doc/as.textinfo: Likewise. * doc/c-s12z.texi: New file. * testsuite/gas/s12z: New directory. * testsuite/gas/s12z/abs.d: New file. * testsuite/gas/s12z/abs.s: New file. * testsuite/gas/s12z/adc-imm.d: New file. * testsuite/gas/s12z/adc-imm.s: New file. * testsuite/gas/s12z/adc-opr.d: New file. * testsuite/gas/s12z/adc-opr.s: New file. * testsuite/gas/s12z/add-imm.d: New file. * testsuite/gas/s12z/add-imm.s: New file. * testsuite/gas/s12z/add-opr.d: New file. * testsuite/gas/s12z/add-opr.s: New file. * testsuite/gas/s12z/and-imm.d: New file. * testsuite/gas/s12z/and-imm.s: New file. * testsuite/gas/s12z/and-opr.d: New file. * testsuite/gas/s12z/and-opr.s: New file. * testsuite/gas/s12z/and-or-cc.d: New file. * testsuite/gas/s12z/and-or-cc.s: New file. * testsuite/gas/s12z/bfext-special.d: New file. * testsuite/gas/s12z/bfext-special.s: New file. * testsuite/gas/s12z/bfext.d: New file. * testsuite/gas/s12z/bfext.s: New file. * testsuite/gas/s12z/bit-manip.d: New file. * testsuite/gas/s12z/bit-manip.s: New file. * testsuite/gas/s12z/bit.d: New file. * testsuite/gas/s12z/bit.s: New file. * testsuite/gas/s12z/bra-expression-defined.d: New file. * testsuite/gas/s12z/bra-expression-defined.s: New file. * testsuite/gas/s12z/bra-expression-undef.d: New file. * testsuite/gas/s12z/bra-expression-undef.s: New file. * testsuite/gas/s12z/bra.d: New file. * testsuite/gas/s12z/bra.s: New file. * testsuite/gas/s12z/brclr-symbols.d: New file. * testsuite/gas/s12z/brclr-symbols.s: New file. * testsuite/gas/s12z/brset-clr-opr-imm-rel.d: New file. * testsuite/gas/s12z/brset-clr-opr-imm-rel.s: New file. * testsuite/gas/s12z/brset-clr-opr-reg-rel.d: New file. * testsuite/gas/s12z/brset-clr-opr-reg-rel.s: New file. * testsuite/gas/s12z/brset-clr-reg-imm-rel.d: New file. * testsuite/gas/s12z/brset-clr-reg-imm-rel.s: New file. * testsuite/gas/s12z/brset-clr-reg-reg-rel.d: New file. * testsuite/gas/s12z/brset-clr-reg-reg-rel.s: New file. * testsuite/gas/s12z/clb.d: New file. * testsuite/gas/s12z/clb.s: New file. * testsuite/gas/s12z/clr-opr.d: New file. * testsuite/gas/s12z/clr-opr.s: New file. * testsuite/gas/s12z/clr.d: New file. * testsuite/gas/s12z/clr.s: New file. * testsuite/gas/s12z/cmp-imm.d: New file. * testsuite/gas/s12z/cmp-imm.s: New file. * testsuite/gas/s12z/cmp-opr-inc.d: New file. * testsuite/gas/s12z/cmp-opr-inc.s: New file. * testsuite/gas/s12z/cmp-opr-rdirect.d: New file. * testsuite/gas/s12z/cmp-opr-rdirect.s: New file. * testsuite/gas/s12z/cmp-opr-reg.d: New file. * testsuite/gas/s12z/cmp-opr-reg.s: New file. * testsuite/gas/s12z/cmp-opr-rindirect.d: New file. * testsuite/gas/s12z/cmp-opr-rindirect.s: New file. * testsuite/gas/s12z/cmp-opr-sxe4.d: New file. * testsuite/gas/s12z/cmp-opr-sxe4.s: New file. * testsuite/gas/s12z/cmp-opr-xys.d: New file. * testsuite/gas/s12z/cmp-opr-xys.s: New file. * testsuite/gas/s12z/cmp-s-imm.d: New file. * testsuite/gas/s12z/cmp-s-imm.s: New file. * testsuite/gas/s12z/cmp-s-opr.d: New file. * testsuite/gas/s12z/cmp-s-opr.s: New file. * testsuite/gas/s12z/cmp-xy.d: New file. * testsuite/gas/s12z/cmp-xy.s: New file. * testsuite/gas/s12z/com-opr.d: New file. * testsuite/gas/s12z/com-opr.s: New file. * testsuite/gas/s12z/complex-shifts.d: New file. * testsuite/gas/s12z/complex-shifts.s: New file. * testsuite/gas/s12z/db-tb-cc-opr.d: New file. * testsuite/gas/s12z/db-tb-cc-opr.s: New file. * testsuite/gas/s12z/db-tb-cc-reg.d: New file. * testsuite/gas/s12z/db-tb-cc-reg.s: New file. * testsuite/gas/s12z/dbCC.d: New file. * testsuite/gas/s12z/dbCC.s: New file. * testsuite/gas/s12z/dec-opr.d: New file. * testsuite/gas/s12z/dec-opr.s: New file. * testsuite/gas/s12z/dec.d: New file. * testsuite/gas/s12z/dec.s: New file. * testsuite/gas/s12z/div.d: New file. * testsuite/gas/s12z/div.s: New file. * testsuite/gas/s12z/eor.d: New file. * testsuite/gas/s12z/eor.s: New file. * testsuite/gas/s12z/exg.d: New file. * testsuite/gas/s12z/exg.s: New file. * testsuite/gas/s12z/ext24-ld-xy.d: New file. * testsuite/gas/s12z/ext24-ld-xy.s: New file. * testsuite/gas/s12z/inc-opr.d: New file. * testsuite/gas/s12z/inc-opr.s: New file. * testsuite/gas/s12z/inc.d: New file. * testsuite/gas/s12z/inc.s: New file. * testsuite/gas/s12z/inh.d: New file. * testsuite/gas/s12z/inh.s: New file. * testsuite/gas/s12z/jmp.d: New file. * testsuite/gas/s12z/jmp.s: New file. * testsuite/gas/s12z/jsr.d: New file. * testsuite/gas/s12z/jsr.s: New file. * testsuite/gas/s12z/ld-imm-page2.d: New file. * testsuite/gas/s12z/ld-imm-page2.s: New file. * testsuite/gas/s12z/ld-imm.d: New file. * testsuite/gas/s12z/ld-imm.s: New file. * testsuite/gas/s12z/ld-immu18.d: New file. * testsuite/gas/s12z/ld-immu18.s: New file. * testsuite/gas/s12z/ld-large-direct.d: New file. * testsuite/gas/s12z/ld-large-direct.s: New file. * testsuite/gas/s12z/ld-opr.d: New file. * testsuite/gas/s12z/ld-opr.s: New file. * testsuite/gas/s12z/ld-s-opr.d: New file. * testsuite/gas/s12z/ld-s-opr.s: New file. * testsuite/gas/s12z/ld-small-direct.d: New file. * testsuite/gas/s12z/ld-small-direct.s: New file. * testsuite/gas/s12z/lea-immu18.d: New file. * testsuite/gas/s12z/lea-immu18.s: New file. * testsuite/gas/s12z/lea.d: New file. * testsuite/gas/s12z/lea.s: New file. * testsuite/gas/s12z/mac.d: New file. * testsuite/gas/s12z/mac.s: New file. * testsuite/gas/s12z/min-max.d: New file. * testsuite/gas/s12z/min-max.s: New file. * testsuite/gas/s12z/mod.d: New file. * testsuite/gas/s12z/mod.s: New file. * testsuite/gas/s12z/mov.d: New file. * testsuite/gas/s12z/mov.s: New file. * testsuite/gas/s12z/mul-imm.d: New file. * testsuite/gas/s12z/mul-imm.s: New file. * testsuite/gas/s12z/mul-opr-opr.d: New file. * testsuite/gas/s12z/mul-opr-opr.s: New file. * testsuite/gas/s12z/mul-opr.d: New file. * testsuite/gas/s12z/mul-opr.s: New file. * testsuite/gas/s12z/mul-reg.d: New file. * testsuite/gas/s12z/mul-reg.s: New file. * testsuite/gas/s12z/mul.d: New file. * testsuite/gas/s12z/mul.s: New file. * testsuite/gas/s12z/neg-opr.d: New file. * testsuite/gas/s12z/neg-opr.s: New file. * testsuite/gas/s12z/not-so-simple-shifts.d: New file. * testsuite/gas/s12z/not-so-simple-shifts.s: New file. * testsuite/gas/s12z/opr-18u.d: New file. * testsuite/gas/s12z/opr-18u.s: New file. * testsuite/gas/s12z/opr-expr.d: New file. * testsuite/gas/s12z/opr-expr.s: New file. * testsuite/gas/s12z/opr-ext-18.d: New file. * testsuite/gas/s12z/opr-ext-18.s: New file. * testsuite/gas/s12z/opr-idx-24-reg.d: New file. * testsuite/gas/s12z/opr-idx-24-reg.s: New file. * testsuite/gas/s12z/opr-idx3-reg.d: New file. * testsuite/gas/s12z/opr-idx3-reg.s: New file. * testsuite/gas/s12z/opr-idx3-xysp-24.d: New file. * testsuite/gas/s12z/opr-idx3-xysp-24.s: New file. * testsuite/gas/s12z/opr-indirect-expr.d: New file. * testsuite/gas/s12z/opr-indirect-expr.s: New file. * testsuite/gas/s12z/opr-symbol.d: New file. * testsuite/gas/s12z/opr-symbol.s: New file. * testsuite/gas/s12z/or-imm.d: New file. * testsuite/gas/s12z/or-imm.s: New file. * testsuite/gas/s12z/or-opr.d: New file. * testsuite/gas/s12z/or-opr.s: New file. * testsuite/gas/s12z/p2-mul.d: New file. * testsuite/gas/s12z/p2-mul.s: New file. * testsuite/gas/s12z/page2-inh.d: New file. * testsuite/gas/s12z/page2-inh.s: New file. * testsuite/gas/s12z/psh-pul.d: New file. * testsuite/gas/s12z/psh-pul.s: New file. * testsuite/gas/s12z/qmul.d: New file. * testsuite/gas/s12z/qmul.s: New file. * testsuite/gas/s12z/rotate.d: New file. * testsuite/gas/s12z/rotate.s: New file. * testsuite/gas/s12z/s12z.exp: New file. * testsuite/gas/s12z/sat.d: New file. * testsuite/gas/s12z/sat.s: New file. * testsuite/gas/s12z/sbc-imm.d: New file. * testsuite/gas/s12z/sbc-imm.s: New file. * testsuite/gas/s12z/sbc-opr.d: New file. * testsuite/gas/s12z/sbc-opr.s: New file. * testsuite/gas/s12z/shift.d: New file. * testsuite/gas/s12z/shift.s: New file. * testsuite/gas/s12z/simple-shift.d: New file. * testsuite/gas/s12z/simple-shift.s: New file. * testsuite/gas/s12z/single-ops.d: New file. * testsuite/gas/s12z/single-ops.s: New file. * testsuite/gas/s12z/specd6.d: New file. * testsuite/gas/s12z/specd6.s: New file. * testsuite/gas/s12z/st-large-direct.d: New file. * testsuite/gas/s12z/st-large-direct.s: New file. * testsuite/gas/s12z/st-opr.d: New file. * testsuite/gas/s12z/st-opr.s: New file. * testsuite/gas/s12z/st-s-opr.d: New file. * testsuite/gas/s12z/st-s-opr.s: New file. * testsuite/gas/s12z/st-small-direct.d: New file. * testsuite/gas/s12z/st-small-direct.s: New file. * testsuite/gas/s12z/st-xy.d: New file. * testsuite/gas/s12z/st-xy.s: New file. * testsuite/gas/s12z/sub-imm.d: New file. * testsuite/gas/s12z/sub-imm.s: New file. * testsuite/gas/s12z/sub-opr.d: New file. * testsuite/gas/s12z/sub-opr.s: New file. * testsuite/gas/s12z/tfr.d: New file. * testsuite/gas/s12z/tfr.s: New file. * testsuite/gas/s12z/trap.d: New file. * testsuite/gas/s12z/trap.s: New file. binutils* readelf.c: Add support for s12z architecture. * testsuite/lib/binutils-common.exp (is_elf_format): Excluse s12z targets.
2018-04-26Extend the assembler so that it can automatically generate GNU Build ↵Nick Clifton1-0/+6
attribute notes if none are present in the input files. gas * as.c (flag_generate_build_notes): New variable. (show_usage): Add entry for --generate-missing-build-notes. (parse_args): Parse --generate-missing-build-notes. * as.h: Export flag_generate_build_notes. * symbols.c (save_symbol_name): Ensure that the name parameter is not NULL. * write.c (create_obj_attrs_section): Reformat. (create_note_reloc): New function - creates a relocation for a field in a GNU Build attribute note. (maybe_generate_build_notes): New function - created GNU Build attribute notes if none are present in the output file. (write_object_file): Call maybe_generate_build_notes. * configure.ac (--enable-generate-build-notes): New option. * NEWS: Announce the new feature. * doc/as.textinfo: Document the new option. * config.in: Regenerate. * configure: Regenerate. binutils* readelf.c (is_32bit_abs_reloc): Support R_PARISC_DIR32 as a 32-bit absolute reloc for the HPPA target. * testsuite/binutils-all/note-5.d: New test. * testsuite/binutils-all/note-5.s: Source file for new test. * testsuite/binutils-all/objcopy.exp: Run new test.
2018-03-08x86: Remove support for old (<= 2.8.1) versions of gccH.J. Lu1-0/+2
Old (<= 2.8.1) versions of gcc generate broken fsubp, fsubrp, fdivp and fdivrp instructions. Assembler translates them to correct ones with a warning: [hjl@gnu-cfl-1 gas]$ cat x.s fsubp %st(3),%st [hjl@gnu-cfl-1 gas]$ gcc -c x.s x.s: Assembler messages: x.s:1: Warning: translating to `fsubp %st,%st(3)' [hjl@gnu-cfl-1 gas]$ This patch removes support for old (<= 2.8.1) versions of gcc: [hjl@gnu-cfl-1 gas]$ ./as-new -o x.o x.s x.s: Assembler messages: x.s:1: Error: operand type mismatch for `fsubp' [hjl@gnu-cfl-1 gas]$ gas/ * NEWS: Mention -mold-gcc removal. * config/tc-i386.c (i386_error): Remove old_gcc_only. (old_gcc): Removed. (match_template): Remove old gcc support. (OPTION_MOLD_GCC): Removed. (OPTION_MRELAX_RELOCATIONS): Updated. (md_longopts): Remove OPTION_MOLD_GCC. (md_parse_option): Likewise. (md_show_usage): Remove -mold-gcc. * testsuite/gas/i386/general.s: Convert fsub/fdiv tests for old (<= 2.8.1) versions of gcc. * testsuite/gas/i386/intel.s: Likewise. * testsuite/gas/i386/general.l: Updated. * testsuite/gas/i386/intel-intel.d: Likewise. * testsuite/gas/i386/intel.d: Likewise. * testsuite/gas/i386/intel.e: Likewise. * testsuite/gas/i386/i386.exp: Don't pass -mold-gcc to general. include/ * opcode/i386 (OLDGCC_COMPAT): Removed. opcodes/ * i386-gen.c (opcode_modifiers): Remove OldGcc. * i386-opc.h (OldGcc): Removed. (i386_opcode_modifier): Remove oldgcc. * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp instructions for old (<= 2.8.1) versions of gcc. * i386-tbl.h: Regenerated.
2018-02-27gas: Rename .nop directive to .nopsH.J. Lu1-1/+1
Since directives of NO_PSEUDO_DOT targets don't have the leading '.' and "nop" can be a valid instruction, rename .nop directive to .nops to avoid conflict. * NEWS: Rename .nop to .nops. * doc/as.texinfo: Likewise. * read.c (potable): Add "nops". Remove "nop". (s_nop): Renamed to ... (s_nops): This. * read.h (s_nop): Renamed to ... (s_nops): This. * write.c (cvt_frag_to_fill): Rename .nop to .nops. (md_generate_nops): Likewise. (relax_segment): Likewise. * testsuite/gas/i386/nop-1.d: Updated. * testsuite/gas/i386/nop-1.s: Likewise. * testsuite/gas/i386/nop-2.d: Likewise. * testsuite/gas/i386/nop-2.s: Likewise. * testsuite/gas/i386/nop-3.d: Likewise. * testsuite/gas/i386/nop-3.s: Likewise. * testsuite/gas/i386/nop-4.d: Likewise. * testsuite/gas/i386/nop-4.s: Likewise. * testsuite/gas/i386/nop-5.d: Likewise. * testsuite/gas/i386/nop-5.s: Likewise. * testsuite/gas/i386/nop-6.d: Likewise. * testsuite/gas/i386/nop-6.s: Likewise. * testsuite/gas/i386/nop-bad-1.l: Likewise. * testsuite/gas/i386/nop-bad-1.s: Likewise. * testsuite/gas/i386/x86-64-nop-1.d: Likewise. * testsuite/gas/i386/x86-64-nop-2.d: Likewise. * testsuite/gas/i386/x86-64-nop-3.d: Likewise. * testsuite/gas/i386/x86-64-nop-4.d: Likewise. * testsuite/gas/i386/x86-64-nop-5.d: Likewise. * testsuite/gas/i386/x86-64-nop-6.d: Likewise.
2018-02-27x86: Add -O[2|s] assembler command-line optionsH.J. Lu1-0/+3
On x86, some instructions have alternate shorter encodings: 1. When the upper 32 bits of destination registers of andq $imm31, %r64 testq $imm31, %r64 xorq %r64, %r64 subq %r64, %r64 known to be zero, we can encode them without the REX_W bit: andl $imm31, %r32 testl $imm31, %r32 xorl %r32, %r32 subl %r32, %r32 This optimization is enabled with -O, -O2 and -Os. 2. Since 0xb0 mov with 32-bit destination registers zero-extends 32-bit immediate to 64-bit destination register, we can use it to encode 64-bit mov with 32-bit immediates. This optimization is enabled with -O, -O2 and -Os. 3. Since the upper bits of destination registers of VEX128 and EVEX128 instructions are extended to zero, if all bits of destination registers of AVX256 or AVX512 instructions are zero, we can use VEX128 or EVEX128 encoding to encode AVX256 or AVX512 instructions. When 2 source registers are identical, AVX256 and AVX512 andn and xor instructions: VOP %reg, %reg, %dest_reg can be encoded with VOP128 %reg, %reg, %dest_reg This optimization is enabled with -O2 and -Os. 4. 16-bit, 32-bit and 64-bit register tests with immediate may be encoded as 8-bit register test with immediate. This optimization is enabled with -Os. This patch does: 1. Add {nooptimize} pseudo prefix to disable instruction size optimization. 2. Add optimize to i386_opcode_modifier to tell assembler that encoding of an instruction may be optimized. gas/ PR gas/22871 * NEWS: Mention -O[2|s]. * config/tc-i386.c (_i386_insn): Add no_optimize. (optimize): New. (optimize_for_space): Likewise. (fits_in_imm7): New function. (fits_in_imm31): Likewise. (optimize_encoding): Likewise. (md_assemble): Call optimize_encoding to optimize encoding. (parse_insn): Handle {nooptimize}. (md_shortopts): Append "O::". (md_parse_option): Handle -On. * doc/c-i386.texi: Document -O0, -O, -O1, -O2 and -Os as well as {nooptimize}. * testsuite/gas/cfi/cfi-x86_64.d: Pass -O0 to assembler. * testsuite/gas/i386/ilp32/cfi/cfi-x86_64.d: Likewise. * testsuite/gas/i386/i386.exp: Run optimize-1, optimize-2, optimize-3, x86-64-optimize-1, x86-64-optimize-2, x86-64-optimize-3 and x86-64-optimize-4. * testsuite/gas/i386/optimize-1.d: New file. * testsuite/gas/i386/optimize-1.s: Likewise. * testsuite/gas/i386/optimize-2.d: Likewise. * testsuite/gas/i386/optimize-2.s: Likewise. * testsuite/gas/i386/optimize-3.d: Likewise. * testsuite/gas/i386/optimize-3.s: Likewise. * testsuite/gas/i386/x86-64-optimize-1.s: Likewise. * testsuite/gas/i386/x86-64-optimize-1.d: Likewise. * testsuite/gas/i386/x86-64-optimize-2.d: Likewise. * testsuite/gas/i386/x86-64-optimize-2.s: Likewise. * testsuite/gas/i386/x86-64-optimize-3.d: Likewise. * testsuite/gas/i386/x86-64-optimize-3.s: Likewise. * testsuite/gas/i386/x86-64-optimize-4.d: Likewise. * testsuite/gas/i386/x86-64-optimize-4.s: Likewise. opcodes/ PR gas/22871 * i386-gen.c (opcode_modifiers): Add Optimize. * i386-opc.h (Optimize): New enum. (i386_opcode_modifier): Add optimize. * i386-opc.tbl: Add "Optimize" to "mov $imm, reg", "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem", "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem", "movq $imm, reg" and AVX256 and AVX512 versions of vandnps, vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor, vpxord and vpxorq. * i386-tbl.h: Regenerated.
2018-02-17Add .nop assembler directiveH.J. Lu1-0/+3
Implement the '.nop SIZE[, CONTROL]' assembler directive, which emits SIZE bytes filled with no-op instructions. SIZE is absolute expression. The optional CONTROL byte controls how no-op instructions should be generated. If the comma and @var{control} are omitted, CONTROL is assumed to be zero. For Intel 80386 and AMD x86-64 targets, CONTROL byte specifies the size limit of a single no-op instruction. The valid values of CONTROL byte are between 0 and 8 for 16-bit mode, between 0 and 10 for 32-bit mode, between 0 and 11 for 64-bit mode. When 0 is used, the no-op size limit is set to the maximum supported size. 2 new relax states, rs_space_nop and rs_fill_nop, are added to enum _relax_state, which are similar to rs_space and rs_fill, respectively, but they fill with no-op instructions, instead of a single byte. A target backend must override the default md_generate_nops to generate proper no-op instructions. Otherwise, an error of unimplemented .nop directive will be issued whenever .nop directive is used. * NEWS: Mention .nop directive. * as.h (_relax_state): Add rs_space_nop and rs_fill_nop. * read.c (potable): Add .nop. (s_nop): New function. * read.h (s_nop): New prototype. * write.c (cvt_frag_to_fill): Handle rs_space_nop and rs_fill_nop. (md_generate_nops): New function. (relax_segment): Likewise. (write_contents): Use md_generate_nops for rs_fill_nop. * config/tc-i386.c (alt64_11): New. (alt64_patt): Likewise. (md_convert_frag): Handle rs_space_nop. (i386_output_nops): New function. (i386_generate_nops): Likewise. (i386_align_code): Call i386_output_nops. * config/tc-i386.h (i386_generate_nops): New. (md_generate_nops): Likewise. * doc/as.texinfo: Document .nop directive. * testsuite/gas/i386/i386.exp: Run .nop directive tests. * testsuite/gas/i386/nop-1.d: New file. * testsuite/gas/i386/nop-1.s: Likewise. * testsuite/gas/i386/nop-2.d: Likewise. * testsuite/gas/i386/nop-2.s: Likewise. * testsuite/gas/i386/nop-3.d: Likewise. * testsuite/gas/i386/nop-3.s: Likewise. * testsuite/gas/i386/nop-4.d: Likewise. * testsuite/gas/i386/nop-4.s: Likewise. * testsuite/gas/i386/nop-5.d: Likewise. * testsuite/gas/i386/nop-5.s: Likewise. * testsuite/gas/i386/nop-6.d: Likewise. * testsuite/gas/i386/nop-6.s: Likewise. * testsuite/gas/i386/nop-bad-1.l: Likewise. * testsuite/gas/i386/nop-bad-1.s: Likewise. * testsuite/gas/i386/x86-64-nop-1.d: Likewise. * testsuite/gas/i386/x86-64-nop-2.d: Likewise. * testsuite/gas/i386/x86-64-nop-3.d: Likewise. * testsuite/gas/i386/x86-64-nop-4.d: Likewise. * testsuite/gas/i386/x86-64-nop-5.d: Likewise. * testsuite/gas/i386/x86-64-nop-6.d: Likewise.
2018-01-13Add 2.30 markers to NEWS files.Nick Clifton1-0/+2
binutils/ * NEWS: Add marker for 2.30. gas/ * NEWS: Add marker for 2.30. ld/ * NEWS: Add marker for 2.30.
2018-01-03Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2017-07-21This patch introduces support for specifing views in .loc directives, so ↵Alexandre Oliva1-0/+2
that the compiler can use the assembler to generate line number information and have the assembler determine view numbers to multiple views at the same program counter. binutils* dwarf.c (struct State_Machine_Registers): Add view field. (reset_state_machine): Reset view. (process_extended_line_op): Reset view when appropriate. (display_debug_lines_raw): Increment or reset view when appropriate. Print nonzero views. Support print view resets, disabled by default. (display_debug_lines_decoded): Likewise. Disambiguate op_code tests, enabling printing of end_sequence. * testsuite/binutils-all/dw2-1.W: Add nonzero views. * testsuite/binutils-all/dw2-3.W: Likewise. * testsuite/binutils-all/dw2-3gabi.W: Likewise. * testsuite/binutils-all/dw5.W: Add end sequence lines. * testsuite/binutils-all/i386/compressed-1a.d: Add nonzero views. * testsuite/binutils-all/libdw2-compressedgabi.out: Likewise. * testsuite/binutils-all/objdump.W: Likewise. * testsuite/binutils-all/objdump.WL: Add end sequence lines. * testsuite/binutils-all/x86-64/compressed-1a.d: Add nonzero views. gas * doc/as.texinfo (.loc): Document view support. * dwarf2dbg.c (unused): Check offset of next in struct line_entry. (current): Initialize view. (force_reset_view, view_assert_failed): New variables. (reverse_line_entry_list): New function. (set_or_check_view): Likewise. (dwarf2_gen_line_info_1): Call it. (dwarf2_where): Set view to NULL. (dwarf2_emit_insn): Return early when called before first file. (dwarf2_directive_loc): Add view support. Emit insn immediately when view option is given. (process_entries): Avoid set_address to reset view when a known address change already implies the view reset. (dwarf2dbg_final_check): New function. * dwarf2dbg.h (struct dwarf2_line_info): Add view. (dwarf2dbg_final_check): Declare. * read.c (s_leb128): Parse expression as deferred. * testsuite/gas/all/gas.exp: Run sleb128-9. * testsuite/gas/all/sleb128-9.d: New. * testsuite/gas/all/sleb128-9.l: New. * testsuite/gas/all/sleb128-9.s: New. * testsuite/gas/elf/dwarf2-1.d: Add nonzero views. * testsuite/gas/elf/dwarf2-2.d: Likewise. * testsuite/gas/elf/dwarf2-5.d: New. * testsuite/gas/elf/dwarf2-5.s: New. * testsuite/gas/elf/dwarf2-6.d: New. * testsuite/gas/elf/dwarf2-6.s: New. * testsuite/gas/elf/dwarf2-7.d: New. * testsuite/gas/elf/dwarf2-7.s: New. * testsuite/gas/elf/dwarf2-8.d: New. * testsuite/gas/elf/dwarf2-8.l: New. * testsuite/gas/elf/dwarf2-8.s: New. * testsuite/gas/elf/dwarf2-9.d: New. * testsuite/gas/elf/dwarf2-9.l: New. * testsuite/gas/elf/dwarf2-9.s: New. * testsuite/gas/elf/dwarf2-10.d: New. * testsuite/gas/elf/dwarf2-10.l: New. * testsuite/gas/elf/dwarf2-10.s: New. * testsuite/gas/elf/dwarf2-11.d: New. * testsuite/gas/elf/dwarf2-11.s: New. * testsuite/gas/elf/dwarf2-12.d: New. * testsuite/gas/elf/dwarf2-12.s: New. * testsuite/gas/elf/dwarf2-13.d: New. * testsuite/gas/elf/dwarf2-13.s: New. * testsuite/gas/elf/dwarf2-14.d: New. * testsuite/gas/elf/dwarf2-14.s: New. * testsuite/gas/elf/dwarf2-15.d: New. * testsuite/gas/elf/dwarf2-15.s: New. * testsuite/gas/elf/dwarf2-16.d: New. * testsuite/gas/elf/dwarf2-16.s: New. * testsuite/gas/elf/dwarf2-17.d: New. * testsuite/gas/elf/dwarf2-17.s: New. * testsuite/gas/elf/dwarf2-18.d: New. * testsuite/gas/elf/dwarf2-18.s: New. * testsuite/gas/elf/elf.exp: Run dwarf2-5..18 tests. * testsuite/gas/i386/dw2-compress-1.d: Add nonzero views. * testsuite/gas/i386/dw2-compressed-1.d: Likewise. * testsuite/gas/i386/ilp32/lns/lns-duplicate.d: Likewise. * testsuite/gas/lns/lns-big-delta.d: Likewise. * testsuite/gas/lns/lns-duplicate.d: Likewise. * testsuite/gas/mips/loc-swap-2.d: Likewise. * testsuite/gas/mips/loc-swap-3.d: Likewise. * testsuite/gas/mips/loc-swap.d: Likewise. * testsuite/gas/mips/micromips@loc-swap-2.d: Likewise. * testsuite/gas/mips/micromips@loc-swap.d: Likewise. * testsuite/gas/mips/mips16@loc-swap-2.d: Likewise. * testsuite/gas/mips/mips16@loc-swap.d: Likewise. * testsuite/gas/mips/mips16e@loc-swap.d: Likewise. * write.c (write_object_file): Check pending view asserts. (cvt_frag_to_fill): Complain about undefined leb128 operand.
2017-07-04Add markers.Tristan Gingold1-0/+2
binutils/ 2017-07-04 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.29. gas/ 2017-07-04 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.29. ld/ 2017-07-04 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.29.
2017-06-24[ARM] Add support for ARM Cortex-R52 processorThomas Preud'homme1-1/+2
=== Context === This patch is part of a patch series to add support for ARMv8-R architecture. Its purpose is to add support for ARM Cortex-R52 processor. === Patch description === This patch adds support for Cortex-R52 as an ARMv8-R processor with CRC extensions. 2017-06-26 Thomas Preud'homme <thomas.preudhomme@arm.com> gas/ * NEWS: Mention support of ARM Cortex-R52 processor. * config/tc-arm.c (arm_cpus): Add entry for ARM Cortex-R52 processor. * doc/c-arm.texi: Mention support for -mcpu=cortex-r52.
2017-06-24[ARM] Add support for ARMv8-R in assembler and readelfThomas Preud'homme1-0/+2
=== Context === This patch is part of a patch series to add support for ARMv8-R architecture. Its purpose is to add support for ARMv8-R in GAS: instructions, build attributes and readelf. === Patch description === Although some differences exist for system registers, from GAS point of view ARMv8-R supports the same instructions as ARMv8-A Aarch32 state and a subset of its extensions. This patch therefore introduce a new feature bit to distinguish the availability of the pan, ras and rdma extensions between ARMv8-A and ARMv8-R and allow crypto, fp and simd extensions to be used by ARMv8-R. Most of the changes are then in the testsuite to (i) rename source files and error output to be shared between ARMv8-A and ARMv8-R, (ii) rename files with expected output for ARMv8-A build attributes and (iii) add new files with expected output for ARMv8-R build attributes. 2017-06-24 Thomas Preud'homme <thomas.preudhomme@arm.com> binutils/ * readelf.c (arm_attr_tag_CPU_arch): Fill value for ARMv8-R. gas/ * NEWS: Mention support for ARMv8-R architecture. * config/tc-arm.c (arm_archs): Add entry for ARMv8-R. (arm_extensions): Restrict pan, ras and rdma extension to ARMv8-A and make crypto, fp and simd extensions available to ARMv8-R. (cpu_arch_ver): Add entry for ARMv8-R. (aeabi_set_public_attributes): Update gas_assert for Tag_DIV_use logic. * testsuite/gas/arm/armv8-a+fp.s: Rename into ... * testsuite/gas/arm/armv8-ar+fp.s: This. Remove .arch directive. * testsuite/gas/arm/armv8-a+fp.d: Specify source to assemble and architecture to assemble for. * testsuite/gas/arm/armv8-r+fp.d: New. * testsuite/gas/arm/armv8-a+simd.s: Rename into ... * testsuite/gas/arm/armv8-ar+simd.s: This. Remove .arch directive. * testsuite/gas/arm/armv8-a+simd.d: Specify source to assemble and architecture to assemble for. * testsuite/gas/arm/armv8-r+simd.d: New. * testsuite/gas/arm/armv8-a-bad.s: Rename into ... * testsuite/gas/arm/armv8-ar-bad.s: This. Remove .arch directive. * testsuite/gas/arm/armv8-a-bad.l: Rename into ... * testsuite/gas/arm/armv8-ar-bad.l: This. Decrement line number by 1. * testsuite/gas/arm/armv8-a-bad.d: Specify source to assemble, architecture to assemble for and adjust error output file. * testsuite/gas/arm/armv8-r-bad.d: New. * testsuite/gas/arm/armv8-a-barrier.s: Rename into ... * testsuite/gas/arm/armv8-ar-barrier.s: This. * testsuite/gas/arm/armv8-a-barrier-arm.d: Adjust source. * testsuite/gas/arm/armv8-a-barrier-thumb.d: Likewise. * testsuite/gas/arm/armv8-r-barrier-arm.d: New. * testsuite/gas/arm/armv8-r-barrier-thumb.d: New. * testsuite/gas/arm/armv8-a-it-bad.s: Rename into ... * testsuite/gas/arm/armv8-ar-it-bad.s: This. Remove .arch directive. * testsuite/gas/arm/armv8-a-it-bad.l: Rename into ... * testsuite/gas/arm/armv8-ar-it-bad.l: This. Decrement line number by 1. * testsuite/gas/arm/armv8-a-it-bad.d: Specify source to assemble, architecture to assemble for and adjust error output file. * testsuite/gas/arm/armv8-r-it-bad.d: New. * testsuite/gas/arm/armv8-a.s: Rename into ... * testsuite/gas/arm/armv8-ar.s: This. Remove .arch directive. * testsuite/gas/arm/armv8-a.d: Specify source to assemble and architecture to assemble for. * testsuite/gas/arm/armv8-r.d: New. * testsuite/gas/arm/attr-march-armv8-r+crypto.d: New. * testsuite/gas/arm/attr-march-armv8-r+fp.d: New. * testsuite/gas/arm/attr-march-armv8-r+simd.d: New. * testsuite/gas/arm/attr-march-armv8-r.d: New. * testsuite/gas/arm/crc32.s: Rename into ... * testsuite/gas/arm/crc32-armv8-ar.s: This. * testsuite/gas/arm/crc32.d: Rename into ... * testsuite/gas/arm/crc32-armv8-a.d: This. Specify source to assemble. * testsuite/gas/arm/crc32-armv8-r.d: New. * testsuite/gas/arm/crc32-bad.s: Rename into ... * testsuite/gas/arm/crc32-armv8-ar-bad.s: This. * testsuite/gas/arm/crc32-bad.d: Rename into ... * testsuite/gas/arm/crc32-armv8-a-bad.d: This. Specify source to assemble. * testsuite/gas/arm/crc32-armv8-r-bad.d: New. * testsuite/gas/arm/mask_1.s: Rename into ... * testsuite/gas/arm/mask_1-armv8-ar.s: This. * testsuite/gas/arm/mask_1.d: Rename into ... * testsuite/gas/arm/mask_1-armv8-a.d: This. Specify source to assemble. * testsuite/gas/arm/mask_1-armv8-r.d: new. include/ * elf/arm.h (TAG_CPU_ARCH_V8R): New macro. * opcode/arm.h (ARM_EXT2_V8A): New macro. (ARM_AEXT2_V8A): Rename into ... (ARM_AEXT2_V8AR): This. (ARM_AEXT2_V8A): New macro. (ARM_AEXT_V8R): New macro. (ARM_AEXT2_V8R): New macro. (ARM_ARCH_V8R): New macro.
2017-04-04Support ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXXH.J. Lu1-0/+2
Mark an ALLOC section, which should be placed in special memory area, with SHF_GNU_MBIND. Its sh_info field indicates the special memory type. GNU_MBIND section names start with ".mbind" so that they are placed as orphan sections by linker. All input GNU_MBIND sections with the same sh_type, sh_flags and sh_info are placed in one output GNU_MBIND section. In executable and shared object, create a GNU_MBIND segment for each GNU_MBIND section and its segment type is PT_GNU_MBIND_LO plus the sh_info value. Each GNU_MBIND segment is aligned at page boundary. The assembler syntax: .section .mbind.foo,"adx",%progbits ^ 0: Special memory type. | 'd' for SHF_GNU_MBIND. .section .mbind.foo,"adx",%progbits,0x1 ^ 1: Special memory type. | 'd' for SHF_GNU_MBIND. .section .mbind.bar,"adG",%progbits,.foo_group,comdat,0x2 ^ 2: Special memory type. | 'd' for SHF_GNU_MBIND. bfd/ * elf.c (get_program_header_size): Add a GNU_MBIND segment for each GNU_MBIND section and align GNU_MBIND section to page size. (_bfd_elf_map_sections_to_segments): Create a GNU_MBIND segment for each GNU_MBIND section. (_bfd_elf_init_private_section_data): Copy sh_info from input for GNU_MBIND section. binutils/ * NEWS: Mention support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. * readelf.c (get_segment_type): Handle PT_GNU_MBIND_XXX. (get_elf_section_flags): Handle SHF_GNU_MBIND. (process_section_headers): Likewise. * testsuite/binutils-all/mbind1.s: New file. * testsuite/binutils-all/objcopy.exp: Run readelf test on mbind1.s. gas/ * NEWS: Mention support for ELF SHF_GNU_MBIND. * config/obj-elf.c (section_match): New. (get_section): Match both sh_info and group name. (obj_elf_change_section): Add argument for sh_info. Pass both sh_info and group name to get_section. Issue an error for SHF_GNU_MBIND section without SHF_ALLOC. Set sh_info. (obj_elf_parse_section_letters): Set SHF_GNU_MBIND for 'd'. (obj_elf_section): Support SHF_GNU_MBIND section info. * config/obj-elf.h (obj_elf_change_section): Add argument for sh_info. * config/tc-arm.c (start_unwind_section): Pass 0 as sh_info to obj_elf_change_section. * config/tc-ia64.c (obj_elf_vms_common): Likewise. * config/tc-microblaze.c (microblaze_s_data): Likewise. (microblaze_s_sdata): Likewise. (microblaze_s_rdata): Likewise. (microblaze_s_bss): Likewise. * config/tc-mips.c (s_change_section): Likewise. * config/tc-msp430.c (msp430_profiler): Likewise. * config/tc-rx.c (parse_rx_section): Likewise. * config/tc-tic6x.c (tic6x_start_unwind_section): Likewise. * doc/as.texinfo: Document 'd' for SHF_GNU_MBIND. * testsuite/gas/elf/elf.exp: Run section12a, section12b and section13. * testsuite/gas/elf/section10.d: Updated. * testsuite/gas/elf/section10.s: Likewise. * testsuite/gas/elf/section12.s: New file. * testsuite/gas/elf/section12a.d: Likewise. * testsuite/gas/elf/section12b.d: Likewise. * testsuite/gas/elf/section13.l: Likewise. * testsuite/gas/elf/section13.d: Likewise. * testsuite/gas/elf/section13.s: Likewise. include/ * elf/common.h (PT_GNU_MBIND_NUM): New. (PT_GNU_MBIND_LO): Likewise. (PT_GNU_MBIND_HI): Likewise. (SHF_GNU_MBIND): Likewise. ld/ * NEWS: Mention support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. * emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Place input GNU_MBIND sections with the same type, attributes and sh_info field into a single output GNU_MBIND section. * testsuite/ld-elf/elf.exp: Run mbind2a and mbind2b. * testsuite/ld-elf/mbind1.s: New file. * testsuite/ld-elf/mbind1a.d: Likewise. * testsuite/ld-elf/mbind1b.d: Likewise. * testsuite/ld-elf/mbind1c.d: Likewise. * testsuite/ld-elf/mbind2a.s: Likewise. * testsuite/ld-elf/mbind2b.c: Likewise.
2017-03-30Add support for the WebAssembly file format and the wasm32 ELF conversion to ↵Pip Cet1-0/+2
gas and the binutils. binutils * readelf.c: Add support for wasm32 ELF format WebAssembly files. (guess_is_rela): Likewise. (dump_relocations): Likewise. (is_32bit_abs_reloc): Likewise. (is_none_reloc_): Likewise. * NEWS: Mention the new support. * testsuite/lib/binutils-common.exp (is_elf_format): Mark wasm32 as ELF target. (supports_gnu_unique): Mark wasm32 as supporting STB_GNU_UNIQUE. * testsuite/binutils-all/nm.exp: Mark wasm32 as requiring .size annotations. * testsuite/binutils-all/wasm32: New directory. * testsuite/binutils-all/wasm32/create-wasm.d: New file. * testsuite/binutils-all/wasm32/create-wasm.s: Likewise. * testsuite/binutils-all/wasm32/custom-section.d: Likewise. * testsuite/binutils-all/wasm32/custom-section.s: Likewise. * testsuite/binutils-all/wasm32/invalid-wasm-1.d: Likewise. * testsuite/binutils-all/wasm32/invalid-wasm-1.s: Likewise. * testsuite/binutils-all/wasm32/long-sections.d: Likewise. * testsuite/binutils-all/wasm32/long-sections.s: Likewise. * testsuite/binutils-all/wasm32/parse-wasm.d: Likewise. * testsuite/binutils-all/wasm32/parse-wasm.s: Likewise. * testsuite/binutils-all/wasm32/parse-wasm-2.d: Likewise. * testsuite/binutils-all/wasm32/parse-wasm-2.s: Likewise. * testsuite/binutils-all/wasm32/prepared-section.d: Likewise. * testsuite/binutils-all/wasm32/prepared-section.s: Likewise. * testsuite/binutils-all/wasm32/wasm32.exp: New file, run tests. gas * config/tc-wasm32.h: New file: Add WebAssembly assembler target. * config/tc-wasm32.c: New file: Add WebAssembly assembler target. * Makefile.am: Add WebAssembly assembler target. * configure.tgt: Add WebAssembly assembler target. * doc/c-wasm32.texi: New file: Start documenting WebAssembly assembler. * doc/all.texi: Define WASM32. * doc/as.texinfo: Add WebAssembly entries. * NEWS: Mention the new support. * Makefile.in: Regenerate. * po/gas.pot: Regenerate. * po/POTFILES.in: Regenerate. * testsuite/gas/wasm32: New directory. * testsuite/gas/wasm32/allinsn.d: New file. * testsuite/gas/wasm32/allinsn.s: New file. * testsuite/gas/wasm32/illegal.l: New file. * testsuite/gas/wasm32/illegal.s: New file. * testsuite/gas/wasm32/illegal-2.l: New file. * testsuite/gas/wasm32/illegal-2.s: New file. * testsuite/gas/wasm32/illegal-3.l: New file. * testsuite/gas/wasm32/illegal-3.s: New file. * testsuite/gas/wasm32/illegal-4.l: New file. * testsuite/gas/wasm32/illegal-4.s: New file. * testsuite/gas/wasm32/illegal-5.l: New file. * testsuite/gas/wasm32/illegal-5.s: New file. * testsuite/gas/wasm32/illegal-6.l: New file. * testsuite/gas/wasm32/illegal-6.s: New file. * testsuite/gas/wasm32/illegal-7.l: New file. * testsuite/gas/wasm32/illegal-7.s: New file. * testsuite/gas/wasm32/illegal-8.l: New file. * testsuite/gas/wasm32/illegal-8.s: New file. * testsuite/gas/wasm32/illegal-9.l: New file. * testsuite/gas/wasm32/illegal-9.s: New file. * testsuite/gas/wasm32/illegal-10.l: New file. * testsuite/gas/wasm32/illegal-10.s: New file. * testsuite/gas/wasm32/illegal-11.l: New file. * testsuite/gas/wasm32/illegal-11.s: New file. * testsuite/gas/wasm32/illegal-12.l: New file. * testsuite/gas/wasm32/illegal-12.s: New file. * testsuite/gas/wasm32/illegal-13.l: New file. * testsuite/gas/wasm32/illegal-13.s: New file. * testsuite/gas/wasm32/illegal-14.l: New file. * testsuite/gas/wasm32/illegal-14.s: New file. * testsuite/gas/wasm32/illegal-15.l: New file. * testsuite/gas/wasm32/illegal-15.s: New file. * testsuite/gas/wasm32/illegal-16.l: New file. * testsuite/gas/wasm32/illegal-16.s: New file. * testsuite/gas/wasm32/illegal-17.l: New file. * testsuite/gas/wasm32/illegal-17.s: New file. * testsuite/gas/wasm32/illegal-18.l: New file. * testsuite/gas/wasm32/illegal-18.s: New file. * testsuite/gas/wasm32/illegal-19.l: New file. * testsuite/gas/wasm32/illegal-19.s: New file. * testsuite/gas/wasm32/illegal-20.l: New file. * testsuite/gas/wasm32/illegal-20.s: New file. * testsuite/gas/wasm32/illegal-21.l: New file. * testsuite/gas/wasm32/illegal-21.s: New file. * testsuite/gas/wasm32/illegal-22.l: New file. * testsuite/gas/wasm32/illegal-22.s: New file. * testsuite/gas/wasm32/illegal-24.l: New file. * testsuite/gas/wasm32/illegal-24.s: New file. * testsuite/gas/wasm32/illegal-25.l: New file. * testsuite/gas/wasm32/illegal-25.s: New file. * testsuite/gas/wasm32/reloc.d: New file. * testsuite/gas/wasm32/reloc.s: New file. * testsuite/gas/wasm32/wasm32.exp: New tests for WebAssembly architecture. opcodes * configure.ac: Add (empty) bfd_wasm32_arch target. * configure: Regenerate * po/opcodes.pot: Regenerate. include * opcode/wasm.h: New file to support wasm32 architecture. * elf/wasm32.h: Add R_WASM32_32 relocation. bfd * elf32-wasm32.c: Add relocation code, two relocs. * reloc.c: Add wasm32 relocations. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. * bfd/po/bfd.pot: Regenerate.
2017-02-20Downgrade powerpc register error to warningAlan Modra1-2/+2
PR 21118 * NEWS: Revise powerpc register check. * config/tc-ppc.c (ppc_optimize_expr, md_assemble): Make "invalid register expression" a warning.
2017-02-14PowerPC register expression checksAlan Modra1-0/+4
This stops powerpc gas blithely accepting such nonsense as "addi %f4,%cr3,%r31". PR 21118 gas/ * NEWS: Mention powerpc register checks. * config/tc-ppc.c (struct pd_reg): Make value a short. Add flags. (pre_defined_registers): Delete fpscr and pmr entries. Set register type in flags. (cr_names): Set type in flags. (reg_name_search): Return pointer to struct pd_reg rather than value. (register_name): Adjust to suit. Set X_md from flags. (ppc_parse_name): Likewise. (ppc_optimize_expr): New function. (md_assemble): Verify expresion reg flags match operand. * config/tc-ppc.h (md_optimize_expr): Define. (ppc_optimize_expr): Declare. include/ * opcode/ppc.h (PPC_OPERAND_*): Reassign values, regs first. (PPC_OPERAND_SPR, PPC_OPERAND_GQR): Define. opcodes/ * ppc-opc.c (powerpc_operands): Flag SPR, SPRG and TBR entries with PPC_OPERAND_SPR. Flag PSQ and PSQM with PPC_OPERAND_GQR.
2017-01-02Update year range in copyright notice of all files.Alan Modra1-1/+1
2016-12-31PRU GAS PortDimitar Dimitrov1-0/+2
* NEWS: Mention new PRU target. * Makefile.am: Add PRU target. * config/obj-elf.c: Ditto. * configure.tgt: Ditto. * config/tc-pru.c: New file. * config/tc-pru.h: New file. * doc/Makefile.am: Add documentation for PRU GAS port. * doc/all.texi, Ditto. * doc/as.texinfo: Ditto. * doc/c-pru.texi: Document PRU GAS options. * Makefile.in: Regenerate. * doc/Makefile.in: Regenerate. * po/POTFILES.in: Regenerate. * testsuite/gas/pru/alu.d: New file for PRU GAS testsuite. * testsuite/gas/pru/alu.s: Ditto. * testsuite/gas/pru/branch.d: Ditto. * testsuite/gas/pru/branch.s: Ditto. * testsuite/gas/pru/illegal.l: Ditto. * testsuite/gas/pru/illegal.s: Ditto. * testsuite/gas/pru/ldi.d: Ditto. * testsuite/gas/pru/ldi.s: Ditto. * testsuite/gas/pru/ldst.d: Ditto. * testsuite/gas/pru/ldst.s: Ditto. * testsuite/gas/pru/loop.d: Ditto. * testsuite/gas/pru/loop.s: Ditto. * testsuite/gas/pru/misc.d: Ditto. * testsuite/gas/pru/misc.s: Ditto. * testsuite/gas/pru/pru.exp: Ditto. * testsuite/gas/pru/pseudo.d: Ditto. * testsuite/gas/pru/pseudo.s: Ditto. * testsuite/gas/pru/warn_reglabel.l: Ditto. * testsuite/gas/pru/warn_reglabel.s: Ditto. * testsuite/gas/pru/xfr.d: Ditto. * testsuite/gas/pru/xfr.s: Ditto. * testsuite/gas/lns/lns.exp: Mark lns-common-1-alt variant for PRU. Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
2016-12-23Add marker in NEWS filesTristan Gingold1-0/+2
binutils/ 2016-12-23 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.28. gas/ 2016-12-23 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.28. ld/ 2016-12-23 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.28.
2016-11-04Add support for ARM Cortex-M33 processorThomas Preud'homme1-1/+1
2016-11-04 Thomas Preud'homme <thomas.preudhomme@arm.com> gas/ * config/tc-arm.c (cortex-m33): Declare new processor. * doc/c-arm.texi (-mcpu ARM command line option): Document new Cortex-M33 processor. * NEWS: Mention ARM Cortex-M33 support.
generated by cgit v1.1 at 2025-01-07 09:57:20 +0000