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AgeCommit message (Expand)AuthorFilesLines
2019-04-25Speed up locview resolution with relaxable fragsAlexandre Oliva1-0/+8
2019-04-24resolve_symbol_value vs. .loc view resolutionAlan Modra1-0/+13
2019-04-24S12Z: Opcodes: Handle bit map operations with non-canonical operands.John Darrington1-0/+6
2019-04-19RX Assembler: Ensure that the internal limit on the number of relaxation iter...Nick Clifton1-0/+9
2019-04-18Improve warning message for $0 constraint on MIPSR6 branchesMatthew Fortune1-0/+6
2019-04-18MSP430 Assembler: Define symbols for functions to run through.Jozef Lawrynowicz1-0/+13
2019-04-17MSP430 Assembler: Leave placement of .lower and .upper sections to generic li...Jozef Lawrynowicz1-0/+13
2019-04-17MSP420 assembler: Add -m{u,U} options to enable/disable NOP warnings for unk...Jozef Lawrynowicz1-0/+25
2019-04-16xfail gas weakref1 test for nds32Alan Modra1-0/+4
2019-04-16ns32k testsuite tidyAlan Modra1-0/+5
2019-04-16Move fixup fx_bit_fixP and fx_im_disp fields to TC_FIX_TYPEAlan Modra1-0/+20
2019-04-16Make fixup fx_where unsignedAlan Modra1-0/+12
2019-04-16Make frag fr_fix unsignedAlan Modra1-0/+17
2019-04-15[binutils, ARM, 16/16] Add support to VLDR and VSTR of system registersAndre Vieira1-0/+19
2019-04-15[binutils, ARM, 15/16] Add support for VSCCLRMAndre Vieira1-0/+26
2019-04-15[binutils, ARM, 13/16] Add support for CLRMAndre Vieira1-0/+26
2019-04-15[binutils, ARM, 12/16] Scalar Low Overhead loop instructions for Armv8.1-M Ma...Andre Vieira1-0/+22
2019-04-15[binutils, ARM, 11/16] New BFCSEL instruction for Armv8.1-M MainlineAndre Vieira1-0/+14
2019-04-15[binutils, ARM, 10/16] BFCSEL infrastructure with new global reloc R_ARM_THM_...Andre Vieira1-0/+7
2019-04-15[binutils, ARM, 9/16] New BFL instruction for Armv8.1-M MainlineAndre Vieira1-0/+14
2019-04-15[binutils, ARM, 8/16] BFL infrastructure with new global reloc R_ARM_THM_BF18Andre Vieira1-0/+7
2019-04-15[binutils, ARM, 7/16] New BFX and BFLX instruction for Armv8.1-M MainlineAndre Vieira1-0/+11
2019-04-15[binutils, ARM, 6/16] New BF instruction for Armv8.1-M MainlineAndre Vieira1-0/+14
2019-04-15[binutils, ARM, 5/16] BF insns infrastructure with new global reloc R_ARM_THM...Andre Vieira1-0/+7
2019-04-15[binutils, ARM, 4/16] BF insns infrastructure with array of relocs in struct ...Andre Vieira1-0/+6
2019-04-15[binutils, ARM, 3/16] BF insns infrastructure with new bfd_reloc_code_real fo...Andre Vieira1-0/+10
2019-04-15[GAS, ARM, 2/16] Add CLI extension support for Armv8.1-M MainlineAndre Vieira1-0/+10
2019-04-15[binutils, ARM, 1/16] Add support for Armv8.1-M Mainline CLIAndre Vieira1-0/+8
2019-04-13[MIPS] Add i6500 CPU and fix i6400 default ASEsMatthew Fortune1-0/+9
2019-04-13[MIPS] Apply ASE information for the selected processorMatthew Fortune1-0/+12
2019-04-12GAS: S12Z: Remove definition of macro TC_M68K.John Darrington1-0/+4
2019-04-12GAS: tc-s12z.c: int -> bfd_booleanJohn Darrington1-0/+4
2019-04-11xtensa: gas: add relaxations testsMax Filippov1-0/+24
2019-04-11xtensa: gas: convert tests to run_dump_testsMax Filippov1-0/+18
2019-04-11xtensa: gas: clean up literal management codeMax Filippov1-0/+11
2019-04-11xtensa: gas: put .literal_position at section startMax Filippov1-0/+15
2019-04-11[BINUTILS, AArch64, 2/2] Update Store Allocation Tag instructionsSudakshina Das1-0/+10
2019-04-11[BINUTILS, AArch64, 1/2] Add new LDGM/STGM instructionSudakshina Das1-0/+7
2019-04-10Disable R_X86_64_PLT32 generation as branch marker on Solaris/x86Rainer Orth1-0/+23
2019-04-10te-cloudabi.hAlan Modra1-0/+8
2019-04-09[MIPS] Add RDHWR with the SEL field for MIPS R6.Robert Suchanek1-0/+7
2019-04-08x86: Define GNU_PROPERTY_X86_ISA_1_AVX512_BF16H.J. Lu1-0/+8
2019-04-08x86: Remove i386-*-kaos* and i386-*-chaos targetsH.J. Lu1-0/+6
2019-04-05x86: Add assembler -mx86-used-note=yes testH.J. Lu1-0/+7
2019-04-05x86: Support Intel AVX512 BF16Xuepeng Guo1-0/+19
2019-04-05PowerPC conditional branch testAlan Modra1-0/+11
2019-04-05PowerPC disassembler: Don't emit trailing spacesAlan Modra1-0/+15
2019-04-04Add extended mnemonics for bctar. Fix setting of 'at' branch hints.Peter Bergner1-0/+25
2019-04-03gas: use literals/const16 for xtensa loop relaxationMax Filippov1-0/+10
2019-04-01[GAS, Arm] CLI with architecture sensitive extensionsAndre Vieira1-0/+61
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