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2020-09-14Add a new ".nop" directive to the assembler to allow the creation of no-op in...Nick Clifton1-0/+26
2020-09-11gas: Don't error when .debug_line already exists, unless .loc was usedMark Wielaard1-0/+14
2020-09-10CSKY: Enable extend lrw by default for CK802, CK803 and CK860.Cooper Qu1-0/+5
2020-09-10CSKY: Add new arches while refine the cpu option process.Cooper Qu1-0/+31
2020-09-09power10 on ppc32Alan Modra1-0/+5
2020-09-09CSKY: Change mvtc and mulsw's ISA flag.Cooper Qu1-0/+5
2020-09-09CSKY: Support option -mfloat-abi.Cooper Qu1-0/+10
2020-09-09CSKY: Add FPUV3 instructions, which supported by ck860f.Cooper Qu1-0/+28
2020-09-08MSP430: Support relocations for subtract expressions in .uleb128 directivesJozef Lawrynowicz1-0/+6
2020-09-08aarch64: Add -mcpu option for Cortex-R82Alex Coplan1-0/+5
2020-09-08aarch64: Add support for Armv8-R system registersAlex Coplan1-0/+14
2020-09-08aarch64: Add support for Armv8-R DFB aliasAlex Coplan1-0/+5
2020-09-08aarch64: Add base support for Armv8-RAlex Coplan1-0/+5
2020-09-07gas: Output directory and file names in .debug_line_str for DWARF5Mark Wielaard1-0/+11
2020-09-07gas: Output .debug_rnglists for DWARF 5.Mark Wielaard1-1/+11
2020-09-07gas: Make sure to only add an md5 to a .file when requested.Mark Wielaard1-0/+6
2020-09-03gas: Use DW_FORM_sec_offset for DWARF version 4 or higher.Mark Wielaard1-0/+5
2020-09-02ubsan: expr.c:1725,1741 signed integer overflowAlan Modra1-0/+5
2020-09-02ubsan: tc-z80.c:3656 shift exponent 32 is too largeAlan Modra1-0/+4
2020-09-02ubsan: tc-sparc.c:1146 left shift cannot be representedAlan Modra1-0/+5
2020-09-02ubsan: tc-nios2.c:1403 shift exponent 32 is too largeAlan Modra1-0/+4
2020-09-02ubsan: tc-mips.c:9606 shift exponent 32 is too largeAlan Modra1-0/+4
2020-09-02ubsan: tc-d30v.c left shift cannot be representedAlan Modra1-0/+4
2020-09-02ubsan: rx-parse.y:1743 shift exponent 32 is too largeAlan Modra1-0/+6
2020-09-02ubsan: obj-macho.c:503 left shift cannot be representedAlan Modra1-0/+5
2020-09-02ubsan: bfin-lex.l:503 left shift cannot be representedAlan Modra1-0/+4
2020-09-0232-bit host pdp11 breakageAlan Modra1-0/+5
2020-09-02CSKY: Add CPU CK803r3.Cooper Qu1-0/+6
2020-09-02CSKY: Fix Encode of mulsws.Cooper Qu1-0/+4
2020-09-02CSKY: Refine literals pool dump process and float register parser.Cooper Qu1-0/+7
2020-09-01ELF: Document the .tls_common directiveH.J. Lu1-0/+4
2020-09-01PR26420, PR26421, PR26425, PR26427 UBSAN: tc-arm.c left shiftsAlan Modra1-0/+20
2020-08-31PR26510 UBSAN: tc-z8k.c left shift of negative valueAlan Modra1-0/+7
2020-08-31PR26503 UBSAN: tc-v850.c:1447 left shift cannot be representedAlan Modra1-0/+5
2020-08-31PR26502 UBSAN: tc-tic6x.c left shift of negative valueAlan Modra1-0/+5
2020-08-31PR26497 UBSAN: tc-sh.c:2467 left shift cannot be representedAlan Modra1-0/+5
2020-08-31PR26495 UBSAN: tc-score.c, tc-score7.c left shift of negative valueAlan Modra1-0/+6
2020-08-31PR26480 UBSAN: tc-nios2.c:1634 left shift cannot be representedAlan Modra1-0/+5
2020-08-31PR26479 UBSAN: tc-nios2.c:244 left shift cannot be representedAlan Modra1-0/+5
2020-08-31PR26472, PR26473, PR26474 UBSAN: tc-mips.c shift left UBAlan Modra1-0/+8
2020-08-31PR26471 UBSAN: tc-metag.c:7038 left shift cannot be representedAlan Modra1-0/+5
2020-08-31PR26468 UBSAN: tc-mep.c:1684 left shift of negative valueAlan Modra1-0/+6
2020-08-31PR26493 UBSAN: tc-riscv.c left shift negative and not representableAlan Modra1-0/+6
2020-08-31crx: ubsan: cannot be representedAlan Modra1-0/+16
2020-08-31PR26509 UBSAN: tc-z80.c:3656 shift exponent is too largeAlan Modra1-0/+5
2020-08-31tic4x-coff: ubsan: various shift UBAlan Modra1-0/+6
2020-08-31CSKY: Refine operand format error reporting.Cooper Qu1-0/+34
2020-08-31CSKY: Add warning when -mdsp and -mcpu=ck803ern are both added.Cooper Qu1-0/+6
2020-08-30changelog PR fixAlan Modra1-2/+2
2020-08-30cr16 disassembly error of disp20 fieldsAlan Modra1-0/+11
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