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2000-02-26Catch some more cases where we can represent a 16 bit immediate operand asAlan Modra1-0/+15
8 bit sign extended.
2000-02-26 * doc/c-mips.texi (MIPS Opts): Fix typo in last patch.Jeff Law1-0/+4
2000-02-25Extend the i386 gas testsuite to do some tests for intel_syntax. Fix allAlan Modra1-0/+11
the errors exposed by this addition. These were intel mode "fi... word ptr", "fi... dword ptr", "jmp Imm seg, Imm offset", "out dx,al". The failure with intel "out dx,al" was also present in att "out al,dx". Extend testsuite to catch this case too.
2000-02-24Add support for WinCE targeted toolchains.Nick Clifton1-0/+30
2000-02-24Yet more .intel_syntax fixes.Alan Modra1-0/+11
2000-02-24 * config/obj-som.c (obj_pseudo_table): Add "weak".Catherine Moore1-0/+5
(obj_som_weak): New routine.
2000-02-24Correct intel_syntax fsub* and fdiv* handling. Oh, how I'd like to be ridAlan Modra1-0/+10
of UNIXWARE_COMPAT.
2000-02-24config/tc-i386.c (struct _i386_insn): Combine disps, imms, regs intoAlan Modra1-0/+13
a union. Use throughout file. Delete TC_RELOC macro.
2000-02-24Remove dead code when not TC_M68K.Alan Modra1-0/+24
2000-02-24 * config/tc-i386.c (md_assemble): When swapping operands forRichard Henderson1-0/+6
intel_syntax, assume everything that's not Imm or Disp is a register.
2000-02-23Add IBM 370 support.Alan Modra1-0/+18
2000-02-22 * config/tc-d30v.c (parallel_ok): Use FLAG_NOT_WITH_ADDSUBppp toChandra Chavva1-0/+6
determine if an instruction can be used in parallel with an ADDppp or SUBppp instruction.
2000-02-222000-02-22 Andrew Haley <aph@cygnus.com>Andrew Haley1-0/+4
* doc/c-mips.texi (MIPS Opts): Document -mgp32 and -mgp64.
2000-02-221999-12-30 Andrew Haley <aph@cygnus.com>Andrew Haley1-0/+8
* config/tc-mips.c (mips_gp32): New variable. (macro_build) Use mips_gp32. (mips_ip): Ditto. (md_longopts): Add "-mgp32" and "-mgp64". (md_parse_option): Add OPTION_GP32 and OPTION_GP64.
2000-02-222000-02-22 Alexandre Oliva <oliva@lsd.ic.unicamp.br>Ian Lance Taylor1-0/+5
* config/obj-coff.c (add_lineno): Accept non-positive lineno with warning, and bump it to 1.
2000-02-22 From Brad Lucier <lucier@math.purdue.edu>:Ian Lance Taylor1-0/+6
* dwarf2dbg.c (print_stats): Add cast to force printf argument to match format.
2000-02-21 * config/tc-mips.c (MF_HILO_INSN): Define.Catherine Moore1-0/+10
(mips_7000_hilo_fix): Declare. (append_insn): Conditionally insert nops after an mfhi/mflo insn. (md_parse_option): Check for 7000_HILO_FIX options. (OPTION_M7000_HILO_FIX): Define. (OPTION_NO_M7000_HILO_FIX): Define. * doc/c-mips.texi (-mfix7000): Describe.
2000-02-21This lot mainly cleans up `comparison between signed and unsigned' gccAlan Modra1-0/+11
warnings. One usused var, and a macro parenthesis fix too. Also check input sections are elf when doing gc in elflink.h.
2000-02-18Add a symbol's value to the computed frag offset, rather than overwriting it.Nick Clifton1-0/+5
2000-02-17bfd:Joern Rennecke1-0/+19
Reinstate bits of sh4 support that got accidentally deleted. Add sh-dsp support. bfd: * archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros. (bfd_mach_sh3_dsp): Likewise. (bfd_mach_sh4): Reinstate. (bfd_default_scan): Recognize 7410, 7708, 7729 and 7750. * bfd-in2.h: Regenerate. * coff-sh.c (struct sh_opcode): flags is no longer short. (USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros. (sh_opcode41, sh_opcode42): Integrate as sh_opcode41. (sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes. (sh_opcode41, sh_opcode4, sh_opcode80): Likewise. (sh_opcodes): No longer const. (sh_dsp_opcodef0, sh_dsp_opcodef): New arrays. (sh_insn_uses_reg): Check for USESAS and USESR8. (sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS. (_bfd_sh_align_load_span): Return early for SH4. Modify sh_opcodes lookup table for sh-dsp / sh3-dsp. Take into account that field b of a parallel processing insn could be mistaken for a separate insn. * cpu-sh.c (arch_info_struct): New array elements for sh2, sh-dsp and sh3-dsp. Reinstate element for sh4. (SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros. (SH4_NEXT): Reinstate. (SH3_NEXT, SH3E_NEXT): Adjust. * elf-bfd.h (_sh_elf_set_mach_from_flags): Declare. * elf32-sh.c (sh_elf_set_private_flags): New function. (sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise. (sh_elf_merge_private_data): New function. (elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define. (bfd_elf32_bfd_copy_private_bfd_data): Define. (bfd_elf32_bfd_merge_private_bfd_data): Change to sh_elf_merge_private_data. gas: * config/tc-sh.c ("elf/sh.h"): Include. (sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables. (md.begin): Initialize target_arch. Only include opcodes in has table that match selected architecture. (parse_reg): Recognize register names for sh-dsp. (parse_at): Recognize post-modify addressing. (get_operands): The leading space is now optional. (get_specific): Remove FDREG_N support. Add support for sh-dsp arguments. Update valid_arch. (build_Mytes): Add support for SDT_REG_N. (find_cooked_opcode): New function, broken out of md_assemble. (assemble_ppi, sh_elf_final_processing): New functions. (md_assemble): Use find_cooked_opcode and assemble_ppi. (md_longopts, md_parse_option): New option: -dsp. * config/tc-sh.h (elf_tc_final_processing): Define. (sh_elf_final_processing): Declare. include/elf: * sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros. (EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise. (EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise. opcodes: * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions. (print_insn_ppi): Likewise. (print_insn_shx): Use info->mach to select appropriate insn set. Add support for sh-dsp. Remove FD_REG_N support. * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support. (sh_arg_type): Likewise. Remove FD_REG_N. (sh_dsp_reg_nums): New enum. (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros. (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise. (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise. (arch_sh3_dsp_up): Likewise. (sh_opcode_info): New field: arch. (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and D_REG_N. Fill in arch field. Add sh-dsp insns.
2000-02-11 * config/tc-hppa.c (pa_build_unwind_subspace): Use subseg_new to createJeff Law1-0/+6
the unwinder subspace. Save the current seg/subseg before creating the new seg/subseg.
2000-02-10Add support for M340Nick Clifton1-0/+18
2000-02-10Check label validity with TC_START_LABEL_WITHOUT_COLON if defined.Timothy Wall1-0/+5
2000-02-10New preprocessor options.Timothy Wall1-0/+8
2000-02-08Remove redundant code for checking numbers with suffixes. AddTimothy Wall1-0/+10
functionality to break out of assembler loops.
2000-02-08Add handling for numbers with suffixed radix.Timothy Wall1-0/+7
2000-02-08changelog for elseif additionTimothy Wall1-0/+7
2000-02-04Remove conditionals causing a bug in listings.Timothy Wall1-0/+5
2000-02-03octets vs bytes changes for GASTimothy Wall1-0/+32
2000-02-02Fix bug in stabs filename encoding where backslashes are present.Timothy Wall1-0/+6
2000-01-31Add ATPCS register naming supportNick Clifton1-1/+5
2000-01-31* config/obj-coff.h (OBJ_COPY_SYMBOL_ATTRIBUTES): Don't define ifGeoffrey Keating1-1/+10
already defined. * config/tc-ppc.h [OBJ_XCOFF] (OBJ_COPY_SYMBOL_ATTRIBUTES): New macro. * config/tc-ppc.c (ppc_fix_adjustable): Don't look at the frag of a symbol when we really care about its value.
2000-01-31Cathc unwanted text after instructionsNick Clifton1-0/+5
2000-01-27Apply Thoams de Lellis's patch to fic disassembly of Thumb instructions whenNick Clifton1-0/+7
bounded by non-function labels.
2000-01-26This set of patches add support for aout emulation on the x86Alan Modra1-0/+128
assembler. ie. You will be able to do "as --em=i386aout" on an x86 linux-elf assembler to generate aout format object files, rather than using a separate assembler. The aout emulation is enabled by giving "--enable-targets=i386-linuxaout" to configure. Oh yeah, there's a couple of fixes too. Error messages shouldn't be passed to printf in the format arg just in case someone puts a `%' in the message.
2000-01-15Cosmetic changes to tc-i386.[ch] + extend x86 gas testsuite jmp andAlan Modra1-0/+11
call tests + tweak intel mode far call and jmp.
2000-01-142000-01-13 Clinton Popetz <cpopetz@cygnus.com>Clinton Popetz1-0/+5
* config/tc-mips.c (mips_do_align): New function. * config/tc-mips.h (md_do_align): Define.
2000-01-10fixup ARM documentationNick Clifton1-0/+7
2000-01-10Add arm-conix targetNick Clifton1-0/+7
2000-01-03ELF visibility patch from Martin LoewisNick Clifton1-0/+8
1999-12-27x86 indirect jump/call syntax fixes. Disassembly fix for lcall.Alan Modra1-0/+6
1999-12-22Apply patch from Philip Blundell to allow .previous to work for arm-elfNick Clifton1-1/+7
1999-12-14Add support for -marm720 command line switchNick Clifton1-0/+5
1999-12-01 * config/tc-mn10300.c (md_pseudo_table): Add ".am33" pseudo-op.Jeff Law1-0/+9
(r_registers, xr_registers): Define. (r_register_name, xr_register_name): New functions. (md_assemble): Handle new am33 operand types and instruction formats. (mn10300_insert_operand, check_operand): Likewise.
1999-11-29Fix .force_thumbNick Clifton1-0/+7
1999-11-29Add support for !literal and !lituse_baseMichael Meissner1-0/+50
1999-11-25 * config/tc-hppa.c (pa_ip): Handle PA2.0 unit completers. HandleJeff Law1-0/+5
'B' operand for PA2.0 bb instruction.
1999-11-18Fix generation of RVA relocsNick Clifton1-0/+10
1999-11-16* config/tc-i386.c (i386_immediate): Disallow O_big immediates.Alan Modra1-0/+5
(i386_displacement): Disallow O_big displacements.
1999-11-16log entry for config/tc-arm.c changeDonald Lindsay1-0/+7
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