aboutsummaryrefslogtreecommitdiff
path: root/gas/ChangeLog
AgeCommit message (Expand)AuthorFilesLines
2016-09-21[AArch64][SVE 29/32] Add new SVE core & FP register operandsRichard Sandiford1-0/+5
2016-09-21[AArch64][SVE 28/32] Add SVE FP immediate operandsRichard Sandiford1-0/+6
2016-09-21[AArch64][SVE 27/32] Add SVE integer immediate operandsRichard Sandiford1-0/+5
2016-09-21[AArch64][SVE 26/32] Add SVE MUL VL addressing modesRichard Sandiford1-0/+9
2016-09-21[AArch64][SVE 25/32] Add support for SVE addressing modesRichard Sandiford1-0/+15
2016-09-21[AArch64][SVE 24/32] Add AARCH64_OPND_SVE_PATTERN_SCALEDRichard Sandiford1-0/+8
2016-09-21[AArch64][SVE 23/32] Add SVE pattern and prfop operandsRichard Sandiford1-0/+7
2016-09-21[AArch64][SVE 22/32] Add qualifiers for merging and zeroing predicationRichard Sandiford1-0/+9
2016-09-21[AArch64][SVE 21/32] Add Zn and Pn registersRichard Sandiford1-0/+18
2016-09-21[AArch64][SVE 20/32] Add support for tied operandsRichard Sandiford1-0/+5
2016-09-21[AArch64][SVE 13/32] Add an F_STRICT flagRichard Sandiford1-0/+5
2016-09-21[AArch64][SVE 12/32] Remove boolean parameters from parse_address_mainRichard Sandiford1-0/+16
2016-09-21[AArch64][SVE 11/32] Tweak aarch64_reg_parse_32_64 interfaceRichard Sandiford1-0/+25
2016-09-21[AArch64][SVE 10/32] Move range check out of parse_aarch64_imm_floatRichard Sandiford1-0/+5
2016-09-21[AArch64][SVE 09/32] Improve error messages for invalid floatsRichard Sandiford1-0/+11
2016-09-21[AArch64][SVE 08/32] Generalise aarch64_double_precision_fmovableRichard Sandiford1-0/+8
2016-09-21[AArch64][SVE 07/32] Replace hard-coded uses of REG_TYPE_R_Z_BHSDQ_VRichard Sandiford1-0/+12
2016-09-21[AArch64][SVE 06/32] Generalise parse_neon_reg_listRichard Sandiford1-0/+7
2016-09-21[AArch64][SVE 05/32] Rename parse_neon_type_for_operandRichard Sandiford1-0/+6
2016-09-21[AArch64][SVE 04/32] Rename neon_type_el to vector_type_elRichard Sandiford1-0/+13
2016-09-21[AArch64][SVE 03/32] Rename neon_el_type to vector_el_typeRichard Sandiford1-0/+8
2016-09-21[AArch64][SVE 01/32] Remove parse_neon_operand_typeRichard Sandiford1-0/+5
2016-09-16[ARC] Disassemble correctly extension instructions.Claudiu Zissulescu1-0/+5
2016-09-15gas: run the sparc test dcti-couples-v9 only in ELF targets.Jose E. Marchesi1-0/+6
2016-09-14Modify POWER9 support to match final ISA 3.0 documentation.Peter Bergner1-0/+8
2016-09-14gas: improve architecture mismatch diagnostics in sparcJose E. Marchesi1-0/+5
2016-09-14gas: detect DCTI couples in sparcJose E. Marchesi1-0/+19
2016-09-14[ARC] Fix parsing dtpoff relocation expression.Claudiu Zissulescu1-0/+7
2016-09-12S/390: Add alternate processor names.Andreas Krebbel1-0/+7
2016-09-12S/390: Fix facility bit default.Andreas Krebbel1-0/+4
2016-09-12S/390: Fix kmctr instruction type.Patrick Steuer1-0/+4
2016-09-08Allow PROCESSOR_IAMCU for Intel MCUH.J. Lu1-0/+5
2016-09-07X86: Allow additional ISAs for IAMCU in assemblerH.J. Lu1-0/+16
2016-09-07[arm] Automatically enable CRC instructions on supported ARMv8-A CPUs.Richard Earnshaw1-0/+5
2016-08-31PowerPC VLE sh_flags and p_flagsAlan Modra1-0/+6
2016-08-26opcodes, gas: fix mnemonic of sparc camellia_flJose E. Marchesi1-0/+6
2016-08-26Add missing ARMv8-M special registersThomas Preud'homme1-0/+14
2016-08-25Remove _S version of ARM MSR/MRS special registersThomas Preud'homme1-0/+10
2016-08-24X86: Add ptwrite instructionH.J. Lu1-0/+13
2016-08-19ARM: Issue a warning when the MRRC and MRRC2 instructions are used with the s...Tamar Christina1-0/+7
2016-08-19Place .shstrtab section after .symtab and .strtab, thus restoring monotonical...Nick Clifton1-0/+25
2016-08-11[AArch64] Reject -0.0 as an 8-bit FP immediateRichard Sandiford1-0/+6
2016-08-05Ensure ARM VPUSH and VPOP instructions do not affect more than 16 registers.Nick Clifton1-0/+9
2016-08-05Fix the generation of alignment frags in code sections for AArch64.Nick Clifton1-0/+10
2016-08-04Fix generation of relocs for 32-bit Sparc Solaris targets.Stefan Trleman1-0/+7
2016-07-29gas: avoid spurious failures in non-ELF targets in the SPARC testsuite.Jose E. Marchesi1-0/+13
2016-07-27MIPS/GAS: Implement microMIPS branch/jump compactionMaciej W. Rozycki1-0/+70
2016-07-27Begin implementing ARC NPS-400 Accelerator instructionsGraham Markall1-0/+18
2016-07-26MIPS/GAS: Respect the `insn32' mode in branch relaxationMaciej W. Rozycki1-0/+29
2016-07-21Set BFD_VERSION to 2.27.51H.J. Lu1-0/+4
generated by cgit v1.1 at 2025-08-11 23:11:26 +0000