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2018-09-14x86: Check non-WIG EVEX instruction encoding with -mevexwig=1H.J. Lu1-0/+10
2018-09-14x86: Support VEX/EVEX WIG encodingH.J. Lu1-0/+7
2018-09-14x86: Handle unsupported static rounding in vcvt[u]si2sd in 32-bit modeH.J. Lu1-0/+5
2018-09-14x86: Properly decode EVEX.W in vcvt[u]si2s[sd] in 32-bit modeH.J. Lu1-0/+7
2018-09-14csky: Support PC relative diff relocationLifang Xia1-0/+9
2018-09-14x86: fold CRC32 templatesJan Beulich1-0/+5
2018-09-13x86: Swap destination/source to encode VEX only if possibleH.J. Lu1-0/+5
2018-09-13x86: also allow D on 3-operand insnsJan Beulich1-0/+7
2018-09-13x86: use D attribute also for SIMD templatesJan Beulich1-0/+13
2018-09-13x86: fold ILP32 output of "opts" testsJan Beulich1-0/+8
2018-09-13x86: improve operand reversalJan Beulich1-0/+11
2018-09-13x86: add code comment on deprecated status of pseudo-suffixesJan Beulich1-0/+5
2018-09-13x86-64: bndmk, bndldx, and bndstx don't allow RIP-relative addressingJan Beulich1-0/+6
2018-09-13Fix the use by the RL78 assembler of an uninitialised field in the expresion ...Nick Clifton1-0/+13
2018-09-06PR23570, AVR .noinit section defaults to PROGBITSAlan Modra1-0/+5
2018-09-04gas, sparc: Allow non-fpop2 instructions before floating point branchesDaniel Cederman1-0/+8
2018-09-03Change the .section directive for the AVR assembler so that the .noinit secti...Nick Clifton1-0/+7
2018-08-31RISC-V: Correct the requirement of compressed floating point instructionsJim Wilson1-0/+6
2018-08-31gas/elf/section14.d: Change skip to xfailH.J. Lu1-0/+5
2018-08-31PowerPC64 higher REL16 relocationsAlan Modra1-0/+8
2018-08-31gas: Pass -mx86-used-note=no to assemblerH.J. Lu1-0/+5
2018-08-31x86: pass -mx86-used-note=no to assemblerH.J. Lu1-0/+5
2018-08-31x86: Add explicit -mx86-used-note=[yes|no] to testsH.J. Lu1-0/+21
2018-08-31x86: Extend assembler to generate GNU property notesH.J. Lu1-0/+24
2018-08-30sparc: gas: leon.d: disassemble assuming v8 also in sparc64 targets.Jose E. Marchesi1-0/+5
2018-08-30RISC-V: Allow instruction require more than one extensionJim Wilson1-0/+11
2018-08-30Skip elf/section14 test for h8300 targetsH.J. Lu1-0/+4
2018-08-30Treat SHT_FINI_ARRAY and SHT_PREINIT_ARRAY as relocatable sectionsH.J. Lu1-0/+6
2018-08-29sparc/leon: add support for partial write psr instructionMartin Aberg1-0/+6
2018-08-29[MIPS] Add Loongson 2K1000 proccessor support.Chenghua Xu1-0/+6
2018-08-29[MIPS] Add Loongson 3A2000/3A3000 proccessor support.Chenghua Xu1-0/+6
2018-08-29[MIPS] Add Loongson 3A1000 proccessor support.Chenghua Xu1-0/+10
2018-08-29[MIPS/GAS] Add Loongson EXT2 Instructions support.Chenghua Xu1-0/+18
2018-08-29[MIPS/GAS] Split Loongson EXT Instructions from loongson3a.Chenghua Xu1-0/+17
2018-08-29[MIPS/GAS] Split Loongson CAM Instructions from loongson3aChenghua Xu1-0/+24
2018-08-27x86: Don't mask out the GNU_PROPERTY_X86_UINT32_VALID bitH.J. Lu1-0/+8
2018-08-23RISC-V: Reject empty rouding mode and fence operand.Jim Wilson1-0/+11
2018-08-23Prune BFD warnings for unknown GNU propertiesH.J. Lu1-0/+8
2018-08-22Fix typo in changelog entry for handling of undocumnented Z80 SLI instruction.Nick Clifton1-1/+1
2018-08-22Re: Pack reloc_howto_structAlan Modra1-0/+4
2018-08-21Fix handling of undocumented SLL instruction for the Z80 target.Arnold Metselaar1-0/+11
2018-08-21Fix invalid strcpy on unterminated bufferAndreas Schwab1-0/+5
2018-08-21Use operand->extract to provide defaults for optional PowerPC operandsAlan Modra1-0/+7
2018-08-21Fix s12z test regexpsAlan Modra1-1/+5
2018-08-20Tidy bit twiddlingAlan Modra1-3/+3
2018-08-18Opcodes: (BRCLR / BRSET) Disassemble reserved codes instead of aborting.John Darrington1-0/+6
2018-08-14x86-64: Display eiz for address with the addr32 prefixH.J. Lu1-0/+9
2018-08-14When the assembler reports that the input and output are the same, report the...Robert Yang1-0/+4
2018-08-11x86: Add CpuCMOV and CpuFXSRH.J. Lu1-0/+6
2018-08-10x86: Don't display --32/--64/--x32 without BFD64H.J. Lu1-0/+7
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