Age | Commit message (Collapse) | Author | Files | Lines |
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* config/tc-i860.c (i860_check_label): New function.
* config/tc-i860.h (i860_check_label): New prototype.
(tc_check_label): Define macro as i860_check_label.
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* config/tc-i860.c (s_align_wrapper): New function and prototype.
(md_pseudo_table): Change s_align_bytes to s_align_wrapper, remove
surrounding OBJ_ELF ifdef, and re-format slightly.
* doc/c-i860.texi: Document the special .align syntax available
in Intel mode.
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2003-08-06 Jason Eckhardt <jle@rice.edu>
* config/tc-i860.c (i860_handle_align): New function.
* config/tc-i860.h (HANDLE_ALIGN): Define macro.
(MAX_MEM_FOR_RS_ALIGN_CODE): Define macro.
gas/testsuite:
2003-08-06 Jason Eckhardt <jle@rice.edu>
* gas/i860/dir-align01.{s,d}: New files.
* gas/i860/i860.exp: Execute the new test above.
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2003-08-06 Jason Eckhardt <jle@rice.edu>
* config/tc-i860.c (i860_process_insn): Check that instructions
with their dual-bit set are 8-byte aligned.
gas/testsuite:
2003-08-06 Jason Eckhardt <jle@rice.edu>
* gas/i860/dual02-err.l: Update expected error message.
* gas/i860/README.i860: Remove dual02-err from known failure list.
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* config/tc-i860.c (i860_process_insn): Don't handle dual-bit
setting during flop argument parsing. Instead, do it after
instruction is fully parsed.
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* doc/c-i860.texi: Mention that .dual, .enddual, and .atmp
directives are only available in Intel syntax mode.
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* config/tc-i860.c (s_dual): Accept .dual directive only in
the Intel syntax mode.
(s_enddual): Likewise for .enddual.
(s_atmp): Likewise for .atmp.
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for memory operands. Pass the full operand_string to i386_index_check.
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* config/tc-i860.c: Remove SYNTAX_SVR4 macro and occurrences.
(target_intel_syntax): Declare variable.
(OPTION_INTEL_SYNTAX): Declare macro.
(md_longopts): Add option -mintel-syntax.
(md_parse_option): Set target_intel_syntax.
(md_show_usage): Add -mintel-syntax usage.
(md_begin): Set reg_prefix based on target_intel_syntax.
(i860_process_insn): Skip register prefix only if there is one.
Parse relocatable expressions in either Intel or AT&T syntax based
on target_intel_syntax instead of the SYNTAX_SVR4 macro.
* doc/c-i860.texi: Document -mintel-syntax option and give blurb
about the differences in syntax.
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to all arches.
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valid_arch here.
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2003-07-30 Jason Eckhardt <jle@rice.edu>
* elf32-i860.c: Convert to ISO C90. Remove superflous prototypes.
gas:
2003-07-30 Jason Eckhardt <jle@rice.edu>
* config/tc-i860.c: Convert to ISO C90.
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2003-07-28 H.J. Lu <hongjiu.lu@intel.com>
* config/obj-elf.c (obj_elf_section_type): Also accept "note".
gas/testsuite/
2003-07-28 H.J. Lu <hongjiu.lu@intel.com>
* gas/elf/elf.exp: Add section3 for note section.
* gas/elf/section3.d: New file.
* gas/elf/section3.s: Likewise.
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(md_begin) [OBJ_ELF]: Use it to control .pdr creation.
(s_mips_end) [OBJ_ELF]: Likewise.
(md_longopts) [OBJ_ELF]: Define OPTION_PDR, OPTION_NO_PDR.
(md_parse_option) [OBJ_ELF]: Handle them.
(md_show_usage) [OBJ_ELF]: Document -mpdr, -mno-pdr.
* doc/c-mips.texi (MIPS Opts): Document -mpdr, -mno-pdr.
* doc/as.texinfo (Overview) [MIPS]: Likewise.
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2003-07-25 H.J. Lu <hongjiu.lu@intel.com>
* elf.c (_bfd_elf_new_section_hook): Set the default section
type to SHT_NULL.
(elf_fake_sections): Set the section type based on asect->flags
if it is SHT_NULL. Don't abort on processor specific section
types.
gas/
2003-07-25 H.J. Lu <hongjiu.lu@intel.com>
* config/obj-elf.c (obj_elf_change_section): Update
elf_section_type and elf_section_flags only when they are
specified.
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* config/obj-elf.c (obj_elf_change_section): Always set section
type and flags.
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2003-07-25 H.J. Lu <hongjiu.lu@intel.com>
* elf-bfd.h (bfd_elf_special_section): New.
(elf_backend_data): Add special_sections, a pointer to
bfd_elf_special_section.
(elf_section_type). New.
(elf_section_flags): New.
(_bfd_elf_get_sec_type_attr): New.
* elf.c (_bfd_elf_make_section_from_shdr): Always use the
real section type/flags.
(special_sections): New.
(get_special_section): New.
(_bfd_elf_get_sec_type_attr): New.
(_bfd_elf_new_section_hook): Check special_section to set
elf_section_type and elf_section_flags.
(elf_fake_sections): Don't use section name to set ELF section
data.
* elf32-m32r.c (m32r_elf_special_sections): New.
(elf_backend_special_sections): Defined.
* elf32-m68hc11.c (elf32_m68hc11_special_sections): New.
(elf_backend_special_sections): Defined.
* elf32-mcore.c (mcore_elf_special_sections): New.
(elf_backend_special_sections): Defined.
* elf32-ppc.c (ppc_elf_special_sections): New.
(elf_backend_special_sections): Defined.
* elf32-sh64.c (sh64_elf_special_sections): New.
(elf_backend_special_sections): Defined.
* elf32-v850.c (v850_elf_special_sections): New.
(elf_backend_special_sections): Defined.
* elf32-xtensa.c (elf_xtensa_special_sections): New.
(elf_backend_special_sections): Defined.
* elf64-alpha.c (elf64_alpha_special_sections): New.
(elf_backend_special_sections): Defined.
* elf64-hppa.c (elf64_hppa_special_sections): New.
(elf_backend_special_sections): Defined.
* elf64-ppc.c (ppc64_elf_special_sections): New.
(elf_backend_special_sections): Defined.
* elf64-sh64.c (sh64_elf64_special_sections): New.
(elf_backend_special_sections): Defined.
* elfxx-ia64.c (elfNN_ia64_special_sections): New.
(elf_backend_special_sections): Defined.
* elfxx-mips.c (_bfd_mips_elf_special_sections): New.
* elfxx-mips.h (_bfd_mips_elf_special_sections): New.
(elf_backend_special_sections): Defined.
* elfxx-target.h (elf_backend_special_sections): New. Default
to NULL.
(elfNN_bed): Initialize special_sections.
* section.c (bfd_abs_section): Remove const.
(bfd_und_section): Likewise.
(bfd_com_section): Likewise.
(bfd_ind_section): Likewise.
gas/
2003-07-25 H.J. Lu <hongjiu.lu@intel.com>
* config/obj-elf.c (special_sections): Removed.
(obj_elf_change_section): Call _bfd_elf_get_sec_type_attr. Set
elf_section_type and elf_section_flags.
(elf_frob_file): Set SHT_GROUP.
* config/obj-elf.h (obj_sec_set_private_data): New.
* config/tc-alpha.h (ELF_TC_SPECIAL_SECTIONS): Removed.
* config/tc-ia64.h: Likewise.
* config/tc-m32r.h: Likewise.
* config/tc-m68hc11.h: Likewise.
* config/tc-mcore.h: Likewise.
* config/tc-mips.h: Likewise.
* config/tc-ppc.h: Likewise.
* config/tc-sh64.h: Likewise.
* config/tc-v850.h: Likewise.
* config/tc-xtensa.h: Likewise.
* config/tc-v850.h (SHF_V850_GPREL): Removed.
(SHF_V850_EPREL): Likewise.
(SHF_V850_R0REL): Likewise.
* subsegs.c (subseg_get): Call obj_sec_set_private_data if it
is defined.
include/elf/
2003-07-25 H.J. Lu <hongjiu.lu@intel.com>
* v850.h (SHF_V850_GPREL): New.
(SHF_V850_EPREL): Likewise.
(SHF_V850_R0REL): Likewise.
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debugging symbols so that we handle page memory correctly.
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* read.c (do_parse_cons_expression): Mark nbytes unused to
silence gcc.
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or bsr/bs.
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slash and dot are lower-case.
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(generic_dwarf2_emit_offset): Don't define function when
TC__DWARF2_EMIT_OFFSET is defined.
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* mips.h (CPU_RM7000): New macro.
(OPCODE_IS_MEMBER): Match CPU_RM7000 against 4650 insns.
bfd/
* archures.c (bfd_mach_mips7000): New.
* bfd-in2.h: Regenerated.
* cpu-mips.c (arch_info_struct): Add an entry for mips:7000.
* elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips7000.
(mips_mach_extensions): Add an entry for it.
opcodes/
* mips-dis.c (mips_arch_choices): Add rm7000 and rm9000 entries.
gas/
* config/tc-mips.c (hilo_interlocks): True for CPU_RM7000.
(mips_cpu_info_table): Add rm7000 and rm9000 entries.
gas/testsuite/
* gas/mips/rm7000.[sd]: New test.
* gas/mips/mips.exp: Run it.
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only for V850_OPERAND_DISP operands.
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(frag_alloc_check): ..here. New function.
(frag_append_1_char): Call frag_alloc_check.
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(TARGET_USE_CFIPOP, tc_cfi_frame_initial_instructions,
tc_regname_to_dw2regnum, DWARF2_DEFAULT_RETURN_COLUMN,
DWARF2_CIE_DATA_ALIGNMENT): Define.
(ppc_cfi_frame_initial_instructions, tc_ppc_regname_to_dw2regnum): New
prototypes.
(ppc_cie_data_alignment): Declare.
* config/tc-ppc.c: Include dw2gencfi.h.
(ppc_cie_data_alignment): Define.
(md_begin): Initialize ppc_cie_data_alignment.
(ppc_cfi_frame_initial_instructions, tc_ppc_regname_to_dw2regnum): New
functions.
* config/tc-s390.h (DWARF2_LINE_MIN_INSN_LENGTH): Define always.
(TARGET_USE_CFIPOP, tc_cfi_frame_initial_instructions,
tc_regname_to_dw2regnum, DWARF2_DEFAULT_RETURN_COLUMN,
DWARF2_CIE_DATA_ALIGNMENT): Define.
(s390_cfi_frame_initial_instructions, tc_s390_regname_to_dw2regnum):
New prototypes.
(s390_cie_data_alignment): Declare.
* config/tc-s390.c: Include dw2gencfi.h.
(s390_cie_data_alignment): Define.
(md_begin): Initialize s390_cie_data_alignment.
(s390_cfi_frame_initial_instructions, tc_s390_regname_to_dw2regnum):
New functions.
* gas/cfi/cfi-ppc-1.s: New test.
* gas/cfi/cfi-ppc-1.d: New test.
* gas/cfi/cfi-s390-1.s: New test.
* gas/cfi/cfi-s390-1.s: New test.
* gas/cfi/cfi-s390x-1.s: New test.
* gas/cfi/cfi-s390x-1.s: New test.
* gas/cfi/cfi.exp: Run them.
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* config/tc-mn10300.h (EXTERN_FORCE_RELOC): Don't define to zero.
2001-05-09 Alexandre Oliva <aoliva@redhat.com>
* configure.in (am33_2.0, mn10300-*-linux*): Added.
* configure: Rebuilt.
* config/tc-mn10300.h (TARGET_FORMAT) [TE_LINUX]: Define to
elf32-am33lin.
* config/tc-mn10300.c (md_begin) [TE_LINUX]: Choose AM33/2.0
by default.
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* config/tc-mn10300.c (mn10300_check_fixup): Set GOT_PCREL type
for subtracts from GLOBAL_OFFSET_TABLE that could not be
simplified.
2002-07-18 Alexandre Oliva <aoliva@redhat.com>
* config/tc-mn10300.c (mn10300_check_fixup): Accept subtracts that
could not be simplified.
(tc_gen_reloc): Turn an absolute fx_subsy into part of fx_offset.
2001-11-04 Alexandre Oliva <aoliva@redhat.com>
* config/tc-mn10300.h (TC_RELOC_RTSYM_LOC_FIXUP): Don't adjust
BDF_RELOC_MN10300_GOT32.
* config/tc-mn10300.c (mn10300_fix_adjustable): If
TC_RELOC_RTSYM_LOC_FIXUP doesn't hold, it's not adjustable.
2001-05-09 Alexandre Oliva <aoliva@redhat.com>
* config/tc-mn10300.c (mn10300_parse_name): Don't return a
symbol if we know its value.
2001-05-09 Alexandre Oliva <aoliva@redhat.com>
* config/tc-mn10300.h (GLOBAL_OFFSET_TABLE_NAME): Remove
duplicate underscore prefix.
2001-05-09 Alexandre Oliva <aoliva@redhat.com>
* config/tc-mn10300.c (mn10300_parse_name): Store relocation
type in X_md, not X_add_number. Zero X_add_number.
(mn10300_check_fixup): Extract relocation type from X_md.
* config/tc-mn10300.h: Update comment.
2001-04-14 Alexandre Oliva <aoliva@redhat.com>
* config/tc-mn10300.h (O_GOTOFF, O_PLT, O_GOT): Replace with...
(O_PIC_reloc): this.
* config/tc-mn10300.c (mn10300_PIC_related_p): Use it.
(mn10300_check_fixup): Likewise.
(mn10300_parse_name): Set X_add_number to relocation type.
* config/tc-mn10300.h (DIFF_EXPR_OK, GLOBAL_OFFSET_TABLE_NAME,
TC_RELOC_RTSYM_LOC_FIXUP, md_parse_name, TC_CONS_FIX_NEW,
O_GOTOFF, O_PLT, O_GOT): Define.
* config/tc-mn10300.c (mn10300_PIC_related_p): New fn.
(mn10300_check_fixup): New fn.
(md_assemble): Call it. Check for PIC-related relocs.
(mn10300_cons_fix_new): Likewise. New fn.
(mn10300_end_of_match): New fn.
(mn10300_md_parse_name_cont): New fn.
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* config/tc-mn10300.c (mn10300_insert_operand): Negate negative
accumulator's shift.
2000-05-08 Alexandre Oliva <aoliva@cygnus.com>
* config/tc-mn10300.c (md_relax_table, md_convert_frag,
md_assemble, md_estimate_size_before_relax): Handle fbCC.
2000-04-20 Alexandre Oliva <aoliva@cygnus.com>
* config/tc-mn10300.c (HAVE_AM33): Redefine in terms of
HAVE_AM33_2.
2000-04-03 Alexandre Oliva <aoliva@cygnus.com>
* config/tc-mn10300.c (md_pseudo_table): Use AM33_2 constant.
(HAVE_AM33): Match AM33_2 too.
(HAVE_AM33_2): New macro.
(md_assemble): Use it. Match 2.0 registers only if HAVE_AM33_2.
2000-04-01 Alexandre Oliva <aoliva@cygnus.com>
* config/tc-mn10300.c (md_pseudo_table): Added `am33_2'.
(float_registers, double_registers): New variables.
(float_register_name, double_register_name): New functions.
(md_assemble): Recognize FP registers. Implement FMT_D3.
(mn10300_insert_operand): Support FP registers.
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2003-07-08 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c (mips_validate_fix): Do not warn about branch
target being a global symbol if not compiling SVR4 PIC code.
[ gas/testsuite/ChangeLog ]
2003-07-08 Chris Demetriou <cgd@broadcom.com>
* gas/testsuite/gas/mips/mips.exp: Make sure that branch-misc-2 is
run to compile non-PIC code, and add branch-misc-2pic.
* gas/mips/branch-misc-2.l: Adjust for change in non-PIC warnings.
* gas/mips/branch-misc-2pic.l: New file.
* gas/mips/branch-misc-2pic.s: New file.
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(DSYMMODE): Remove.
(parse_exp): Replace expressionS argument with a h8_op. Parse the
operand size as well.
(skip_colonthing): Remove unused expression argument. Tighten checks
for 2-digit sizes.
(colonmod24): Remove.
(get_mova_operands): Combine calls to parse_exp and skip_colonthing.
(get_operand): Likewise. Use the standard code to read the size of
pc-relative operands.
(fix_operand_size): Include the size-guessing logic that used to be
in colonmod24 and get_operand. Don't apply dd:2 optimizations to
offsets with a symbolic component.
testsuite/
* gas/h8300/h8sx_disp2.[sd]: Add tests for symbolic displacements.
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macro to compute size of selected register name array.
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(md_begin): Add minimal cpu type logic for instructions with different
binary format depending on the cpu.
(md_assemble): Remove check for minimal cpu.
(s390_insert_operand): Add support for long displacements.
(md_gather_operands): Likewise.
(tc_s390_fix_adjustable): Likewise.
(tc_s390_force_relocation): Likewise.
(md_apply_fix3): Likewise.
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* config/tc-mips.c (s_mipsset): Implement -march= handling
differently.
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prototypes and casts. Replace PTR with void *. Reformat.
* config/tc-mips.h: Likewise.
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* config/tc-mips.c (append_insn): Likewise.
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