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2019-11-07[gas][aarch64] Armv8.6-a option [1/X]Matthew Malcomson1-0/+6
2019-11-07x86: support further AMD Zen2 instructionsJan Beulich1-0/+15
2019-11-07x86: adjust register names printed for MONITOR/MWAITJan Beulich1-0/+19
2019-11-04x86: re-arrange process_operands()Jan Beulich1-0/+5
2019-10-31i386; Add .code16gcc fldenv testsH.J. Lu1-0/+5
2019-10-31Add support for context sensitive '.arch_extension' to the ARM assembler.Mihail Ionescu1-0/+12
2019-10-30Modify the ARNM assembler to accept the omission of the immediate argument fo...Delia Burduv1-0/+12
2019-10-30x86: add tests to cover defaulting of operand sizes for ambiguous insnsJan Beulich1-0/+7
2019-10-30x86: drop stray WJan Beulich1-0/+5
2019-10-29Re: Optimise away eh_frame advance_loc 0Alan Modra1-0/+6
2019-10-26Add some missing casts to suppress implicit cast warningsJohn David Anglin1-0/+6
2019-10-26Optimise away eh_frame advance_loc 0Alan Modra1-0/+10
2019-10-25PR25125, relaxation chooses wrong branch sizeAlan Modra1-0/+9
2019-10-16qsort: tc-xtensa.c tidyAlan Modra1-0/+7
2019-10-15remove more xmalloc in bfdAlan Modra1-0/+6
2019-10-09Fix the disassembly of the LDS and STS instructions of the AVR architecture.Nick Clifton1-0/+6
2019-10-07Add support for new functionality in the msp430 backend of GCC.Jozef Lawrynowicz1-0/+24
2019-10-07add missing ChangeLog entry for d241b91073Jan Beulich1-0/+13
2019-09-24Arm: Fix out of range conditional branch (PR/24991)Tamar Christina1-0/+11
2019-09-23ecoff bfd.h tidyAlan Modra1-0/+5
2019-09-23arm bfd.h tidyAlan Modra1-0/+4
2019-09-21tc-i386.c gcc10 warning fixAlan Modra1-0/+4
2019-09-20bfd macro conversion to inline functions, sectionAlan Modra1-0/+4
2019-09-20x86-64: fix handling of PUSH/POP of segment registerJan Beulich1-0/+9
2019-09-19[gas][news] NEWS (2.33) note new SVE2 and TME instructions for AArch64Matthew Malcomson1-0/+4
2019-09-19bfd_section_* macrosAlan Modra1-0/+28
2019-09-18bfd_asymbol_* macrosAlan Modra1-0/+5
2019-09-18Re-generate many configure and Makefile.in filesSimon Marchi1-0/+6
2019-09-17RISC-V: Gate opcode tables by enum rather than string.Jim Wilson1-0/+6
2019-09-16Update version to 2.33.50 and regenerate configure scripts.Phil Blundell1-0/+4
2019-09-10Enhance the disassembler so that it will reliably determine whether a reloc a...Nick Clifton1-0/+6
2019-09-09Add markers for 2.33 branch to NEWS and ChangeLog files.Phil Blundell1-0/+4
2019-09-05PowerPC warning on symbol+offset@gotAlan Modra1-0/+5
2019-08-27Add support for the MVE VMOV instruction to the ARM assembler. This instruct...Srinath Parvathaneni1-0/+8
2019-08-23Updated Swedish translation for the gas sub-directory.Nick Clifton1-0/+4
2019-08-22Arm: Add support for missing CPUsDennis Zhang1-0/+9
2019-08-22Fix the assembler's floating point number parser so that it can correctly han...Bosco Garc?a1-0/+10
2019-08-22Implement a float16 directive for assembling 16 bit IEEE 754 floating point n...Barnaby Wilks1-0/+10
2019-08-22[AArch64][gas] Update MTE system register encodingsKyrylo Tkachov1-0/+5
2019-08-20Adds support for following CPUs to the ARM and Aarch64 assemblers: Cortex-A77...Dennis Zhang1-0/+13
2019-08-19MIPS/gas: Fix misaligned address errors to disregard ISA mode bitFaraz Shahbazker1-0/+9
2019-08-19MIPS/gas: Retain ISA mode bit for labels with .insn annotationFaraz Shahbazker1-0/+10
2019-08-19Float16: Fix test failures for non ELF targetsBarnaby Wilks1-0/+4
2019-08-15Updatesd Swdish translation for the gas sub-directory.Nick Clifton1-0/+4
2019-08-12Modify the ARM encoding and decoding of SQRSHRL and UQRSHLL MVE instructions.Srinath Parvathaneni1-0/+13
2019-08-12Add generic and ARM specific support for half-precision IEEE 754 floating poi...Barnaby Wilks1-0/+38
2019-08-12PR24851, gas/testsuite/gas/epiphany/badrelax.s failure with MALLOC_PERTURB_=1Alan Modra1-0/+6
2019-08-09x86-64: generalize SIMD test expectationsJan Beulich1-0/+11
2019-08-08Change the output of readelf's note display so that the "Data size" column he...Nick Clifton1-0/+9
2019-08-08Update the handling of shift rotate and load/store multiple instructions in ...Yoshinori Sato1-4/+4
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