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(RELAX_MIPS16_ENCODE): Add dslot and jal_dslot arguments, and
store them. Adjust other RELAX_MIPS16 macros.
(RELAX_MIPS16_DSLOT): Define.
(RELAX_MIPS16_JAL_DSLOT): Define.
(append_insn): Pass new arguments to RELAX_MIPS16_ENCODE. Correct
handling of whether previous instruction has a fixup. Set
prev_insn_reloc_type.
(mips_no_prev_insn): Clear prev_insn_reloc_type.
(mips16_extended_frag): Use the right base address for a PC
relative add or load.
(md_convert_frag): Likewise. If a PC relative add or load is
used, record the alignment for the section.
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linkonce section into a reloc against the section symbol.
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branch instructions.
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system, don't set the section alignment to 2**4.
(s_change_sec): Likewise.
(append_insn): Call record_alignment for the section.
(md_section_align): Don't align the section size for an embedded
ELF system.
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resolved; expression symbols may have been skipped.
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resolved; expression symbols may have been skipped.
PR 11240.
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* config/tc-d10v.c (write_2_short): Remove code that called
parallel_ok() when the programmer specified parallel instructions.
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in a frag after a mips16 instruction to switch it with a jump
instruction.
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* config/tc-mn10300.c (md_assemble): Likewise.
Found by mn10200 gas testsuite.
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attempt to use a non absolute symbol in an extending frag.
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UNGET rather than PUT. Set old_state before setting state to -2.
PR 11229.
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* config/tc-mn10200.h: Likewise.
Actually assembles some mn10200 stuff (everything but mov* instructions!)
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when extending because the value is exactly maxtiny + 1.
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arguments, and store them. Adjust other RELAX_MIPS16 macros.
(RELAX_MIPS16_USER_SMALL): Define.
(RELAX_MIPS16_USER_EXT): Define.
(mips16_small, mips16_ext): New static variables.
(append_insn): Pass mips16_small and mips16_ext to
RELAX_MIPS16_ENCODE.
(mips16_ip): Set mips16_small and mips16_ext.
(mips16_immed): Don't check mips16_autoextend.
(mips16_extended_frag): Check USER_SMALL and USER_EXT.
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fixup, rather than calling abort.
* as.c (main): Unlink the output file if there are errors while
generating the fixups.
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S_GET_VALUE.
(md_convert_frag): Call resolve_symbol_value before calling
S_GET_VALUE, and don't add in the frag address.
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and use them when reporting errors. Change all callers.
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Remove '$' prefixing for registers.
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* config/tc-d10v.c (md_assemble): Check to see if prev_seg
is initialized before using it.
(d10v_cleanup): No longer uses its argument, so make it void.
* config/tc-d10v.h (d10v_cleanup): Change prototype.
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relative fixup to an absolute symbol.
PR 11204.
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* config/tc-d10v.c (md_assemble, d10v_cleanup): Fix bug
with multiple sections.
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no-mips-16 to no-mips16.
(s_mipsset): Accept .set mips16 and .set nomips16.
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flags
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fx_offset, not fx_addnumber.
Along with some simulator, compiler, bfd changes this fixes 90 or so
c-torture execution failures.
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reloc adjustments.
reloc adjusting is of minimal value, and quite problematical for
machines which do linker relaxing...
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* config/tc-i386.c: Correct misspelling: balenced to balanced.
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4, not an alignment of 16. Corrects August 7 patch.
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alignment is specified.
PR 11164.
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* config/tc-mips.c: Extensive additions for mips16 support, not
listed here.
(RELAX_OLD, RELAX_NEW): Use only 7 bits each.
(insn_uses_reg): Change last parameter to an enum.
* config/tc-mips.h (LOCAL_LABELS_DOLLAR): Define as 0.
(md_relax_frag): Define as mips_relax_frag.
(mips_relax_frag): Declare.
(struct mips_cl_insn): Add use_extend and extend fields.
(tc_fix_adjustable): Define.
* config/obj-elf.h (S_GET_OTHER): Define.
(S_SET_OTHER): Define.
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o and p operand specifiers.
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(relax_segment, case rs_org): Move code inside braces. Move locals
target,after inside too.
(relax_segment, case rs_machine_dependent): Guts moved to ...
(relax_frag): New function.
Call md_prepare_relax_scan if defined.
* config/tc-m68k.h (md_prepare_relax_scan): Renamed from
M68K_AIM_KLUDGE.
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(data_registers, other_registers, md_assemble): Likewise.
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correct location and type for each relocation.
(md_pcrel_from): Simplify.
Last week's reloc work.
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converted into branch around branch.
PR 11103.
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(tc_fix_adjustable): Don't adjust relocs against weak symbols or
pc-relative relocs.
* config/tc-mn10300.c (md_begin): Set linkrelax.
(md_assemble): Create fixups as needed.
(md_apply_fix3): Gut. It shouldn't ever get called anymore.
First stab at fixups/relocs.
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if -O
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So GCC can use movm in prologue/epilogues.
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via PARAMS.
(check_operand): Likewise.
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* config/tc-d10v.c (write_2_short): Fix bug that wouldn't
allow a branch and link in parallel with an exe instruction.
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operands are assumed to be 32bits. Use "bits" field to hold the
number of bits in the main instruction word for MN10300_OPERAND_SPLIT.
(mn10300_check_operand): MN10300_OPERAND_SPLIT operands are assumed
to be 32bits.
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of a MN10300_OPERAND_SPLIT operand by operand->shift.
For bset, bclr & btst.
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MN10300_OPERAND_SPLIT.
For handling of 32bit operands.
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the extension part of the instruction if necessary.
(mn10300_insert_operand): Accept pointer to extension word
argument. Make insn a pointer argument too. Return type
is now void. All callers changed.
So we can correct insert operands into any instruction except those
which have 32bit operands.
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repeated register operands.
For mov imm8,dn
mov imm8,an
cmp imm8,dn
cmp imm8,an
The register appears twice in the bit pattern... Egad.
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