aboutsummaryrefslogtreecommitdiff
path: root/gas/ChangeLog
AgeCommit message (Expand)AuthorFilesLines
2022-01-02Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2021-12-16Fix AVR assembler so that it creates relocs that will work with linker relaxa...Nick Clifton1-0/+10
2021-11-26[gas] Fix file 0 dir with -gdwarf-5Tom de Vries1-0/+7
2021-11-18Add multibyte character warning option to the assembler.Nick Clifton1-0/+22
2021-11-15Deal with full path in .file 0 directiveEric Botcazou1-0/+13
2021-10-28ARM assembler: Allow up to 32 single precision registers in the VPUSH and VPO...Markus Klein1-0/+9
2021-09-27configure: regenerate in all projects that use libtool.m4Nick Alcock1-0/+4
2021-09-25PowerPC: Enable mfppr mfppr32, mtppr and mtppr32 extended mnemonics on POWER5Peter Bergner1-0/+9
2021-09-13MIPS: don't use get_symbol_name() for section parsing. With s_change_section...Jan Beulich1-0/+1
2021-09-13ia64: don't use get_symbol_name() for section parsing. With cross_section() ...Jan Beulich1-0/+5
2021-09-02Fix the V850 assembler's generation of relocations for the st.b instruction.Nick Clifton1-0/+8
2021-08-11Fix a typo in the RX asse,bler. The Double-precision floating-point exceptio...Darius Galis1-0/+7
2021-08-11Fix an internal error in the CSKY assembler when asked to resolve an overlarg...Nick Clifton1-0/+6
2021-08-11Add a -mno-dollar-line-separator command line option to the AVR assembler.Matt Jacobson1-0/+9
2021-08-11Fix typo in previous deltaNick Clifton1-0/+4
2021-08-10Updated Serbian and Russian translations for various sub-directoriesNick Clifton1-0/+4
2021-08-09GAS: DWARF-5: Ensure that the 0'th entry in the directory table contains the ...Nick Clifton1-0/+12
2021-07-14gas: default TC_VALIDATE_FIX_SUB to 0Alan Modra1-1/+10
2021-07-14objdump: add DWARF support for AIXClément Chigot1-0/+5
2021-07-12Add the SEC_ELF_OCTETS flag to debug sections created by the assembler.Tucker1-0/+6
2021-07-07Add changelog entries for last commitAndreas Krebbel1-0/+5
2021-07-07Fix problems translating messages when a percentage sign appears at the end o...Nick Clifton1-0/+11
2021-07-03Update version number and regenerate filesNick Clifton1-0/+5
2021-07-03Add markers for 2.37 branchNick Clifton1-0/+4
2021-07-02Re: Fix minor NDS32 renaming snafuAlan Modra1-0/+5
2021-07-02Fix minor NDS32 renaming snafu.Nick Clifton1-0/+5
2021-07-01opcodes: constify & scope microblaze opcodesMike Frysinger1-0/+5
2021-07-01opcodes: constify aarch64_opcode_tablesMike Frysinger1-0/+6
2021-06-24gas: update csect alignment for PPC prefixed instructions on XCOFFClément Chigot1-0/+5
2021-06-22picojava assembler and disassembler fixesAlan Modra1-0/+9
2021-06-19ubsan errors when 32-bit bfdAlan Modra1-0/+4
2021-06-19ppc raw test failure when 32-bit bfdAlan Modra1-0/+5
2021-06-18gas: fold symbol table entries generated for .startof.() / .sizeof.()Jan Beulich1-0/+7
2021-06-17Fix an assertion failure in the AArch64 assembler triggered by incorrect inst...Nick Clifton1-0/+7
2021-06-17gas: handle csect in bss section for XCOFFClément Chigot1-0/+7
2021-06-17gas: ensure sections contents is zero for BFD_RELOC_PPC*_TLSM on XCOFF.Clément Chigot1-0/+10
2021-06-16gas: fix hex float parsing from .dcb.? directivesJan Beulich1-0/+6
2021-06-16gas: fix overflow diagnosticsJan Beulich1-0/+10
2021-06-15x86: bring "gas --help" output for --32 etc in sync with realityJan Beulich1-0/+7
2021-06-15x86: simplify .dispNN settingJan Beulich1-0/+7
2021-06-15x86: slightly simplify offset_in_range()Jan Beulich1-0/+5
2021-06-15x86: harmonize disp with imm handlingJan Beulich1-0/+10
2021-06-15x86: make offset_in_range()'s warning contents useful (again)Jan Beulich1-0/+5
2021-06-15x86: off-by-1 in offset_in_range()Jan Beulich1-0/+9
2021-06-15x86: permit parenthesized expressions again as addressing scale factorJan Beulich1-0/+8
2021-06-14gas: fold three as_warn() in emit_expr_with_reloc()Jan Beulich1-0/+4
2021-06-14gas: drop TC_ADDRESS_BYTES conditionalsJan Beulich1-0/+6
2021-06-11x86: Always define TC_PARSE_CONS_EXPRESSIONH.J. Lu1-0/+6
2021-06-11RISC-V: Update the riscv_opts.[rvc|rve] in the riscv_set_arch.Nelson Chu1-0/+6
2021-06-10arm: avoid "shadowing" of glibc function nameJan Beulich1-0/+8
generated by cgit v1.1 at 2024-11-24 14:02:03 +0000