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2019-07-01Fix spelling error in assembler documentation.Nick Clifton1-0/+5
2019-07-01x86: drop Vec_Imm4Jan Beulich1-0/+8
2019-07-01x86: limit ImmExt abuseJan Beulich1-0/+7
2019-07-01x86: optimize AND/OR with twice the same registerJan Beulich1-0/+14
2019-07-01x86-64: optimize certain commutative VEX-encoded insnsJan Beulich1-0/+20
2019-07-01x86: StaticRounding implies SAEJan Beulich1-0/+5
2019-07-01x86: optimize EVEX packed integer logical instructionsJan Beulich1-0/+29
2019-07-01x86: add missing pseudo ops for VPCLMULQDQ ISA extensionJan Beulich1-0/+23
2019-07-01x86: use encoding_length() also elsewhereJan Beulich1-0/+4
2019-07-01x86: warn about insns exceeding the 15-byte limitJan Beulich1-0/+10
2019-06-27i386: Check vector length for scatter/gather prefetch instructionsH.J. Lu1-0/+9
2019-06-27This fixes a bug in the ARm assembler where an immediate operand larger than ...Barnaby Wilk s1-0/+14
2019-06-27x86: allow VEX et al encodings in 16-bit (protected) modeJan Beulich1-0/+18
2019-06-26Fix a few non-dash safe xstormy16 shell scripts.Jim Wilson1-0/+6
2019-06-26i386: Document memory size reference in assemblerLili Cui1-0/+6
2019-06-25MIPS/gas: Fix order of instructions in LI macro expansionFaraz Shahbazker1-0/+11
2019-06-25x86: correct / adjust debug printingJan Beulich1-0/+9
2019-06-25x86: document certain command line options as "dangerous"Jan Beulich1-0/+5
2019-06-25x86: don't open code is_any_vex_encoding()Jan Beulich1-0/+4
2019-06-25x86: fix (dis)assembly of certain SSE2 insns in 16-bit modeJan Beulich1-0/+6
2019-06-25x86-64: also optimize ANDQ with immediate fitting in 7 bitsJan Beulich1-0/+8
2019-06-25x86: add CVT{,T}PS2PI cases to xmmwords testJan Beulich1-0/+6
2019-06-25Fix logical expression in last commitAlan Modra1-0/+4
2019-06-25PowerPC nopsAlan Modra1-0/+12
2019-06-19i386: Check vector length for EVEX broadcast instructionsH.J. Lu1-0/+9
2019-06-17i386: Check vector length for vshufXXX/vinsertXXX/vextractXXXH.J. Lu1-0/+9
2019-06-14Regenerate with approved autotools versionAlan Modra1-0/+6
2019-06-12Add missing ChangeLog entriesPeter Bergner1-0/+5
2019-06-06gas: Add .enqcmd and noenqcmd directivesH.J. Lu1-0/+6
2019-06-06gas: Correct ChangeLog for commit 5d79adc4b22b0abdH.J. Lu1-12/+14
2019-06-05i386: Check vector length for EVEX vextractfXX and vinsertfXXH.J. Lu1-0/+9
2019-06-04i386: Check for reserved VEX.vvvv and EVEX.vvvvH.J. Lu1-0/+9
2019-06-04Enable Intel AVX512_VP2INTERSECT insnH.J. Lu1-0/+18
2019-06-04Add support for Intel ENQCMD[S] instructionsH.J. Lu1-0/+16
2019-05-30RISC-V: Fix lui argument parsing.Jim Wilson1-0/+7
2019-05-28x86: Add CheckRegSize to AVX512_BF16 instructions with Disp8ShiftVLH.J. Lu1-0/+9
2019-05-27Fix failure on powerpc 32-bit only targetsAlan Modra1-0/+8
2019-05-24aarch64: override default elf .set handling in gasSzabolcs Nagy1-0/+8
2019-05-24aarch64: handle .variant_pcs directive in gasSzabolcs Nagy1-0/+9
2019-05-24Regen POTFILES for bpfAlan Modra1-0/+4
2019-05-24PowerPC relocations for prefix insnsAlan Modra1-0/+20
2019-05-24PowerPC D-form prefixed loads and storesPeter Bergner1-0/+11
2019-05-24PowerPC add initial -mfuture instruction supportPeter Bergner1-0/+19
2019-05-23gas: add support for eBPFJose E. Marchesi1-0/+45
2019-05-22S12Z: GAS: New option --mdollar-hex.John Darrington1-0/+10
2019-05-21[binutils, ARM] <spec_reg> changes for VMRS and VMSR instructionsSudakshina Das1-0/+20
2019-05-21[binutils, Arm] Add support for conditional instructions in Armv8.1-M MainlineSudakshina Das1-0/+16
2019-05-21[binutils, Arm] Add support for shift instructions in MVESudakshina Das1-0/+13
2019-05-21MIPS/gas: Reject $0 as source register for DAUI instructionFaraz Shahbazker1-0/+11
2019-05-21[GAS, Arm] PR24559: Fix pseudo load-operations for Armv8-M BaselineAndre Vieira1-0/+10
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