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2006-06-07include/opcode/Alan Modra1-0/+8
* ppc.h (PPC_OPCODE_POWER6): Define. Adjust whitespace. gas/ * config/tc-ppc.c (parse_cpu): Handle "-mpower6". (md_show_usage): Document it. (ppc_setup_opcodes): Test power6 opcode flag bits. * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6". opcodes/ * ppc-dis.c (powerpc_dialect): Handle power6 option. (print_ppc_disassembler_options): Mention power6.
2006-06-06 [ gas/ChangeLog ]Thiemo Seufer1-0/+12
* config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro. (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete. (macro_build): Update comment. (mips_ip): Allow DSP64 instructions for MIPS64R2. (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and CPU_HAS_MDMX. (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and MIPS_CPU_ASE_MDMX flags for sb1. [ gas/testsuite/ChangeLog ] * gas/mips/mips64-dsp.s, gas/mips/mips64-dsp.d: New DSP64 tests. * gas/mips/mips.exp: Run DSP64 tests. [ opcodes/ChangeLog ] * mips-dis.c: Disassemble DSP64 instructions for MIPS64R2. * mips-opc.c: Add DSP64 instructions.
2006-06-05 [ gas/ChangeLog ]Thiemo Seufer1-0/+11
* config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew appropriate. (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate. (mips_ip): Make overflowed/underflowed constant arguments in DSP and MT instructions a fatal error. Use INSERT_OPERAND where appropriate. Improve warnings for break and wait code overflows. Use symbolic constant of OP_MASK_COPZ. (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate. [ gas/testsuite/ChangeLog ] * gas/mips/mips32-dsp.d, gas/mips/mips32-dsp.s, gas/mips/mips32-mt.d, gas/mips/mips32-mt.s: Remove instructions with invalid arguments. * gas/mips/mips32-dsp.l, gas/mips/mips32-mt.l: Delete file. [ include/opcode/ChangeLog ] * mips.h: Improve description of MT flags.
2006-06-05bfd/, binutils/, gas/, gprof/, ld/, opcodes/Daniel Jacobowitz1-0/+4
* po/Make-in (top_builddir): Define.
2006-06-02binutils:Joseph Myers1-0/+6
* doc/Makefile.am (TEXI2DVI): Define. * doc/Makefile.in: Regenerate. gas: * doc/Makefile.am (TEXI2DVI): Define. * doc/Makefile.in: Regenerate. * doc/c-arc.texi: Fix typo. ld: * Makefile.am (TEXI2DVI): Add -I $(top_srcdir)/../libiberty. * Makefile.in: Regenerate.
2006-06-01 * config/obj-ieee.c: Delete.Alan Modra1-0/+15
* config/obj-ieee.h: Delete. * Makefile.am (OBJ_FORMATS): Remove ieee. (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly. (obj-ieee.o): Remove rule. * Makefile.in: Regenerate. * configure.in (atof): Remove tahoe. (OBJ_MAYBE_IEEE): Don't define. * configure: Regenerate. * config.in: Regenerate. * doc/Makefile.in: Regenerate. * po/POTFILES.in: Regenerate.
2006-05-31Configury changes: update src repository (binutils, gdb, and rda) to useDaniel Jacobowitz1-0/+11
config/gettext-sister.m4 instead of the old gettext.m4. Regenerate all affected autotools files. Include intl in gdb releases again.
2006-05-30Update Spanish translationNick Clifton1-0/+4
2006-05-29 * doc/c-avr.texi: New file.Denis Chertykov1-0/+7
* doc/Makefile.am (CPU_DOCS): Add c-avr.texi * doc/all.texi: Set AVR * doc/as.texinfo: Include c-avr.texi
2006-05-28 * config/bfin-parse.y (check_macfunc): Loose the condition ofJie Zhang1-0/+5
calling check_multiply_halfregs ().
2006-05-26Remove ">>>>>>> 1.2917".H.J. Lu1-1/+0
2006-05-25 * config/bfin-parse.y (asm_1): Better check and deal withJie Zhang1-0/+6
vector and scalar Multiply 16-Bit Operands instructions.
2006-05-24Add TLS support for hppa-linuxNick Clifton1-0/+16
2006-05-24Add support for AVR6 familyNick Clifton1-0/+4
2006-05-23 [ gas/ChangeLog ]Thiemo Seufer1-0/+30
* config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename. (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS, ISA_HAS_MXHC1): New macros. (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments. (mips_cpu_info): Change to use combined ASE/IS_ISA flag. (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines. (mips_after_parse_args): Change default handling of float register size to account for 32bit code with 64bit FP. Better sanity checking of ISA/ASE/ABI option combinations. (s_mipsset): Support switching of GPR and FPR sizes via .set {g,f}p={32,64,default}. Better sanity checking for .set ASE options. (mips_elf_final_processing): We should record the use of 64bit FP registers in 32bit code but we don't, because ELF header flags are a scarce ressource. (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef, 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions. (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA. * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document missing -march options. Document .set arch=CPU. Move .set smartmips to ASE page. Use @code for .set FOO examples. [ gas/testsuite/Changelog ] * gas/mips/mips-gp32-fp64-pic.d, mips/mips-gp32-fp64.d, gas/mips/mips-gp64-fp32-pic.d, gas/mips/mips-gp64-fp32.l, gas/mips/mips-gp64-fp64.d: Adjust test cases to the changes assembler output. * gas/mips/mips-gp32-fp64.l, gas/mips/mips-gp64-fp32-pic.l: New files, catch assembler warnings.
2006-05-23 * config/tc-bfin.c (bfin_start_line_hook): Bump line countersJie Zhang1-0/+5
if needed.
2006-05-23 * config/bfin-defs.h (bfin_equals): Remove declaration.Jie Zhang1-0/+9
* config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr". * config/tc-bfin.c (bfin_name_is_register): Remove. (bfin_equals): Remove. * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1. (bfin_name_is_register): Remove declaration.
2006-05-22Remove ChangeLog entries, since the template files were already up to date.Nick Clifton1-4/+0
2006-05-22Update translation templatesNick Clifton1-0/+4
2006-05-19 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.Thiemo Seufer1-0/+7
(mips_oddfpreg_ok): New function. (mips_ip): Use it. -------------------------------------------------------------------
2006-05-19 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.Thiemo Seufer1-0/+23
* config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS, ISA_HAS_DROR, ISA_HAS_ROR): Reformat. (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC, RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK, RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES, FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES, N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES, SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES, MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names, reg_names_o32, reg_names_n32n64): Define register classes. (reg_lookup): New function, use register classes. (md_begin): Reserve register names in the symbol table. Simplify OBJ_ELF defines. (mips_ip): Fix comment formatting. Handle symbolic COP0 registers. Use reg_lookup. (mips16_ip): Use reg_lookup. (tc_get_register): Likewise. (tc_mips_regname_to_dw2regnum): New function. -------------------------------------------------------------------
2006-05-19 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):Thiemo Seufer1-0/+17
Un-constify string argument. * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum): Likewise. * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum): Likewise. * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum): Likewise. * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum): Likewise. * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum): Likewise. * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum): Likewise. -------------------------------------------------------------------
2006-05-19 * gas/config/tc-m68k.c (m68k_init_arch): Move checking ofNathan Sidwell1-0/+5
cfloat/m68881 to correct architecture before using it.
2006-05-16* config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate constant values.Nick Clifton1-0/+5
2006-05-152006-05-15 Paul Brook <paul@codesourcery.com>Paul Brook1-0/+5
bfd/ * cpu-arm.c (bfd_is_arm_mapping_symbol_name): Rename ... (bfd_is_arm_special_symbol_name): ... to this. Add type argument. Check symbol name is of specified type. * elf32-arm.c (elf32_arm_is_target_special_symbol, arm_elf_find_function, elf32_arm_output_symbol_hook): Use bfd_is_arm_special_symbol_name. * bfd-in.h (BFD_ARM_SPECIAL_SYM_TYPE_MAP, BFD_ARM_SPECIAL_SYM_TYPE_TAG, BFD_ARM_SPECIAL_SYM_TYPE_OTHER, BFD_ARM_SPECIAL_SYM_TYPE_ANY): Define. (bfd_is_arm_mapping_symbol_name): Remove prototype. (bfd_is_arm_special_symbol_name): Add prototype. * bfd-in2.h: Regenerate. gas/ * config/tc-arm.c (arm_adjust_symtab): Use bfd_is_arm_special_symbol_name. ld/testsuite/ * ld-arm/arm-be8.d: New test. * ld-arm/arm-be8.s: New test. * ld-arm/arm-elf.exp: Add arm-be8.
2006-05-15bfd:Bob Wilson1-0/+7
* elf32-xtensa.c (check_loop_aligned): Fix reversed check for undefined opcode. Clean up assertions. (narrow_instruction, widen_instruction): Remove "do_it" parameters. Factor most of the code into separate functions.... (can_narrow_instruction, can_widen_instruction): New. (prev_instr_is_a_loop): New. (compute_ebb_proposed_actions): Combine error handling code for decode errors. Replace call to insn_decode_len with inline code. Use can_narrow_instruction and can_widen_instruction. Handle errors from call to xtensa_opcode_is_loop. (relax_section): Adjust calls to narrow_instruction and widen_instruction. gas: * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next, xg_assemble_vliw_tokens, xtensa_mark_narrow_branches, xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed): Handle errors from calls to xtensa_opcode_is_* functions.
2006-05-14 [ gas/ChangeLog ]Thiemo Seufer1-0/+6
* config/tc-mips.c (macro_build): Test for currently active mips16 option. (mips16_ip): Reject invalid opcodes. [ opcodes/ChangeLog ] * mips16-opc.c (I1, I32, I64): New shortcut defines. (mips16_opcodes): Change membership of instructions to their lowest baseline ISA. [ gas/testsuite/ChangeLog ] * gas/mips/mips.exp: Run new tests. * gas/mips/mips16e.s, gas/mips/mips16e.d, gas/mips/mips16e-64.s, gas/mips/mips16e-64.d, gas/mips/mips16e-64.l: New tests.
2006-05-11bfd/doc/Carlos O'Donell1-0/+5
2006-05-11 Carlos O'Donell <carlos@codesourcery.com> * bfd.texinfo: Rename "Index" to "BFD Index" gas/ 2006-05-11 Carlos O'Donell <carlos@codesourcery.com> * doc/as.texinfo: Rename "Index" to "AS Index", and "ABORT" to "ABORT (COFF)". ld/ 2006-05-11 Carlos O'Donell <carlos@codesourcery.com> * ld.texinfo: Rename "Index" to "LD Index"
2006-05-112006-05-11 Paul Brook <paul@codesourcery.com>Paul Brook1-0/+12
bfd/ * elf32-arm.c (elf32_arm_reloc_map): Add MOVW and MOVT relocs. (elf32_arm_final_link_relocate): Handle MOVW and MOVT relocs. (elf32_arm_gc_sweep_hook, elf32_arm_check_relocs): Ditto. * reloc.c: Ditto. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * libcoff.h: Regenerate. gas/ * config/tc-arm.c (parse_half): New function. (operand_parse_code): Remove OP_Iffff. Add OP_HALF. (parse_operands): Ditto. (do_mov16): Reject invalid relocations. (do_t_mov16): Ditto. Use Thumb reloc numbers. (insns): Replace Iffff with HALF. (md_apply_fix): Add MOVW and MOVT relocs. (tc_gen_reloc): Ditto. * doc/c-arm.texi: Document relocation operators ld/testsuite/ * ld-arm/arm-elf.exp: Add arm-movwt. * ld-arm/arm-movwt.d: New test. * ld-arm/arm-movwt.s: New test. * ld-arm/arm.ld: Add .far.
2006-05-112006-05-11 Paul Brook <paul@codesourcery.com>Paul Brook1-0/+4
gas/ * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols. gas/testsuite/ * gas/arm/local_function.d: New test. * gas/arm/local_function.s: New test.
2006-05-11 [ gas/ChangeLog ]Thiemo Seufer1-0/+5
* config/tc-mips.c (append_insn): Don't check the range of j or jal addresses. [ gas/testsuite/ChangeLog ] * gas/mips/jal-range.l: Don't check the range of j or jal addresses.
2006-05-11Apply fixes to allow arm WinCE toolchain to produce working executables.Nick Clifton1-0/+6
2006-05-09 [ gas/ChangeLog ]Thiemo Seufer1-0/+5
* config/tc-mips.c (append_insn): Only warn about an out-of-range j or jal address. [ gas/testsuite/ChangeLog ] * gas/mips/jal-range.l: Only warn about an out-of-range j or jal address.
2006-05-09* config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups againstNick Clifton1-0/+6
symbols which are not going to be placed into the symbol table. * coffcode.h (coff_write_relocs): Produce an error message if a an out-of-range symbol index is detected in a reloc.
2006-05-09 * expr.c (operand): Remove `if (0 && ..)' statement andBen Elliston1-0/+8
subsequently unused target_op label. Collapse `if (1 || ..)' statement. * app.c (do_scrub_chars): Remove unused case 0, as it is handled separately above the switch.
2006-05-08 PR gas/2623bNick Clifton1-0/+5
* config/tc-msp430.c (line_separator_character): Define as |.
2006-05-08 [ gas/ChangeLog ]Thiemo Seufer1-0/+18
* config/tc-mips.c (mips_set_options): Add ase_smartmips flag. (mips_opts): Likewise. (file_ase_smartmips): New variable. (ISA_HAS_ROR): SmartMIPS implements rotate instructions. (macro_build): Handle SmartMIPS instructions. (mips_ip): Likewise. (md_longopts): Add argument handling for smartmips. (md_parse_options, mips_after_parse_args): Likewise. (s_mipsset): Add .set smartmips support. (md_show_usage): Document -msmartmips/-mno-smartmips. * doc/as.texinfo: Document -msmartmips/-mno-smartmips and .set smartmips. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] * gas/mips/smartmips.s, gas/mips/smartmips.d: New smartmips test. * gas/mips/mips.exp: Run smartmips test.
2006-05-07 * write.c (relax_segment): Add pass count arg. Don't error onAlan Modra1-0/+8
negative org/space on first two passes. (relax_seg_info): New struct. (relax_seg, write_object_file): Adjust. * write.h (relax_segment): Update prototype.
2006-05-05 * config/tc-arm.c (parse_vfp_reg_list): Improve register boundsJulian Brown1-0/+8
checking. (do_neon_mov): Enable several VMOV variants for VFP. Add suitable architecture version checks. (insns): Allow overlapping instructions to be used in VFP mode.
2006-05-052006-05-05 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-0/+6
PR gas/2598 * config/obj-elf.c (obj_elf_change_section): Allow user specified SHF_ALPHA_GPREL.
2006-05-05* gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups for PMEMNick Clifton1-0/+5
related expressions. * bfd/elf32-avr.c (elf32_avr_relax_delete_bytes): Iterate over all of the bfd's sections for the reloc-addend adjustments.
2006-05-05PR gas/2582Nick Clifton1-0/+10
* dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the insertion of a directory separator character into a string at a given offset. Uses heuristics to decide when to use a backslash character rather than a forward-slash character. (dwarf2_directive_loc): Use the macro. (out_debug_info): Likewise.
2006-05-05 [ gas/ChangeLog ]Thiemo Seufer1-0/+7
* config/tc-mips.c (macro_build): Add case 'k' to handle cache instruction. (macro): Add new case M_CACHE_AB. [ opcodes/ChangeLog ] * mips-opc.c: Add macro for cache instruction. [ include/opcode/ChangeLog ] * mips.h (enum): Add macro M_CACHE_AB.
2006-05-04gas/Kazu Hirata1-0/+10
* config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated. (opcode_lookup): Issue a warning for opcode with OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated identical to OT_cinfix3. (TxC3w, TC3w, tC3w): New. (insns): Use tC3w and TC3w for comparison instructions with 's' suffix. gas/testsuite * gas/arm/armv1.d (error-output): New. * gas/arm/armv1.l: New. * gas/arm/thumb32.d (error-output): New. * gas/arm/thumb32.l: New.
2006-05-03 * subsegs.h (struct frchain): Delete frch_seg.Alan Modra1-0/+31
(frchain_root): Delete. (seg_info): Define as macro. * subsegs.c (frchain_root): Delete. (abs_seg_info, und_seg_info, absolute_frchain): Delete. (subsegs_begin, subseg_change): Adjust for above. (subseg_set_rest): Likewise. Add new frchain structs to seginfo rather than to one big list. (subseg_get): Don't special case abs, und sections. (subseg_new, subseg_force_new): Don't set frchainP here. (seg_info): Delete. (subsegs_print_statistics): Adjust frag chain control list traversal. * debug.c (dmp_frags): Likewise. * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag at frchain_root. Make use of known frchain ordering. (last_frag_for_seg): Likewise. (get_frag_fix): Likewise. Add seg param. (process_entries, out_debug_aranges): Adjust get_frag_fix calls. * write.c (chain_frchains_together_1): Adjust for struct frchain. (SUB_SEGMENT_ALIGN): Likewise. (subsegs_finish): Adjust frchain list traversal. * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise. (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise. (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise. (xtensa_fix_b_j_loop_end_frags): Likewise. (xtensa_fix_close_loop_end_frags): Likewise. (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise. (retrieve_segment_info): Delete frch_seg initialisation.
2006-05-03bfd/Alan Modra1-0/+7
* libbfd-in.h (_bfd_generic_new_section_hook): Declare. * section.c (bfd_abs_symbol, bfd_com_symbol): Delete. (bfd_und_symbol, bfd_ind_symbol): Delete. (BFD_FAKE_SECTION): Remove SYM_PTR param, set symbol_ptr_ptr to &SEC.symbol. (STD_SECTION): Adjust. (_bfd_generic_new_section_hook): New function, extracted from.. (bfd_section_init): ..here. (bfd_make_section_old_way): Call new_section_hook for abs, com, und and ind sections. * elf.c (_bfd_elf_large_com_section): Adjust. * aoutx.h (new_section_hook): Call _bfd_generic_new_section_hook. * pdp11.c (new_section_hook): Likewise. * coffcode.h (coff_new_section_hook): Likewise. * ecoff.c (_bfd_ecoff_new_section_hook): Likewise. * elf.c (_bfd_elf_new_section_hook): Likewise. * vms.c (vms_new_section_hook): Likwise. * elf32-arm.c (elf32_arm_new_section_hook): Check used_by_bfd isn't already set. * elf32-sh64.c (sh64_elf_new_section_hook): Likewise. * elf32-xtensa.c (elf_xtensa_new_section_hook): Likewise. * elf64-mmix.c (mmix_elf_new_section_hook): Likewise. * elf64-ppc.c (ppc64_elf_new_section_hook): Likewise. * elfxx-mips.c (_bfd_mips_elf_new_section_hook): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_new_section_hook): Likewise. * ieee.c (ieee_new_section_hook): Likewise. Call _bfd_generic_new_section_hook too. * mmo.c (mmo_new_section_hook): Likewise. * oasys.c (oasys_new_section_hook): Likewise. * som.c (som_new_section_hook): Likewise. * coff-w65.c (reloc_processing): Don't use bfd_abs_symbol. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/ * subsegs.c (subseg_get): Don't call obj_sec_set_private_data. * config/obj-elf.h (obj_sec_set_private_data): Delete. * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol. * config/tc-mn10300.c (tc_gen_reloc): Likewise.
2006-05-02 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4Joseph Myers1-0/+7
here. (md_apply_fix3): Multiply offset by 4 here for BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2. testsuite: * gas/arm/iwmmxt.s: Increase offsets for wstrb and wstrh. * gas/arm/iwmmxt.d: Update expected results. * gas/arm/iwmmxt-bad2.s: Test wstrb, wstrh, wldrb and wldrh. * gas/arm/iwmmxt-bad2.l: Update expected error messages.
2006-05-022006-05-02 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-0/+23
Jan Beulich <jbeulich@novell.com> * config/tc-i386.c (output_invalid_buf): Change size for unsigned char. * config/tc-tic30.c (output_invalid_buf): Likewise. * config/tc-i386.c (output_invalid): Cast none-ascii char to unsigned char. * config/tc-tic30.c (output_invalid): Likewise.
2006-05-02binutils/Daniel Jacobowitz1-0/+8
* doc/Makefile.am (AM_MAKEINFOFLAGS): New. (TEXI2POD): Use AM_MAKEINFOFLAGS. (config.texi): Don't set top_srcdir. * doc/binutils.texi: Don't use top_srcdir. * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated. gas/ * doc/Makefile.am (AM_MAKEINFOFLAGS): New. (TEXI2POD): Use AM_MAKEINFOFLAGS. (asconfig.texi): Don't set top_srcdir. * doc/as.texinfo: Don't use top_srcdir. * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated. ld/ * Makefile.am (AM_MAKEINFOFLAGS): Add libiberty. (TEXI2POD): Use AM_MAKEINFOFLAGS. (configdoc.texi): Don't set top_srcdir. * ld.texinfo: Don't use top_srcdir. * aclocal.m4, Makefile.in: Regenerated.
2006-05-022006-05-02 Paul Brook <paul@codesourcery.com>Paul Brook1-0/+7
bfd/ * elf32-arm.c (elf32_arm_final_link_relocate): Set thumb funciton bit for R_ARM_REL32. gas/ * config/tc-arm.c (arm_optimize_expr): New function. * config/tc-arm.h (md_optimize_expr): Define (arm_optimize_expr): Add prototype. (TC_FORCE_RELOCATION_SUB_SAME): Define. ld/testsuite/ * ld-arm/arm-elf.exp: Add thumb-rel32. * ld-arm/thumb-rel32.d: New test. * ld-arm/thumb-rel32.s: New test.