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2020-05-20[PATCH v2 0/9] RISC-V: Support version controling for ISA standard extensions...Nelson Chu1-0/+163
2020-05-19Power10 dcbf, sync, and wait extensions.Peter Bergner1-0/+9
2020-05-19Fix the ARM assembler to generate a Realtime profile for armv8-r.Alexander Fedotov1-0/+7
2020-05-19Use bfd_get_filename throughout gasAlan Modra1-0/+6
2020-05-19Clear all local_symbol.lsy_flagsAlan Modra1-0/+4
2020-05-18Re: Fix tight loop on recursively-defined symbolsAlan Modra1-0/+5
2020-05-18Don't handle lret/iret when -mlfence-before-ret=[or|not|shl|yes] since they a...liuhongt1-0/+16
2020-05-15Fix tight loop on recursively-defined symbolsAlan Modra1-0/+13
2020-05-14Update Swedish translation for the gas sub-directory and a new Serbian transl...Nick Clifton1-0/+4
2020-05-11Power10 VSX scalar min-max-compare quad precision operationsAlan Modra1-0/+6
2020-05-11Power10 VSX load/store rightmost element operationsAlan Modra1-0/+6
2020-05-11Power10 test lsb by byte operationAlan Modra1-0/+6
2020-05-11Power10 string operationsAlan Modra1-0/+6
2020-05-11Power10 Set boolean extensionPeter Bergner1-0/+6
2020-05-11Power10 bit manipulation operationsAlan Modra1-0/+6
2020-05-11Power10 VSX PCV generate operationsAlan Modra1-0/+6
2020-05-11Power10 VSX Mask Manipulation OperationsAlan Modra1-0/+6
2020-05-11Power10 Reduced precision outer product operationsAlan Modra1-0/+11
2020-05-11Power10 SIMD permute class operationsAlan Modra1-0/+6
2020-05-11Power10 128-bit binary integer operationsAlan Modra1-0/+6
2020-05-11Power10 VSX 32-byte storage accessAlan Modra1-0/+6
2020-05-11Power10 vector integer multiply, divide, modulo insnsAlan Modra1-0/+6
2020-05-11Power10 byte reverse instructionsPeter Bergner1-0/+6
2020-05-11Power10 Copy/Paste ExtensionsPeter Bergner1-0/+5
2020-05-11Power10 Add new L operand to the slbiag instructionPeter Bergner1-0/+6
2020-05-11PowerPC Rename powerxx to power10Alan Modra1-0/+9
2020-05-06Updated Swedish translation for the gas sub-directoryNick Clifton1-0/+4
2020-05-06Section "3.1 Preprocessing" of the online GAS manual has a wrong reference to...Nick Clifton1-0/+7
2020-05-05Restore readelf's warnings that describe real problems with the file being ex...Nick Clifton1-0/+6
2020-05-05[GAS] change of ELF flags initial value in rx-linuxGunther Nikl1-1/+4
2020-05-04GAS: Do not create an entry for the default directory if the directory table ...Nick Clifton1-0/+5
2020-05-04gas: PR 25863: Fix scalar vmul inside it block when assembling for MVEAndre Simoes Dias Vieira1-0/+7
2020-05-04Fix an illegal memory access in the assembler when generating a DWARF5 file/d...Nick Clifton1-0/+9
2020-04-30AArch64: add GAS support for UDF instructionAlex Coplan1-0/+11
2020-04-30ld: Add rx-linux emulation. gas: Change ELF flags initial value in rx-linuxYoshinori Sato1-0/+5
2020-04-29xtensa: gas: support optional immediate simcall parameterMax Filippov1-0/+9
2020-04-29Update expected disassembly after recent update.Nick Clifton1-0/+1
2020-04-29Fix the disassmbly of SH instructions which have an unsigned 8-bit immediate ...Nick Clifton1-0/+9
2020-04-27x86: Add i386 PE big-object supportTamar Christina1-0/+8
2020-04-27GAS: Allow automatically assigned entries in the file table to be reassigned ...Nick Clifton1-0/+11
2020-04-26Improve -mlfence-after-loadliuhongt1-0/+36
2020-04-22xtensa: fix PR ld/25861Max Filippov1-0/+10
2020-04-22.symver fixesAlan Modra1-0/+9
2020-04-21symver11.s: Add ".balign 8"H.J. Lu1-0/+4
2020-04-21Disallow PC relative for CMPI on MC68000/10Andreas Schwab1-0/+7
2020-04-21BFD: Exclude sections with no content from compress check.Tamar Christina1-0/+6
2020-04-21gas: Extend .symver directiveH.J. Lu1-0/+46
2020-04-20[AArch64, Binutils] Add missing TSB instructionSudakshina Das1-0/+8
2020-04-20[AArch64, Binutils] Make hint space instructions valid for Armv8-aSudakshina Das1-0/+8
2020-04-17bfin: allow ".=.+delta"Alan Modra1-0/+4
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