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2020-06-25cpu: fix offset16 type, update c-calls in bpf.cpuDavid Faust1-14/+6
Correct the type of the offset16 field to HI, and simplify memory accesses which use it. Also update c-calls in semantics for a few instructions. cpu/ChangeLog: 2020-06-25 David Faust <david.faust@oracle.com> * bpf.cpu (f-offset16): Change type from INT to HI. (dxli): Simplify memory access. (dxsi): Likewise. (define-endian-insn): Update c-call in semantics. (dlabs) Likewise. (dlind) Likewise.
2020-06-04cpu,gas,opcodes: remove no longer needed workaround from the BPF portJose E. Marchesi1-7/+3
cpu/ChangeLog: 2020-06-02 Jose E. Marchesi <jose.marchesi@oracle.com> * bpf.cpu (define-bpf-isa): Set base-insn-bitsize to 64. * bpf.opc (bpf_print_insn): Do not set endian_code here. gas/ChangeLog: 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com> * config/tc-bpf.c (md_begin): Pass CGEN_CPU_OPEN_INSN_ENDIAN to bpf_cgen_cpu_open. (md_assemble): Remove no longer needed hack. opcodes/ChangeLog: 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com> * disassemble.c (disassemble_init_for_target): Set endian_code for bpf targets. * bpf-desc.c: Regenerate. * bpf-opc.c: Likewise. * bpf-dis.c: Likewise.
2020-05-28cpu,opcodes: add instruction semantics to bpf.cpu and minor fixesJose E. Marchesi1-91/+241
This patch adds semantic RTL descriptions to the eBPF instructions defined in cpu/bpf.cpu. It also contains a couple of minor improvements. Tested in bpf-unknown-none targets. No regressions. cpu/ChangeLog: 2020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com> David Faust <david.faust@oracle.com> * bpf.cpu (define-alu-insn-un): Add definitions of semantics. (define-alu-insn-mov): Likewise. (daib): Likewise. (define-alu-instructions): Likewise. (define-endian-insn): Likewise. (define-lddw): Likewise. (dlabs): Likewise. (dlind): Likewise. (dxli): Likewise. (dxsi): Likewise. (dsti): Likewise. (define-ldstx-insns): Likewise. (define-st-insns): Likewise. (define-cond-jump-insn): Likewise. (dcji): Likewise. (define-condjump-insns): Likewise. (define-call-insn): Likewise. (ja): Likewise. ("exit"): Likewise. (define-atomic-insns): Likewise. (sem-exchange-and-add): New macro. * bpf.cpu ("brkpt"): New instruction. (bpfbf): Set word-bitsize to 32 and insn-endian big. (h-gpr): Prefer r0 to `a' and r6 to `ctx'. (h-pc): Expand definition. * bpf.opc (bpf_print_insn): Set endian_code to BIG. opcodes/ChangeLog: 2020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com> David Faust <david.faust@oracle.com> * bpf-desc.c: Regenerate. * bpf-opc.h: Likewise. * bpf-opc.c: Likewise. * bpf-dis.c: Likewise.
2020-04-16cpu,gas,opcodes: support for eBPF JMP32 instruction classDavid Faust1-12/+17
Add support for the JMP32 class of eBPF instructions. cpu/ChangeLog * bpf.cpu (define-cond-jump-insn): Renamed from djci. (dcji) New version with support for JMP32 gas/ChangeLog * testsuite/gas/bpf/bpf.exp: Run jump32 tests. * testsuite/gas/bpf/jump32.s: New file. * testsuite/gas/bpf/jump32.d: Likewise. opcodes/ChangeLog * bpf-desc.c: Regenerate. * bpf-desc.h: Likewise. * bpf-opc.c: Regenerate. * bpf-opc.h: Likewise.
2020-01-30cpu,opcodes,gas: fix neg and neg32 instructions in BPFJose E. Marchesi1-1/+1
This patch fixes the neg/neg32 BPF instructions, which have K (=0) instead of X (=1) in their header source bit, despite operating on registes. cpu/ChangeLog: 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com> * bpf.cpu (define-alu-insn-un): The unary BPF instructions (neg and neg32) use OP_SRC_K even if they operate only in registers. opcodes/ChangeLog: 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com> * bpf-opc.c: Regenerate. gas/ChangeLog: 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com> * testsuite/gas/bpf/alu.d: Update expected opcode for `neg'. * testsuite/gas/bpf/alu-be.d: Likewise. * testsuite/gas/bpf/alu32.d: Likewise for `neg32'. * testsuite/gas/bpf/alu32-be.d: Likewise.
2019-12-17ubsan: bpf: left shift cannot be represented in type 'DI' (aka 'long')Alan Modra1-2/+2
cpu/ * bpf.cpu (f-imm64): Avoid signed overflow. opcodes/ * bpf-ibld.c: Regenerate.
2019-11-20cpu: fix comment in bpf.cpuJose E. Marchesi1-1/+1
2019-11-20 Jose E. Marchesi <jose.marchesi@oracle.com> * bpf.cpu: Fix comment describing the 128-bit instruction format.
2019-07-19cpu,opcodes,gas: use %r0 and %r6 instead of %a and %ctf in eBPF disassemblerJose E. Marchesi1-2/+2
This patch changes the eBPF CPU description to prefer the register names %r0 and %r6 instead of %a and %ctx when disassembling. This matches better with the current practice, vs. cBPF. It also updates the GAS tests in order to reflect this change. Tested in a x86_64 host. cpu/ChangeLog: 2019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com> * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of %a and %ctx. opcodes/ChangeLog: 2019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com> * bpf-desc.c: Regenerated. gas/ChangeLog: 2019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com> * testsuite/gas/bpf/alu.d: Use %r6 instead of %ctx. * testsuite/gas/bpf/lddw-be.d: Likewise. * testsuite/gas/bpf/lddw.d: Likewise. * testsuite/gas/bpf/alu-be.d: Likewise. * testsuite/gas/bpf/alu32.d: Likewise.
2019-07-15cpu,opcodes,gas: fix explicit arguments to eBPF ldabs instructionsJose E. Marchesi1-25/+38
This patch fixes the eBPF CPU description in order to reflect the right explicit arguments passed to the ldabs{b,h,w,dw} instructions, updates the corresponding GAS tests, and updates the BPF section of the GAS manual. cpu/ChangeLog: 2019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com> * bpf.cpu (dlabs): New pmacro. (dlind): Likewise. opcodes/ChangeLog: 2019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com> * bpf-desc.c: Regenerate. * bpf-opc.c: Likewise. * bpf-opc.h: Likewise. gas/ChangeLog: 2019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com> * testsuite/gas/bpf/mem.s: ldabs instructions do not take a `src' register as an argument. * testsuite/gas/bpf/mem.d: Updated accordingly. * testsuite/gas/bpf/mem-be.d: Likewise. * doc/c-bpf.texi (BPF Opcodes): Update to reflect the correct explicit arguments to ldabs and ldind instructions.
2019-07-14cpu,opcodes,gas: fix arguments to ldabs and ldind eBPF instructionsJose E. Marchesi1-2/+2
The eBPF non-generic load instructions ldind{b,h,w,dw} and ldabs{b,h,w,dw} do not take an explicit destination register as an argument. Instead, they put the loaded value in %r0, implicitly. This patch fixes the CPU BPF description to not expect a 'dst' argument in these arguments, regenerates the corresponding files in opcodes, and updates the impacted GAS tests. Tested in a x86-64 host. cpu/ChangeLog: 2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com> * bpf.cpu (dlsi): ldabs and ldind instructions do not take an explicit 'dst' argument. opcodes/ChangeLog: 2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com> * bpf-desc.c: Regenerate. * bpf-opc.c: Likewise. gas/ChangeLog: 2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com> * testsuite/gas/bpf/mem.s: Do not use explicit arguments for ldabs and ldind instructions. * testsuite/gas/bpf/mem.d: Updated accordingly. * testsuite/gas/bpf/mem-be.d: Likewise.
2019-05-23cpu: add eBPF cpu descriptionJose E. Marchesi1-0/+647
This patch adds a CPU description for the Linux kernel eBPF virtual machine, plus supporting code for disassembler and assembler. cpu/ChangeLog: 2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com> * bpf.cpu: New file. * bpf.opc: Likewise.