Age | Commit message (Collapse) | Author | Files | Lines |
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* mt.opc (print_dollarhex): Trim values to 32 bits.
opcodes/
* mt-dis.c: Regenerate.
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hosts.
* cgen-asm.c (cgen_parse_signed_integer): Add code to handle the
sign extension of negative values on a 64-bit host.
* frv-asm.c: Regenerate.
* gas/frv/immediates.s: New test file - checks assembly of
constant values.
* gas/frv/immediates.d: Expected disassmbly.
* gas/frv/allinsn.exp: Run the new test.
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* epiphany.opc (parse_branch_addr): Fix type of valuep.
Cast value before printing it as a long.
(parse_postindex): Fix type of valuep.
opcodes:
* epiphany-asm.c, epiphany-opc.h: Regenerate.
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* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
(BFD32_BACKENDS): Add elf32-epiphany.lo .
(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
* archures.c (bfd_arch_epiphany): Add.
(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
(bfd_epiphany_arch): Declare.
(bfd_archures_list): Add &bfd_epiphany_arch.
* config.bfd (epiphany-*-elf): New target case.
* configure.in (bfd_elf32_epiphany_vec): New target vector case.
* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
* targets.c (bfd_elf32_epiphany_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
* readelf.c (include "elf/epiphany.h")
(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
(is_16bit_abs_reloc, is_none_reloc): Likewise.
* po/binutils.pot: Regenerate.
cpu:
* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
* NEWS: Mention addition of Adapteva Epiphany support.
* config/tc-epiphany.c, config/tc-epiphany.h: New files.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
* configure.in: Also set using_cgen for epiphany.
* configure.tgt: Handle epiphany.
* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
* doc/all.texi: Set EPIPHANY.
* doc/as.texinfo: Add EPIPHANY-specific text.
* doc/c-epiphany.texi: New file.
* po/gas.pot: Regenerate.
gas/testsuite:
* gas/epiphany: New directory.
include:
* dis-asm.h (print_insn_epiphany): Declare.
* elf/epiphany.h: New file.
* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
* NEWS: Mention addition of Adapteva Epiphany support.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
(eelf32epiphany.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Handle epiphany-*-elf.
* po/ld.pot: Regenerate.
* testsuite/ld-srec/srec.exp: xfail epiphany.
* emulparams/elf32epiphany.sh: New file.
opcodes:
* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
(TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c,
epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
(CLEANFILES): Add stamp-epiphany.
(EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it.
(stamp-epiphany): New rule.
* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
* configure.in: Handle bfd_epiphany_arch.
* disassemble.c (ARCH_epiphany): Define.
(disassembler): Handle bfd_arch_epiphany.
* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
* epiphany-opc.h: Likewise.
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* m32c-ibld.c: Regenerate.
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(duhpo, dshpo): New pmacros.
(simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
(uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
attribute, define with dshpo.
(uimm24): Delete HASH-PREFIX attribute.
* m32r.opc (CGEN_PRINT_NORMAL): Delete.
(print_signed_with_hash_prefix): New function.
(print_unsigned_with_hash_prefix): New function.
* xc16x.cpu (dowh): New pmacro.
(upof16): Define with dowh, specify print handler.
(qbit, qlobit, qhibit): Ditto.
(upag16): Ditto.
* xc16x.opc (CGEN_PRINT_NORMAL): Delete.
(print_with_dot_prefix): New functions.
(print_with_pof_prefix, print_with_pag_prefix): New functions.
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* sid-cpu.scm (cgen-desc.h): Ditto.
* enum.scm (enum-builtin!): New function.
* read.scm (reader-install-builtin!): Call it.
* rtl-c.scm (s-convop): Delete, replaced with ...
(s-int-convop, s-float-convop): ... new fns.
(ext, zext, trunc): Update.
(fext, ftrunc, float, ufloat, fix, ufix): Update.
* rtx-funcs.scm (fext, ftrunc, float, ufloat, fix, ufix): New parameter
`how'.
* cpu/mep-fmax.cpu (fcvtsw): Update.
* cpu/sh.cpu (h-fsd, h-fmov): Update.
* doc/rtl.texi (float-convop): Update.
* frv.cpu (floating-point-conversion): Update call to fp conv op.
(floating-point-dual-conversion, ne-floating-point-dual-conversion,
conditional-floating-point-conversion, ne-floating-point-conversion,
float-parallel-mul-add-double-semantics): Ditto.
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* m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
(f-dsp-40-u20, f-dsp-40-u24): Ditto.
opcodes/
* cgen-ibld.in: #include "cgen/basic-modes.h".
* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
* xstormy16-ibld.c: Regenerate.
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Fix up all warnings generated by the addition of this switch.
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* xc16x.cpu (mov4): Fix mode of `sequence'.
(mov9, mov10): Ditto.
(movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
(callr, callseg, calls, trap, rets, reti): Ditto.
(jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
(atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
(exts, exts1, extsr, extsr1, prior): Ditto.
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* m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
cgen-ops.h -> cgen/basic-ops.h.
include/opcode/
* cgen-bitset.h: Delete, moved to ../cgen/bitset.h.
* cgen.h: Update. Improve multi-inclusion macro name.
include/cgen/
* basic-modes.h: New file. Moved here from opcodes/cgen-types.h.
* basic-ops.h: New file. Moved here from opcodes/cgen-ops.h.
* bitset.h: New file. Moved here from ../opcode/cgen-bitset.h.
Update license to GPL v3.
opcodes/
* cgen-ops.h: Delete, moved to ../include/cgen/basic-ops.h.
* cgen-types.h: Delete, moved to ../include/cgen/basic-modes.h.
* cgen-bitset.c: Update.
* fr30-desc.h: Regenerate.
* frv-desc.h: Regenerate.
* ip2k-desc.h: Regenerate.
* iq2000-desc.h: Regenerate.
* lm32-desc.h: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-opc.h: Regenerate.
* m32r-desc.h: Regenerate.
* mep-desc.h: Regenerate.
* mt-desc.h: Regenerate.
* openrisc-desc.h: Regenerate.
* xc16x-desc.h: Regenerate.
* xstormy16-desc.h: Regenerate.
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(stb-plus): Ditto.
(clrpsw): Fix mask calculation.
(bset, bclr, btst): Make mode in bit calculation match expression.
* xc16x.cpu (rtl-version): Set to 0.8.
(gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
make uppercase. Remove unnecessary name-prefix spec.
(grb-names, conditioncode-names, extconditioncode-names): Ditto.
(grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
(reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
(h-cr): New hardware.
(muls): Comment out parts that won't compile, add fixme.
(mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
(scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
(bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
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(df): Invoke define-full-ifield instead of claiming it's an alias.
(dno): Define.
(dnop): Mark as deprecated.
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* m32c.opc (parse_lab_5_3): Use correct enum.
opcodes/
* m32c-asm.c: Regenerate.
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(DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
(media-arith-sat-semantics): Explicitly sign- or zero-extend
arguments of "operation" to DI using "mode" and the new pmacros.
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of number 2, PID.
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to source.
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updating flags.
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(Lab-24-8, Lab-32-8, Lab-40-8): Fix.
(arith-jnz-imm4-dst-defn): Make relaxable.
(arith-jnz16-imm4-dst-defn): Fix encodings.
* m32c-desc.c: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-opc.c: Regenerate.
* config/tc-m32c.c (rl_for, relaxable): Protect argument.
(md_relax_table): Add entries for ADJNZ macros.
(M32C_Macros): Add ADJNZ macros.
(subtype_mappings): Add entries for ADJNZ macros.
(insn_to_subtype): Check for adjnz and sbjnz insns.
(md_estimate_size_before_relax): Pass insn to insn_to_subtype.
(md_convert_frag): Convert adjnz and sbjnz.
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mem20): New.
(src16-16-20-An-relative-*): New.
(dst16-*-20-An-relative-*): New.
(dst16-16-16sa-*): New
(dst16-16-16ar-*): New
(dst32-16-16sa-Unprefixed-*): New
(jsri): Fix operands.
(setzx): Fix encoding.
* m32c-asm.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-dis.h: Regenerate.
* m32c-ibld.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
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decides if this function accepts symbolic constants or not.
(parse_signed_bitbase): Likewise.
(parse_unsigned_bitbase8): Pass the new parameter.
(parse_unsigned_bitbase11): Likewise.
(parse_unsigned_bitbase16): Likewise.
(parse_unsigned_bitbase19): Likewise.
(parse_unsigned_bitbase27): Likewise.
(parse_signed_bitbase8): Likewise.
(parse_signed_bitbase11): Likewise.
(parse_signed_bitbase19): Likewise.
* m32c-asm.c: Regenerate.
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(btst:s): New.
* m32c.opc (parse_bit3_S): New.
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(btst): Add optional :G suffix for MACH32.
(or.b:S): New.
(pop.w:G): Add optional :G suffix for MACH16.
(push.b.imm): Fix syntax.
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(mulu.l): New.
* m32c-desc.c: Regenerate with mul.l, mulu.l.
* m32c-opc.c: Likewise.
* m32c-opc.h: Likewise.
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* m32c.h: Add relax relocs.
[cpu]
* m32c.cpu (RL_TYPE): New attribute, with macros.
(Lab-8-24): Add RELAX.
(unary-insn-defn-g, binary-arith-imm-dst-defn,
binary-arith-imm4-dst-defn): Add 1ADDR attribute.
(binary-arith-src-dst-defn): Add 2ADDR attribute.
(jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
attribute.
(jsri16, jsri32): Add 1ADDR attribute.
(jsr32.w, jsr32.a): Add JUMP attribute.
[opcodes]
* m32c-desc.c: Regenerate with linker relaxation attributes.
* m32c-desc.h: Likewise.
* m32c-dis.c: Likewise.
* m32c-opc.c: Likewise.
[gas]
* config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
(tc_gen_reloc): Don't define.
* config/tc-m32c.c (rl_for, relaxable): New convenience macros.
(OPTION_LINKRELAX): New.
(md_longopts): Add it.
(m32c_relax): New.
(md_parse_options): Set it.
(md_assemble): Emit relaxation relocs as needed.
(md_convert_frag): Emit relaxation relocs as needed.
(md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
(m32c_apply_fix): New.
(tc_gen_reloc): New.
(m32c_force_relocation): Force out jump relocs when relaxing.
(m32c_fix_adjustable): Return false if relaxing.
[bfd]
* elf32-m32c.c (m32c_elf_howto_table): Add relaxation relocs.
(m32c_elf_relocate_section): Don't relocate them.
(compare_reloc): New.
(relax_reloc): Remove.
(m32c_offset_for_reloc): New.
(m16c_addr_encodings): New.
(m16c_jmpaddr_encodings): New.
(m32c_addr_encodings): New.
(m32c_elf_relax_section): Relax jumps and address displacements.
(m32c_elf_relax_delete_bytes): Adjust for internal syms. Fix up
short jumps.
* reloc.c: Add m32c relax relocs.
* libbfd.h: Regenerate.
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(push32.b.imm): Likewise, for the comment.
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* bfd/archures.c (bfd_arch_mt): Renamed.
(bfd_mt_arch): Renamed.
(bfd_archures_list): Adjusted.
* bfd/bfd-in2.h: Rebuilt.
* bfd/config.bfd (mt): Remove special case targ_archs.
(mt-*-elf): Rename bfd_elf32_mt_vec.
* bfd/configure: Rebuilt.
* bfd/configure.in (bfd_elf32_mt_vec): Renamed.
(selarchs) Remove mt special case.
* bfd/cpu-mt.c (arch_info_struct): Adjust.
(bfd_mt_arch): Renamed, adjust.
* bfd/elf32-mt.c (mt_reloc_type_lookup, mt_info_to_howto_rela,
mt_elf_relocate_hi16, mt_final_link_relocate, mt_relocate_section,
mt_elf_howto_table): Renamed, adjusted.
(mt_elf_gc_mark_hook, mt_elf_gc_sweep_hook, mt_elf_check_relocs,
elf32_mt_machine, mt_elf_object_p, mt_elf_set_private_flags,
mt_elf_copy_private_bfd_data, mt_elf_merge_private_bfd_data,
mt_elf_print_private_bfd_data): Renamed, adjusted.
(TARGET_BIG_SYM, TARGET_BIG_NAME, ELF_ARCH, ELF_MACHINE_CODE,
ELF_MAXPAGESIZE, elf_info_to_howto, elf_backend_relocate_section,
bfd_elf32_bfd_reloc_type_lookup, elf_backend_gc_mark_hook,
elf_backend_gc_sweep_hook, elf_backend_check_relocs,
eld_backend_object_p, bfd_elf32_bfd_set_private_flags,
bfd_elf32_bfd_copy_private_bfd_data,
bfd_elf32_bfd_merge_private_bfd_data,
bfd_elf32_bfd_print_private_bfd_data): Adjusted.
* bfd/libbfd.h: Regenerated.
* bfd/reloc.c (BFD_RELOC_MT_PC16, BFD_RELOC_MT_HI16,
BFD_RELOC_MT_LO16, BFD_RELOC_MT_GNU_VTINHERIT,
BFD_RELOC_MT_GNU_VTENTRY, BFD_RELOC_MT_PCINSN8): Renamed.
* bfd/targets.c (bfd_elf32_mt_vec): Renamed.
(_bfd_target_vector): Adjusted.
* binutils/readelf.c (guess_is_rela): Use EM_MT.
(dump_relocations, get_machine_name): Adjust.
* cpu/mt.cpu (define-arch, define-isa): Set name to mt.
(define-mach): Adjust.
* cpu/mt.opc (CGEN_ASM_HASH): Update.
(mt_asm_hash, mt_cgen_insn_supported): Renamed.
(parse_loopsize, parse_imm16): Adjust.
* gas/configure: Rebuilt.
* gas/configure.in (mt): Remove special case.
* gas/config/tc-mt.c (opcodes/mt-desc.h, opcodes/mt-opc.h): Change
#includes.
(mt_insn, mt_mach, mt_mach_bitmask, mt_flags, mt_architectures):
Rename, adjust.
(md_parse_option, md_show_usage, md_begin, md_assemble,
md_cgen_lookup_reloc, md_atof): Adjust.
(mt_force_relocation, mt_apply_fix, mt_fix_adjustable): Rename, adjust.
* gas/config/tc-mt.h (TC_MT): Rename.
(LISTING_HEADER, TARGET_ARCH, TARGET_FORMAT): Adjust.
(md_apply_fix): Adjust.
(mt_apply_fix, mt_fix_adjustable, mt_force_relocation): Rename.
(TC_FORCE_RELOCATION, tc_fix_adjustable): Adjust.
* gdb/mt-tdep.c (mt_arch_constants, mt_gdb_regnums): Rename, adjust.
(mt_register_name, mt_register_type, mt_register_reggroup_p,
mt_return_value, mt_skip_prologue, mt_breapoint_from_pc,
mt_pseudo_register_read, mt_pseudo_register_write, mt_frame_align,
mt_registers_info, mt_push_dummy_call, mt_unwind_cache,
mt_frame_unwind_cache, mt_unwind_pc, mt_unwind_dummy_id,
mt_frame_this_id, mt_frame_prev_register, mt_frame_base_address,
mt_frame_unwind, mt_frame_sniffer, mt_frame_base, mt_gdbarch_init,
_initialize_mt_tdep): Rename & adjust.
* include/dis-asm.h (print_insn_mt): Renamed.
* include/elf/common.h (EM_MT): Renamed.
* include/elf/mt.h: Rename relocs, cpu & other defines.
* ld/emulparams/elf32mt.sh (ARCH, OUTPUT_FORMAT): Adjust.
* opcodes/Makefile.am (HFILES, CFILES, ALL_MACHINES): Adjust.
(stamp-mt): Adjust rule.
(mt-asm.lo, mt-desc.lo, mt-dis.lo, mt-ibld.lo, mt-opc.lo): Rename &
adjust.
* opcodes/Makefile.in: Rebuilt.
* opcodes/configure: Rebuilt.
* opcodes/configure.in (bfd_mt_arch): Rename & adjust.
* opcodes/disassemble.c (ARCH_mt): Renamed.
(disassembler): Adjust.
* opcodes/mt-asm.c: Renamed, rebuilt.
* opcodes/mt-desc.c: Renamed, rebuilt.
* opcodes/mt-desc.h: Renamed, rebuilt.
* opcodes/mt-dis.c: Renamed, rebuilt.
* opcodes/mt-ibld.c: Renamed, rebuilt.
* opcodes/mt-opc.c: Renamed, rebuilt.
* opcodes/mt-opc.h: Renamed, rebuilt.
* sid/Makefile.in: Rebuilt.
* sid/aclocal.m4: Rebuilt.
* sid/configure: Rebuilt.
* sid/sid.spec: Adjust.
* sid/bsp/Makefile.am: Adjust.
* sid/bsp/Makefile.in: Rebuilt.
* sid/bsp/aclocal.m4: Rebuilt.
* sid/bsp/configrun-sid.in: Adjust.
* sid/bsp/pregen/Makefile.in: Rebuilt.
* sid/bsp/pregen/mt-gdb.conf: Renamed & rebuilt.
* sid/bsp/pregen/mt-gloss.conf: Renamed & rebuilt.
* sid/bsp/pregen/pregen-configs.in: Adjust.
* sid/component/aclocal.m4: Rebuilt.
* sid/component/configure: Rebuilt.
* sid/component/tconfig.in: Adjust.
* sid/component/bochs/aclocal.m4: Rebuilt.
* sid/component/cache/Makefile.in: Rebuilt.
* sid/component/cgen-cpu/Makefile.in: Rebuilt.
* sid/component/cgen-cpu/aclocal.m4: Rebuilt.
* sid/component/cgen-cpu/compCGEN.cxx: Adjust.
* sid/component/cgen-cpu/configure: Rebuilt.
* sid/component/cgen-cpu/configure.in: Rebult.
* sid/component/cgen-cpu/mt/Makefile.am: Adjust.
* sid/component/cgen-cpu/mt/Makefile.in: Rebuilt.
* sid/component/cgen-cpu/mt/hw-cpu-mt.txt: Adjust.
* sid/component/cgen-cpu/mt/mt-cpu.h: Rebuilt.
* sid/component/cgen-cpu/mt/mt-decode.cxx: Rebuilt.
* sid/component/cgen-cpu/mt/mt-decode.h: Rebuilt.
* sid/component/cgen-cpu/mt/mt-defs.h: Rebuilt.
* sid/component/cgen-cpu/mt/mt-desc.h: Rebuilt.
* sid/component/cgen-cpu/mt/mt-sem.cxx: Rebuilt.
* sid/component/cgen-cpu/mt/mt-write.cxx: Rebuilt.
* sid/component/cgen-cpu/mt/mt.cxx: Adjust.
* sid/component/cgen-cpu/mt/mt.h: Adjust.
* sid/component/consoles/Makefile.in: Rebuilt.
* sid/component/families/aclocal.m4: Rebuilt.
* sid/component/families/configure: Rebuilt.
* sid/component/gdb/Makefile.in: Rebuilt.
* sid/component/gloss/Makefile.in: Rebuilt.
* sid/component/glue/Makefile.in: Rebuilt.
* sid/component/ide/Makefile.in: Rebuilt.
* sid/component/interrupt/Makefile.in: Rebuilt.
* sid/component/lcd/Makefile.in: Rebuilt.
* sid/component/lcd/testsuite/Makefile.in: Rebuilt.
* sid/component/loader/Makefile.am: Rebuilt.
* sid/component/loader/Makefile.in: Rebuilt.
* sid/component/mapper/Makefile.in: Rebuilt.
* sid/component/mapper/testsuite/Makefile.in: Rebuilt.
* sid/component/memory/Makefile.in: Rebuilt.
* sid/component/mmu/Makefile.in: Rebuilt.
* sid/component/parport/Makefile.in: Rebuilt.
* sid/component/profiling/Makefile.in: Rebuilt.
* sid/component/rtc/Makefile.in: Rebuilt.
* sid/component/sched/Makefile.in: Rebuilt.
* sid/component/testsuite/Makefile.in: Rebuilt.
* sid/component/timers/aclocal.m4: Rebuilt.
* sid/component/timers/configure: Rebuilt.
* sid/component/uart/Makefile.in: Rebuilt.
* sid/component/uart/testsuite/Makefile.in: Rebuilt.
* sid/config/config.sub: Adjust.
* sid/config/info.tcl.in: Adjust.
* sid/config/sidtargets.m4: Adjust.
* sid/doc/Makefile.in: Rebuilt.
* sid/main/dynamic/Makefile.am: Rebuilt.
* sid/main/dynamic/Makefile.in: Rebuilt.
* sid/main/dynamic/aclocal.m4: Rebuilt.
* sid/main/dynamic/configure: Rebuilt.
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symbols.
(indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
indexwd, indexws): Fix encodings.
* m32c-desc.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
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* config.sub: Replace ms1 arch with mt. Allow ms1 as alias.
* configure.in: Replace ms1 arch with mt.
* configure: Rebuilt.
* bfd/Makefile.am (ALL_MACHINES, ALL_MACHINES_CFILES,
BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Replace ms1 with mt.
(cpu_mt.lo, elf32-mt.lo): Update target and dependency names.
* bfd/Makefile.in: Rebuilt.
* bfd/config.bfd: Replace ms1 arch with mt.
* bfd/configure.in: Replace ms1 files with mt files.
* bfd/configure: Rebuilt.
* bfd/elf32-mt.c: Renamed from elf32-ms1.c. Update include files.
* bfd/cpu-mt.c: Renamed from cpu-ms1.c.
* cpu/mt.cpu: Rename from ms1.cpu.
* cpu/mt.opc: Rename from ms1.opc.
* binutils/Makefile.am: Replace ms1 files with mt files.
* binutils/Makefile.in: Rebuilt.
* binutils/readelf.c (elf/mt.h): Adjust #include.
* gas/configure.in: Replace ms1 arch with mt arch.
* gas/configure: Rebuilt.
* gas/configure.tgt: Replace ms1 arch with mt arch.
* gas/config/tc-mt.c: Renamed from tc-ms1.c: Update include files.
* gas/doc/Makefile.am (CPU_DOCS): Replace ms1 files with mt files.
* gas/doc/Makefile.in: Rebuilt.
* gas/testsuite/gas/mt: Renamed from ms1 dir. Update file names as
needed.
* gas/testsuite/gas/mt/errors.exp: Replace ms1 arch with mt arch.
* gas/testsuite/gas/mt/mt.exp: Replace ms1 arch with mt arch.
* gas/testsuite/gas/mt/relocs.exp: Replace ms1 arch with mt arch.
* gdb/configure.tgt: Replace ms1 arch with mt arch.
* gdb/config/mt: Renamed from ms1 dir. Update file names as needed.
* gdb/config/mt/mt.mt (TDEPFILES): Replace ms1 file with mt file.
* include/elf/mt.h: Renamed from ms1.h
* ld/Makefile.am (ALL_EMULATIONS): Replace ms1 files with mt files.
(eelf32mt.c): Update target name and dependencies.
* ld/Makefile.in: Rebuilt.
* ld/configure.tgt: Replace ms1 arch with mt arch.
* ld/emulparams/elf32mt.sh: Renamed from elf32ms1.sh. Update
comment.
* libgloss/configure.in: Replace ms1 arch with mt arch.
* libgloss/configure: Rebuilt.
* libgloss/mt: Renamed from ms1 dir.
* newlib/configure.host: Replace ms1 arch with mt arch.
* newlib/libc/machine/mt: Renamed from ms1 dir.
* opcodes/Makefile.am (CLEANFILES, CGEN_CPUS, MT_DEPS): Replace ms1
with mt.
* opcodes/Makefile.in: Rebuilt.
* opcodes/configure.in: Replace ms1 files with mt files.
* opcodes/configure: Rebuilt.
* sid/component/cgen-cpu/mt: Renamed from ms1 dir. Update file
names as appropriate.
* sid/component/cgen-cpu/mt/Makefile.am: Replace ms1 files with mt
files.
* sid/component/cgen-cpu/mt/Makefile.in: Rebuilt.
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(simplecris-common-readable-specregs): Split from
simplecris-common-specregs. All users changed.
(cris-implemented-writable-specregs-v0)
(cris-implemented-readable-specregs-v0): Similar from
cris-implemented-specregs-v0.
(cris-implemented-writable-specregs-v3)
(cris-implemented-readable-specregs-v3)
(cris-implemented-writable-specregs-v8)
(cris-implemented-readable-specregs-v8)
(cris-implemented-writable-specregs-v10)
(cris-implemented-readable-specregs-v10)
(cris-implemented-writable-specregs-v32)
(cris-implemented-readable-specregs-v32): Similar.
(bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
insns and specializations.
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Add ms2.
* archures.c (bfd_mach_ms2): Define.
* cpu-ms1.c (arch_info_struct): Add ms2 stanza.
* elf32-ms1.c (elf32_ms1_machine): Add ms2 case.
(ms1_elf_merge_private_bfd_data): Remove unused variables. Add
correct merging logic, with workaround.
(ms1_elf_print_private_bfd_data): Add ms2 case.
* reloc.c (BFD_RELOC_MS1_PCINSN8): Add ms2 specific reloc.
* libbfd.h: Regenerated.
* bfd-in2.h: Regenerated.
cpu:
Add ms2
* ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
model.
(f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
f-cb2incr, f-rc3): New fields.
(LOOP): New instruction.
(JAL-HAZARD): New hazard.
(imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
New operands.
(mul, muli, dbnz, iflush): Enable for ms2
(jal, reti): Has JAL-HAZARD.
(ldctxt, ldfb, stfb): Only ms1.
(fbcb): Only ms1,ms1-003.
(wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
fbcbincrs, mfbcbincrs): Enable for ms2.
(loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
* ms1.opc (parse_loopsize): New.
(parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
(print_pcrel): New.
gas:
Add ms2.
* config/tc-ms1.c (ms1_mach_bitmask): Initialize to MS1.
(ms1_architectures): Add ms2.
(md_parse_option): Add ms2.
(md_show_usage): Add ms2.
(md_assemble): Add JAL_HAZARD detection logic.
(md_cgen_lookup_reloc): Add MS1_OPERAND_LOOPSIZE case.
* doc/c-ms1.texi: New.
* doc/all.texi: Add MS1.
* doc/Makefile.am (CPU_DOCS): Add c-ms1.texi.
* doc/Makefile.in: Rebuilt.
* doc/Makefile: Rebuilt.
gas/testsuite:
Add ms2.
* gas/ms1/allinsn.d: Adjust pcrel disassembly.
* gas/ms1/errors.exp: Fix target triplet.
* gas/ms1/ms1-16-003.d: Adjust pcrel disassembly.
* gas/ms1/ms1-16-003.s: Tweak label.
* gas/ms1/ms1.exp: Adjust target triplet. Add ms2 test.
* gas/ms1/ms2.d, gas/ms1/ms2.s: New.
* gas/ms1/relocs.d: Adjust expected machine name and pcrel
disassembly.
* gas/ms1/relocs.exp: Adjust target triplet.
include:
Add ms2.
* elf/ms1.h (EF_MS1_CPU_MS2): New.
opcodes:
Add ms2.
* ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
ms1-opc.c, ms1-opc.h: Regenerated.
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Contribute the following change:
2003-09-24 Dave Brolley <brolley@redhat.com>
* frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
CGEN_ATTR_VALUE_TYPE.
* m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
Use cgen_bitset_intersect_p.
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(arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
imm operand is needed.
(adjnz, sbjnz): Pass the right operands.
(unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
unary-insn): Add -g variants for opcodes that need to support :G.
(not.BW:G, push.BW:G): Call it.
(stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
stzx16-imm8-imm8-abs16): Fix operand typos.
* m32c.opc (m32c_asm_hash): Support bnCND.
(parse_signed4n, print_signed4n): New.
* m32c-asm.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-ibld.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
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(mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
dsp8[sp] is signed.
(mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
(mov.BW:S r0,r1): Fix typo r1l->r1.
(tst): Allow :G suffix.
* m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
* m32c-asm.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-ibld.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
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making one a macro of the other.
* m32c-asm.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-ibld.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
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* m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
(indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
indexld, indexls): .w variants have `1' bit.
(rot32.b): QI, not SI.
(rot32.w): HI, not SI.
(xchg16): HI for .w variant.
[opcodes]
* m32c-asm.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-ibld.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
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