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2017-01-02Update year range in copyright notice of all files.Alan Modra133-133/+137
2017-01-02ChangeLog rotationAlan Modra2-973/+987
2016-12-31PRU Binutils portDimitar Dimitrov2-0/+25
* readelf.c (guess_is_rela): Add EM_TI_PRU. (dump_relocations): Invoke elf_pru_reloc_type. (get_machine_name): Handle EM_TI_PRU. (is_32bit_abs_reloc): Handle R_PRU_BFD_RELOC_32. (is_16bit_abs_reloc): Handle R_PRU_BFD_RELOC_16. (is_none_reloc): Handle PRU_NONE and PRU_DIFF variants. Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
2016-12-23MIPS16: Add ASMACRO instruction supportMaciej W. Rozycki2-8/+9
Add ASMACRO instruction support as per the MIPS16e ASE architecture specifications [1][2], completing MIPS16e instruction set support. [1] "MIPS32 Architecture for Programmers, Volume IV-a: The MIPS16e Application-Specific Extension to the MIPS32 Architecture", MIPS Technologies, Inc., Document Number: MD00076, Revision 2.63, July 16, 2013, Section 4.1 "MIPS16e Instruction Descriptions", p. 65 [2] "MIPS64 Architecture for Programmers, Volume IV-a: The MIPS16e Application-Specific Extension to the MIPS64 Architecture", MIPS Technologies, Inc., Document Number: MD00077, Revision 2.60, June 25, 2008, Section 1.1 "MIPS16e Instruction Descriptions", p. 66 include/ * opcode/mips.h: Document `0', `1', `2', `3', `4' and `s' operand codes. opcodes/ * mips16-opc.c (decode_mips16_operand): Add `0', `1', `2', `3', `4' and `s' operand codes. (mips16_opcodes): Add "asmacro" entry. binutils/ * testsuite/binutils-all/mips/mips16-extend-insn.d: Update for ASMACRO support. gas/ * testsuite/gas/mips/mips16-asmacro.d: New test. * testsuite/gas/mips/mips16-32@mips16-asmacro.d: New test. * testsuite/gas/mips/mips16-64@mips16-asmacro.d: New test. * testsuite/gas/mips/mips16-asmacro.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests.
2016-12-23MIPS16: Handle non-extensible instructions correctlyMaciej W. Rozycki4-0/+973
Identify non-extensible instructions in the MIPS16 opcode table and disallow their use with the `.e' instruction size suffix in assembly and do not interpret any EXTEND prefix present as a part of the instruction in disassembly. According to all versions of the MIPS16 ASE specifications the following instructions encodings are not extensible [1][2][3][4][5][6]: I8/MOV32R, I8/MOVR32, all RRR minor opcodes, all RR minor opcodes except from DSRA and DSRL, and EXTEND itself, and as from revision 2.50 of the MIPS16e ASE specifications it has been further clarified what was previously implied, that non-extesiable instructions when preceded with an EXTEND prefix must cause a Reserved Instruction exception [3][5]. Therefore in the presence of an EXTEND prefix none of these instructions are supposed to be handled as extended instructions and supporting these forms in disassembly causes confusion, and in the case of the RRR major opcode it also clashes with the ASMACRO encoding. References: [1] "Product Description, MIPS16 Application-Specific Extension", Version 1.3, MIPS Technologies, Inc., 970130, Table 3. "MIPS16 Instruction Set Summary", p. 5 [2] same, Table 5 "RR Minor Opcodes (RR-type instructions)", p.10 [3] "MIPS32 Architecture for Programmers, Volume IV-a: The MIPS16e Application-Specific Extension to the MIPS32 Architecture", MIPS Technologies, Inc., Document Number: MD00076, Revision 2.63, July 16, 2013, Section 3.9 "MIPS16e Instruction Summaries", pp. 37-39 [4] same, Section 3.15 "Instruction Bit Encoding", pp. 46-49 [5] "MIPS64 Architecture for Programmers, Volume IV-a: The MIPS16e Application-Specific Extension to the MIPS64 Architecture", MIPS Technologies, Inc., Document Number: MD00077, Revision 2.60, June 25, 2008, Section 1.9 "MIPS16e Instruction Summaries", pp. 38-41 [6] same, Section 1.15 "Instruction Bit Encoding", pp. 48-51 include/ * opcode/mips.h (INSN2_SHORT_ONLY): New macro. gas/ * config/tc-mips.c (is_size_valid_16): Disallow a `.e' suffix instruction size override for INSN2_SHORT_ONLY opcode table entries. * testsuite/gas/mips/mips16-extend-swap.d: Adjust output. * testsuite/gas/mips/mips16-macro-e.l: Adjust error messages. * testsuite/gas/mips/mips16-32@mips16-macro-e.l: Adjust error messages. * testsuite/gas/mips/mips16e-32@mips16-macro-e.l: Adjust error messages. * testsuite/gas/mips/mips16-insn-e.d: New test. * testsuite/gas/mips/mips16-insn-t.d: New test. * testsuite/gas/mips/mips16-32@mips16-insn-e.d: New test. * testsuite/gas/mips/mips16-64@mips16-insn-e.d: New test. * testsuite/gas/mips/mips16e-32@mips16-insn-e.d: New test. * testsuite/gas/mips/mips16-32@mips16-insn-t.d: New test. * testsuite/gas/mips/mips16-64@mips16-insn-t.d: New test. * testsuite/gas/mips/mips16e-32@mips16-insn-t.d: New test. * testsuite/gas/mips/mips16-insn-e.l: New stderr output. * testsuite/gas/mips/mips16-insn-t.l: New stderr output. * testsuite/gas/mips/mips16-32@mips16-insn-e.l: New stderr output. * testsuite/gas/mips/mips16-64@mips16-insn-e.l: New stderr output. * testsuite/gas/mips/mips16e-32@mips16-insn-e.l: New stderr output. * testsuite/gas/mips/mips16-32@mips16-insn-t.l: New stderr output. * testsuite/gas/mips/mips16-64@mips16-insn-t.l: New stderr output. * testsuite/gas/mips/mips16e-32@mips16-insn-t.l: New stderr output. * testsuite/gas/mips/mips16-insn-e.s: New test source. * testsuite/gas/mips/mips16-insn-t.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests. opcodes/ * mips-dis.c (print_insn_mips16): Disallow EXTEND prefix matching for INSN2_SHORT_ONLY opcode table entries. * mips16-opc.c (SH): New macro. (mips16_opcodes): Set SH in `pinfo2' for non-extensible instruction entries: "nop", "addu", "and", "break", "cmp", "daddu", "ddiv", "ddivu", "div", "divu", "dmult", "dmultu", "drem", "dremu", "dsllv", "dsll", "dsrav", "dsra", "dsrlv", "dsrl", "dsubu", "exit", "entry", "jalr", "jal", "jr", "j", "jalrc", "jrc", "mfhi", "mflo", "move", "mult", "multu", "neg", "not", "or", "rem", "remu", "sllv", "sll", "slt", "sltu", "srav", "sra", "srlv", "srl", "subu", "xor", "sdbbp", "seb", "seh", "sew", "zeb", "zeh", "zew" and "extend". binutils/ * testsuite/binutils-all/mips/mips16-extend-insn.d: New test. * testsuite/binutils-all/mips/mips16-extend-insn.s: New test source. * testsuite/binutils-all/mips/mips.exp: Run the new tests.
2016-12-23Bump version to 2.28.51Tristan Gingold2-10/+14
bfd/ 2016-12-23 Tristan Gingold <gingold@adacore.com> * version.m4: Bump version to 2.28.51 * configure: Regenerate. binutils/ 2016-12-23 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. gas/ 2016-12-23 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. gprof/ 2016-12-23 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. ld/ 2016-12-23 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. opcodes/ 2016-12-23 Tristan Gingold <gingold@adacore.com> * configure: Regenerate.
2016-12-23Add marker in NEWS filesTristan Gingold3-0/+7
binutils/ 2016-12-23 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.28. gas/ 2016-12-23 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.28. ld/ 2016-12-23 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.28.
2016-12-23Regenerate pot files.Tristan Gingold2-1611/+3150
2016-12-20MIPS16/opcodes: Respect ISA and ASE in disassemblyMaciej W. Rozycki2-1/+6
Limit MIPS16 instruction disassembly according to the ISA level and ASE set selected, as with the regular MIPS and microMIPS instruction sets. Retain the property of `objdump -m mips:16' disassembling all MIPS16 instructions however, regardless of any ISA level recorded in the binary examined. To validate the disassembler use the GAS test suite for its convenience of running tests across multiple ISAs, even though placing the tests in the binutils test suite would be more appropriate. Adjust the single binutils test which depends on 64-bit instruction disassembly to have the ISA level required actually recorded in the binary examined. opcodes/ * mips-dis.c (mips_arch_choices): Use ISA_MIPS64 rather than ISA_MIPS3 as the `isa' selection in the `bfd_mach_mips16' entry. (print_insn_mips16): Check opcode entries for validity against the ISA level and ASE set selected. binutils/ * testsuite/binutils-all/mips/mips16-undecoded.s: Use `.module' rather than `.set' to set the ISA level. gas/ * testsuite/gas/mips/mips16-sub.d: New test. * testsuite/gas/mips/mips16-32@mips16-sub.d: New test. * testsuite/gas/mips/mips16e-32@mips16-sub.d: New test. * testsuite/gas/mips/mips16e-sub.d: New test. * testsuite/gas/mips/mips16-32@mips16e-sub.d: New test. * testsuite/gas/mips/mips16-64@mips16e-sub.d: New test. * testsuite/gas/mips/mips16e-64-sub.d: New test. * testsuite/gas/mips/mips16-32@mips16e-64-sub.d: New test. * testsuite/gas/mips/mips16-64@mips16e-64-sub.d: New test. * testsuite/gas/mips/mips16e-32@mips16e-64-sub.d: New test. * testsuite/gas/mips/mips16-sub.s: New test source. * testsuite/gas/mips/mips16e-sub.s: New test source. * testsuite/gas/mips/mips16e-64-sub.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests.
2016-12-20MIPS16: Switch to 32-bit opcode table interpretationMaciej W. Rozycki2-6/+17
Switch to 32-bit MIPS16 opcode table entry interpretation, similar to how the microMIPS opcode table is handled, for both the `match' and `mask' fields, removing special casing for JAL and JALX instructions and their `a' and `i' operand codes throughout, while retaining automatic processing of extendable opcodes in assembly and disassembly. In assembly disallow size enforcement suffixes as appropriate: `.t' for both 32-bit instructions and macros and `.e' for macros only, making macro handling consistent with the microMIPS instruction set. In disassembly fully decode EXTEND prefixes prepended to unsupported instruction encodings (according to the ISA selection) rather than dumping them as hexadecimal data along with the following instruction, removing all special casing for the EXTEND prefix and making its handling rely on its opcode table entry, except where it is considered a part of an extendable instruction. include/ * opcode/mips.h (mips_opcode_32bit_p): New inline function. gas/ * config/tc-mips.c (micromips_insn_length): Use `mips_opcode_32bit_p'. (is_size_valid): Adjust description. (is_size_valid_16): New function. (validate_mips_insn): Use `mips_opcode_32bit_p' in MIPS16 operand decoding. (validate_mips16_insn): Remove `a' and `i' operand code special casing, use `mips_opcode_32bit_p' to determine instruction width. (append_insn): Adjust forced MIPS16 instruction size determination. (match_mips16_insn): Likewise. Don't shift the instruction's opcode with the `a' and `i' operand codes. Use `mips_opcode_32bit_p' in operand decoding. (match_mips16_insns): Check for forced instruction size's validity. (mips16_ip): Don't force instruction size in the `noautoextend' mode. * testsuite/gas/mips/mips16-jal-e.d: New test. * testsuite/gas/mips/mips16-jal-t.d: New test. * testsuite/gas/mips/mips16-macro-e.d: New test. * testsuite/gas/mips/mips16-macro-t.d: New test. * testsuite/gas/mips/mips16-jal-t.l: New stderr output. * testsuite/gas/mips/mips16-macro-e.l: New stderr output. * testsuite/gas/mips/mips16-macro-t.l: New stderr output. * testsuite/gas/mips/mips16-jal-e.s: New test source. * testsuite/gas/mips/mips16-jal-t.s: New test source. * testsuite/gas/mips/mips16-macro-e.s: New test source. * testsuite/gas/mips/mips16-macro-t.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests. opcodes/ * mips-dis.c (print_mips16_insn_arg): Always handle `extend' and `insn' together, with `extend' as the high-order 16 bits. (match_kind): New enum. (print_insn_mips16): Rework for 32-bit instruction matching. Do not dump EXTEND prefixes here. * mips16-opc.c (mips16_opcodes): Move "extend" entry to the end. Recode `match' and `mask' fields as 32-bit in absolute "jal" and "jalx" entries. binutils/ * testsuite/binutils-all/mips/mips16-extend-noinsn.d: Adjust test for separate EXTEND prefix disassembly.
2016-12-20Re-work RISC-V gas flags: now we just support -mabi and -marchAndrew Waterman2-2/+25
We've decided to standardize on two flags for RISC-V: "-march" sets the target architecture (which determines which instructions can be generated), and "-mabi" sets the target ABI. We needed to rework this because the old flag set didn't support soft-float or single-float ABIs, and didn't support an x32-style ABI on RISC-V. Additionally, we've changed the behavior of the -march flag: it's now a lot stricter and only parses things we can actually understand. Additionally, it's now lowercase-only: the rationale is that while the RISC-V ISA manual specifies that ISA strings are case-insensitive, in Linux-land things are usually case-sensitive. Since this flag can be used to determine library paths, we didn't want to bake some case-insensitivity in there that would case trouble later. This patch implements these two new flags and removes the old flags that could conflict with these. There wasn't a RISC-V release before, so we want to just support a clean flag set. include/ * elf/riscv.h (EF_RISCV_SOFT_FLOAT): Don't define. (EF_RISCV_FLOAT_ABI, EF_RISCV_FLOAT_ABI_SOFT): Define. (EF_RISCV_FLOAT_ABI_SINGLE, EF_RISCV_FLOAT_ABI_DOUBLE): Define. (EF_RISCV_FLOAT_ABI_QUAD): Define. bfd/ * elfnn-riscv.c (_bfd_riscv_elf_merge_private_bfd_data): Use EF_RISCV_FLOAT_ABI_SOFT instead of EF_RISCV_SOFT_FLOAT. binutils/ * readelf.c (get_machine_flags): Use EF_RISCV_FLOAT_ABI_{SOFT,SINGLE,DOBULE,QUAD) instead of EF_RISCV_{SOFT,HARD}_FLOAT. gas/ * config/tc-riscv.h (xlen): Delete. * config/tc-riscv.c (xlen): Make static. (abi_xlen): New variable. (options): Replace OPTION_{M32,M64,MSOFT_FLOAT,MHARD_FLOAT,MRVC} with OPTION_MABI. (md_longopts): Likewise. (md_parse_option): Likewise. (riscv_elf_final_processing): Likewise. * doc/as.texinfo (Target RISC-V options): Likewise. * doc/c-riscv.texi (OPTIONS): Likewise. * config/tc-riscv.c (float_mode): Removed. (float_abi): New type, specifies the floating-point ABI. (riscv_set_abi): New function. (riscv_add_subset): Only allow lower-case ISA names and require them to start with "rv". (riscv_after_parse_args): Likewise. opcodes/ * riscv-dis.c (riscv_disassemble_insn): Default to the ELF's XLEN when none is provided.
2016-12-14MIPS/opcodes: Also set disassembler's ASE flags from ELF structuresMaciej W. Rozycki7-0/+112
Respect any ASE flags recorded in ELF file structures for the purpose of selecting instructions to be disassembled, preventing code from being hex-dumped even though having been clearly indicated as valid at the assembly time. Use date from the MIPS ABI flags structure if present, and otherwise there may be an MDMX ASE flag set in the ELF file header. For backwards compatibility only set extra flags and do not clear any, preserving all previously set by the architecture selected to be disassembled for. include/ * elf/mips.h (Elf_Internal_ABIFlags_v0): Also declare struct typedef as `elf_internal_abiflags_v0'. bfd/ * bfd-in.h (elf_internal_abiflags_v0): New struct declaration. (bfd_mips_elf_get_abiflags): New prototype. * elfxx-mips.c (bfd_mips_elf_get_abiflags): New function. * bfd-in2.h: Regenerate. opcodes/ * mips-dis.c (mips_convert_abiflags_ases): New function. (set_default_mips_dis_options): Also infer ASE flags from ELF file structures. binutils/ * testsuite/binutils-all/mips/mips-ase-1.d: New test. * testsuite/binutils-all/mips/mips-ase-2.d: New test. * testsuite/binutils-all/mips/mips-ase-3.d: New test. * testsuite/binutils-all/mips/mips-ase-1.s: New test source. * testsuite/binutils-all/mips/mips-ase-2.s: New test source. * testsuite/binutils-all/mips/mips.exp: Run the new tests.
2016-12-13[AArch64] Recognize R_AARCH64_P32_ABS32 as 32-bit relocation in readelfJiong Wang2-1/+6
binutils/ * readelf.c (is_32bit_abs_reloc): Recognize R_AARCH64_P32_ABS32.
2016-12-13Add a 'Past Maintainers' section to the MAINTAINERS file. Retire Mark ↵Nick Clifton2-2/+13
Mitchell's name to this section. * MAINTAINERS (Past Maintainers): New section. Move Mark Mitchell's name here.
2016-12-09MIPS16/opcodes: Reformat raw EXTEND and undecoded outputMaciej W. Rozycki4-0/+66
Use a tab rather than a space to separate `extend' and its uninterpreted argument output, like with regular instructions. Separate hexadecimal halves of undecoded extended instructions output with a space instead of presenting them concatenated. opcodes/ * mips-dis.c (print_insn_mips16): Use a tab rather than a space to separate `extend' and its uninterpreted argument output. Separate hexadecimal halves of undecoded extended instructions output. binutils/ * testsuite/binutils-all/mips/mips16-extend-noinsn.d: New test. * testsuite/binutils-all/mips/mips16-extend-noinsn.s: New test source. * testsuite/binutils-all/mips/mips.exp: Run the new test.
2016-12-08MIPS16/opcodes: Fix PC-relative operation delay-slot adjustmentMaciej W. Rozycki4-0/+426
Complement commit dd8b7c222e0e ("MIPS: mips16e jalrc/jrc opcodes"), <https://sourceware.org/ml/binutils/2005-07/msg00349.html>, and stop the disassembler making a delay-slot adjustment for PC-relative operations following either MIPS16e compact jumps, or undefined RR/J(AL)R(C) encodings that have the `l' (link) and `ra' (source register is `ra') bits set both at a time. Adjust code description for accuracy. Add a suitable test case. opcodes/ * mips-dis.c (print_mips16_insn_arg): Avoid delay-slot adjustment for PC-relative operations following MIPS16e compact jumps or undefined RR/J(AL)R(C) encodings. binutils/ * testsuite/binutils-all/mips/mips16-pcrel.d: New test. * testsuite/binutils-all/mips/mips16-pcrel.s: New test source. * testsuite/binutils-all/mips/mips.exp: Run the new test.
2016-12-08Always use a hex prefix when displaying the alignment of program headers.Etienne Buira2-1/+6
* readelf.c (process_program_headers): Always use hex prefix when displaying the segment alignment.
2016-12-06Fix seg-fault running strip on a corrupt binary.Nick Clifton2-1/+9
PR binutils/20930 * objcopy.c (mark_symbols_used_in_relocations): Check for a null symbol pointer pointer before attempting to mark the symbol as kept.
2016-12-05binutils: add myself to MAINTAINERSJose E. Marchesi2-0/+5
2016-12-05 Jose E. Marchesi <jose.marchesi@oracle.com> * MAINTAINERS: Add myself as maintainer for the SPARC targets.
2016-12-05Fix seg-fault running strip on a corrupt binary.Nick Clifton2-1/+9
PR ld/20923 * objcopy.c (mark_symbols_used_in_relocations): Check for a null symbol pointer before attempting to mark the symbol as kept.
2016-12-01Fix calculation of synthetic symbol sizes (ppc64)Luis Machado2-2/+10
The attached patch fixes a problem where nm displays bogus information for synthetic symbol sizes when --size-sort is used. This happens because the synthetic symbols (dot symbols for ppc64) are generated based on their non-dot symbols. The generation process doesn't copy over the ELF-specific bits of the regular non-dot symbols. When --size-sort is used, the code attempts to access the symbol size from the ELF-specific bits and ends up reading gargabe, causing the size to be displayed incorrectly. With the patch, i can see dot and non-dot symbols having the same size with --size-sort. This doesn't fix the fact that we don't display size information for synthetic symbols without --size-sort, which i may address in the future. binutils/ChangeLog: 2016-12-01 Luis Machado <lgustavo@codesourcery.com> * nm.c (sort_symbols_by_size): Don't read symbol size if symbol is synthetic.
2016-11-30Stop readelf from complaining about out of order PT_LOAD segments.Nick Clifton2-0/+10
PR ld/20815 * readelf.c (process_program_headers): Do not warn about out of order PT_LOAD segments.
2016-11-29[ARC] Fix disassembler option.Claudiu Zissulescu2-1/+6
This patch fixes: - fpus and fpud are swaped. - quarkse_em doesn't include FPX extensions. - auto guessed opcode mechanism may ignore the option passed via -M<feature> option. opcodes/ 2016-11-29 Claudiu Zissulescu <claziss@synopsys.com> * arc-dis.c (is_compatible_p): Remove function. (skip_this_opcode): Don't add any decoding class to decode list. Remove warning. (find_format_from_table): Go through all opcodes, and warn if we use a guessed mnemonic. binutils/ 2016-11-29 Claudiu Zissulescu <claziss@synopsys.com> * testsuite/binutils-all/arc/objdump.exp (Warning test): Update test.
2016-11-27Fix spelling in comments in .y files (binutils)Ambrogino Modigliani1-1/+1
* arparse.y: Fix spelling in comments.
2016-11-27Fix spelling in comments in C source files (binutils)Ambrogino Modigliani8-8/+18
* dwarf.c: Fix spelling in comments. * dwarf.h: Fix spelling in comments. * objcopy.c: Fix spelling in comments. * od-macho.c: Fix spelling in comments. * rclex.c: Fix spelling in comments. * readelf.c: Fix spelling in comments. * stabs.c: Fix spelling in comments.
2016-11-23Fix the linker so that it will not silently generate ELF binaries with ↵Nick Clifton2-6/+41
invalid program headers. Fix readelf to report such invalid binaries. PR ld/20815 bfd * elf.c (elf_modify_segment_map): Allow empty LOAD segments if they contain the program headers. (_bfd_elf_map_sections_to_segments): If the linker created the PHDR segment then always attempt to include it in a LOAD segment. (assign_file_positions_for_non_load_sections): Allow LOAD segments to overlap PHDR segments. (phdr_sorter): New function. Sorts program headers. (assign_file_positions_except_relocs): Sort the program headers before writing them out. Issue an error if the PHDR segment is not covered by a LOAD segment, unless the backend allows it. * elf-bfd.h (struct elf_backend_data): Add elf_backend_allow_non_load_phdr. * elfxx-target.h (elf_backend_allow_non_load_phdr): Provide default definition that returns FALSE. (elfNN_bed): Initialise the elf_backend_allow_non_load_phdr field. * elf64-hppa.c (elf64_hppa_allow_non_load_phdr): New function. Returns TRUE. (elf_backend_allow_non_load_phdr): Define. * elf-m10300.c (_bfd_mn10300_elf_size_dynamic_sections): Do not place the interpreter string into the .interp section if the nointerp flag is set in the link info structure. * elf32-arc.c (elf_arc_size_dynamic_sections): Likewise. * elf32-score7.c (score_elf_final_link_relocate): Allow for the _gp symbol not being part of the output. binutils* readelf.c (process_program_headers): Check PT_LOAD and PT_PHDR segments for validity. ld * ld.texinfo: Note that PT_TLS can be used as a segment type. * testsuite/ld-discard/discard.ld: Add space for program headers. * testsuite/ld-elf/flags1.ld: Likewise. * testsuite/ld-elf/maxpage3.t: Likewise. * testsuite/ld-elf/noload-1.t: Likewise. * testsuite/ld-elf/orphan.ld: Likewise. * testsuite/ld-elf/overlay.t: Likewise. * testsuite/ld-elf/pr14052.t: Likewise. * testsuite/ld-elf/pr19539.t: Likewise. * testsuite/ld-elf/provide-hidden-1.ld: Likewise. * testsuite/ld-elf/provide-hidden-s.ld: Likewise. * testsuite/ld-elf/weak-dyn-1.ld: Likewise. * testsuite/ld-i386/pr19539.t: Likewise. * testsuite/ld-scripts/defined.t: Likewise. * testsuite/ld-scripts/defined6.t: Likewise. * testsuite/ld-scripts/dynamic-sections.t: Likewise. * testsuite/ld-scripts/empty-aligned.t: Likewise. * testsuite/ld-scripts/provide-2.t: Likewise. * testsuite/ld-scripts/provide-4.t: Likewise. * testsuite/ld-vax-elf/plt-local.ld: Likewise. * testsuite/ld-x86-64/pr19539.t: Likewise. * testsuite/ld-elf/ehdr_start-missing.d: Do not initialise the dynamic linker. * testsuite/ld-elf/ehdr_start-weak.d: Likewise. * testsuite/ld-elf/elf.exp (pr14170, pr17068): Likewise. * testsuite/ld-elf/loadaddr1.d: Update expected readelf output. * testsuite/ld-elf/noload-2.d: Likewise. * testsuite/ld-powerpc/vxworks2.sd: Likewise. * testsuite/ld-scripts/phdrs3a.d: Likewise. * testsuite/ld-scripts/size-2.d: Likewise. * testsuite/ld-elf/group.ld: Add program headers. * testsuite/ld-elf/overlay.d: Skip for SPU. * testsuite/ld-elf/flags1.d: Skip for RX. * testsuite/ld-elf/pr19162.d: Skip for HPPA64. * testsuite/ld-elf/pr19539.d: Skip for ALPHA. * testsuite/ld-scripts/empty-orphan.t: Update program headers. * testsuite/ld-scripts/size-2.t: Likewise.
2016-11-22Fix spelling mistakes in comments in configure scriptsAmbrogino Modigliani2-1/+5
All changes are limited to comments, and no run-time behavior is affected. bfd/ChangeLog: 2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com> * warning.m4: Fix spelling in comments. * configure.ac: Fix spelling in comments. * configure: Regenerate. binutils/ChangeLog: 2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com> * configure: Regenerate. gdb/ChangeLog: 2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com> * configure.ac: Fix spelling in comments. * configure: Regenerate. gas/ChangeLog: 2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com> * configure: Regenerate. gold/ChangeLog: 2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com> * configure: Regenerate. gprof/ChangeLog: 2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com> * configure: Regenerate. ld/ChangeLog: 2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com> * configure: Regenerate. opcodes/ChangeLog: 2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com> * configure: Regenerate.
2016-11-22PR20744, Incorrect PowerPC VLE relocsAlan Modra2-1/+19
VLE 16A and 16D relocs were functionally swapped. PR 20744 include/ * opcode/ppc.h: Define VLE insns using 16A and 16D relocs. bfd/ * elf32-ppc.h (struct ppc_elf_params): Add vle_reloc_fixup field. * elf32-ppc.c: Include opcode/ppc.h. (ppc_elf_howto_raw): Correct dst_mask for R_PPC_VLE_LO16A, R_PPC_VLE_LO16D, R_PPC_VLE_HI16A, R_PPC_VLE_HI16D, R_PPC_VLE_HA16A, R_PPC_VLE_HA16D, R_PPC_VLE_SDAREL_LO16A, R_PPC_VLE_SDAREL_LO16D, R_PPC_VLE_SDAREL_HI16A, R_PPC_VLE_SDAREL_HI16D, R_PPC_VLE_SDAREL_HA16A, and R_PPC_VLE_SDAREL_HA16D relocs. (ppc_elf_link_hash_table_create): Update default_params init. (ppc_elf_vle_split16): Correct shift and mask. Add params. Report or fix insn/reloc mismatches. (ppc_elf_relocate_section): Pass input_section, offset and fixup to ppc_elf_vle_split16. binutils/ * NEWS: Mention PowerPC VLE relocation error. gas/ * config/tc-ppc.c: Delete VLE insn defines. (md_assemble): Swap use_a_reloc and use_d_reloc. * testsuite/gas/ppc/vle-reloc.d: Update. ld/ * emultempl/ppc32elf.em (params): Update initializer. Handle --vle-reloc-fixup command line arg.
2016-11-18cxxfilt: Recognize rust_demangling.Mark Wielaard2-0/+5
2016-11-14Generate correct hint value for IDATA6.Rudy2-16/+14
PR binutils/20814 * dlltool.c (struct export): Remove hint field. (make_one_lib_file): Store the ordinal value for IDATA6 not the hint. (gen_lib_file): Delete reference to hint field. (mangle_defs): Delete computation of hint field.
2016-11-11Extend information displayed about objdump's output of dynamic symbols.Nick Clifton1-0/+3
2016-11-11Add the ability for nm to display symbol version information.Nick Clifton6-2/+99
PR binutils/20751 * nm.c (with_symbol_versions): New local variable. (long_options): Add --with-symbol-versions. (usage): Mention --with-symbol-versions. (print_symbol): If with_symbol_versions is set then display the version information associated with the symbol. * NEWS: Mention the new feature. * doc/binutils.texi (nm): Document the new option. (objdump): Describe how symbol version information is displayed for dynamic symbol dumps. (readelf): Describe how symbol version information is displayed. * testsuite/binutils-all/nm.exp: Add a test of the new feature.
2016-11-08Fix heap-buffer-overflow error detected by address sanitization on a fuzzed ↵Nick Clifton2-4/+10
binary. PR binutils/20794 * readelf.c (process_section_headers): Fix off-by-one error when checking for invalid sh_link and sh_info fields.
2016-11-04objcopy: Close some memory leaks in error pathsAndrew Burgess2-0/+8
Closes some memory leaks within objcopy for error paths. binutils/ChangeLog: * objcopy.c (copy_section): Add extra calls to free for error paths.
2016-11-04set default-directory in dwarf-browseTom Tromey2-1/+7
I've been using dwarf-mode.el again recently and I found it mildly annoying that the mode doesn't set default-directory. Setting it means that operations in the dwarf-browsing buffer default to the directory holding the object file being investigated. This bumps the version number as well so that updating it via the package manager works properly. 2016-11-04 Tom Tromey <tom@tromey.com> * dwarf-mode.el (dwarf-browse): Set default-directory. Bump version number.
2016-11-04Add maintainers for RISC-V target.Palmer Dabbelt2-0/+7
* MAINTAINERS: Add myself and Andrew Waterman as maintainers for the RISC-V target.
2016-11-01Add support for RISC-V architecture.Nick Clifton3-3/+35
bfd * Makefile.am: Add entries for riscv32-elf and riscv64-elf. * config.bdf: Likewise. * configure.ac: Likewise. * Makefile.in: Regenerate. * configure: Regenerate. * archures.c: Add bfd_riscv_arch. * reloc.c: Add riscv relocs. * targets.c: Add riscv_elf32_vec and riscv_elf64_vec. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elf-bfd.h: Add RISCV_ELF_DATA to enum elf_target_id. * elfnn-riscv.c: New file. * elfxx-riscv.c: New file. * elfxx-riscv.h: New file. binutils* readelf.c (guess_is_rela): Add EM_RISCV. (get_machine_name): Likewise. (dump_relocations): Add support for riscv relocations. (get_machine_flags): Add support for riscv flags. (is_32bit_abs_reloc): Add R_RISCV_32. (is_64bit_abs_reloc): Add R_RISCV_64. (is_none_reloc): Add R_RISCV_NONE. * testsuite/binutils-all/objdump.exp (cpus_expected): Add riscv. Expect the debug_ranges test to fail. gas * Makefile.am: Add riscv files. * Makefile.in: Regenerate. * NEWS: Mention the support for this architecture. * configure.in: Define a default architecture. * configure: Regenerate. * configure.tgt: Add entries for riscv. * doc/as.texinfo: Likewise. * testsuite/gas/all/gas.exp: Expect the redef tests to fail. * testsuite/gas/elf/elf.exp: Expect the groupauto tests to fail. * config/tc-riscv.c: New file. * config/tc-riscv.h: New file. * doc/c-riscv.texi: New file. * testsuite/gas/riscv: New directory. * testsuite/gas/riscv/riscv.exp: New file. * testsuite/gas/riscv/t_insns.d: New file. * testsuite/gas/riscv/t_insns.s: New file. ld * Makefile.am: Add riscv files. * Makefile.in: Regenerate. * NEWS: Mention the support for this target. * configure.tgt: Add riscv entries. * emulparams/elf32lriscv-defs.sh: New file. * emulparams/elf32lriscv.sh: New file. * emulparams/elf64lriscv-defs.sh: New file. * emulparams/elf64lriscv.sh: New file. * emultempl/riscvelf.em: New file. opcodes * configure.ac: Add entry for bfd_riscv_arch. * configure: Regenerate. * disassemble.c (disassembler): Add support for riscv. (disassembler_usage): Likewise. * riscv-dis.c: New file. * riscv-opc.c: New file. include * dis-asm.h: Add prototypes for print_insn_riscv and print_riscv_disassembler_options. * elf/riscv.h: New file. * opcode/riscv-opc.h: New file. * opcode/riscv.h: New file.
2016-10-19Remove spurious whitespace introduced by previous delta.Nick Clifton1-9/+9
2016-10-17Display unknown notes. Decode NT_GNU_HWCAP notes.Nick Clifton3-38/+124
* readelf.c (apply_relocations): Fail if the symbol table section linked to by the reloc section does not have either the SHT_SYMTAB or SHT_DYNSYM type. (print_gnu_note): Decode the contents of NT_GNU_HWCAP notes. Print the contents of unknown note types. (process_note): Add the file and section to the parameter list. Use print_symbol to display the note name. Display the contents of unknown note types. (process_corefile_note_segment): Rename to process_notes_at. Add section parameter. Apply relocations to the notes when loading from a section. Display section name when processing notes in a section. * testsuite/binutils-all/readelf.n: Update expected output.
2016-10-17Update list of ELF machine numbers.Nick Clifton2-9/+60
include * elf/common.h (DT_SYMTAB_SHNDX): Define. (EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_OPEN8): Define. (EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE): Define. (EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8): Define. (EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC): Define. (EM_CSR_KALIMBA, EM_Z80, EM_AMDGPU, EM_RISCV): Define. (ELFOSABI_OPENVOS): Define. (GRP_MASKOS, GRP_MASKPROC): Define. binutils * readelf.c (get_dynamic_type): Add DT_SYMTAB_SHNDX. (get_machine_type): Add EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_OPEN8, EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE, EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8, EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC, EM_CSR_KALIMBA, EM_Z80, EM_AMDGPU, EM_RISCV. (get_osabi_name): Add ELFOSABI_CLOUDABI and ELFOSABI_OPENVS. (get_group_flags): Update to handle flags in the GRP_MASKOS and GRP_MASKPROC ranges.
2016-10-14Fix leftover remote test failures from PR binutils/19020Luis Machado2-1/+7
As pointed out in PR binutils/19020, those tests were still failing when doing remote testing. This is because the binary files weren't being copied over to the remote host for testing. FAIL: binutils-all/pr19020a FAIL: binutils-all/pr19020b This small patch fixes this up to make things pass. binutils/ChangeLog: 2016-10-14 Luis Machado <lgustavo@codesourcery.com> * testsuite/lib/utils-lib.exp (run_dump_test): Call remote_download to copy file to remote host.
2016-10-11Enhance objdump so that it will use .got, .plt and .plt.got section symbols ↵Nick Clifton2-9/+87
when disassembling, and it will use dynamic relocs to interpret entries in the PLT and GOT. binutils * objdump.c (is_significant_symbol_name): New function. (remove_useless_symbols): Do not remove significanr symbols. (find_symbol_for_address): If an exact match for the specified address has not been found, try scanning the dynamic relocs to see if one of these matches the address. If so, use the symbol associated with the reloc. (objdump_print_addr_with_symbol): Do not print offsets to symbols with no value. (disassemble_section): Only use dynamic relocs if the user requested this. (disassemble_data): Always load dynamic relocs if they are available. ld * ld-aarch64/emit-relocs-515-be.d: Adjust output to match change in objdump. * ld-aarch64/emit-relocs-515.d: Likewise. * ld-aarch64/emit-relocs-516-be.d: Likewise. * ld-aarch64/emit-relocs-516.d: Likewise. * ld-aarch64/farcall-b-plt.d: Likewise. * ld-aarch64/farcall-bl-plt.d: Likewise. * ld-aarch64/gc-plt-relocs.d: Likewise. * ld-aarch64/tls-desc-ie.d: Likewise. * ld-aarch64/tls-tiny-desc.d: Likewise. * ld-aarch64/tls-tiny-gd.d: Likewise. * ld-aarch64/tls-tiny-ie.d: Likewise. * ld-arm/arm-app-abs32.d: Likewise. * ld-arm/arm-app.d: Likewise. * ld-arm/arm-lib-plt32.d: Likewise. * ld-arm/arm-lib.d: Likewise. * ld-arm/armthumb-lib.d: Likewise. * ld-arm/cortex-a8-fix-b-plt.d: Likewise. * ld-arm/cortex-a8-fix-bcc-plt.d: Likewise. * ld-arm/cortex-a8-fix-bl-plt.d: Likewise. * ld-arm/cortex-a8-fix-bl-rel-plt.d: Likewise. * ld-arm/cortex-a8-fix-blx-plt.d: Likewise. * ld-arm/farcall-mixed-app-v5.d: Likewise. * ld-arm/farcall-mixed-app.d: Likewise. * ld-arm/farcall-mixed-app2.d: Likewise. * ld-arm/farcall-mixed-lib-v4t.d: Likewise. * ld-arm/farcall-mixed-lib.d: Likewise. * ld-arm/ifunc-10.dd: Likewise. * ld-arm/ifunc-14.dd: Likewise. * ld-arm/ifunc-15.dd: Likewise. * ld-arm/ifunc-3.dd: Likewise. * ld-arm/ifunc-4.dd: Likewise. * ld-arm/ifunc-9.dd: Likewise. * ld-arm/long-plt-format.d: Likewise. * ld-arm/mixed-app-v5.d: Likewise. * ld-arm/mixed-app.d: Likewise. * ld-arm/mixed-lib.d: Likewise. * ld-arm/tls-lib-loc.d: Likewise. * ld-cris/dso-pltdis1.d: Likewise. * ld-cris/dso-pltdis2.d: Likewise. * ld-cris/dso12-pltdis.d: Likewise. * ld-elf/symbolic-func.r: Likewise. * ld-frv/fdpic-pie-1.d: Likewise. * ld-frv/fdpic-pie-2.d: Likewise. * ld-frv/fdpic-pie-6.d: Likewise. * ld-frv/fdpic-pie-7.d: Likewise. * ld-frv/fdpic-pie-8.d: Likewise. * ld-frv/fdpic-shared-1.d: Likewise. * ld-frv/fdpic-shared-2.d: Likewise. * ld-frv/fdpic-shared-3.d: Likewise. * ld-frv/fdpic-shared-4.d: Likewise. * ld-frv/fdpic-shared-5.d: Likewise. * ld-frv/fdpic-shared-6.d: Likewise. * ld-frv/fdpic-shared-7.d: Likewise. * ld-frv/fdpic-shared-8.d: Likewise. * ld-frv/fdpic-shared-local-2.d: Likewise. * ld-frv/fdpic-shared-local-8.d: Likewise. * ld-frv/fdpic-static-1.d: Likewise. * ld-frv/fdpic-static-2.d: Likewise. * ld-frv/fdpic-static-6.d: Likewise. * ld-frv/fdpic-static-7.d: Likewise. * ld-frv/fdpic-static-8.d: Likewise. * ld-frv/tls-dynamic-2.d: Likewise. * ld-frv/tls-initial-shared-2.d: Likewise. * ld-frv/tls-relax-shared-2.d: Likewise. * ld-frv/tls-shared-2.d: Likewise. * ld-i386/plt-nacl.pd: Likewise. * ld-i386/plt-pic-nacl.pd: Likewise. * ld-i386/plt-pic.pd: Likewise. * ld-i386/plt.pd: Likewise. * ld-i386/pr19636-1d-nacl.d: Likewise. * ld-i386/pr19636-1d.d: Likewise. * ld-i386/pr19636-2c-nacl.d: Likewise. * ld-i386/pr19636-2c.d: Likewise. * ld-ifunc/ifunc-21-x86-64.d: Likewise. * ld-ifunc/ifunc-22-x86-64.d: Likewise. * ld-ifunc/pr17154-i386.d: Likewise. * ld-ifunc/pr17154-x86-64.d: Likewise. * ld-m68k/plt1-68020.d: Likewise. * ld-m68k/plt1-cpu32.d: Likewise. * ld-m68k/plt1-isab.d: Likewise. * ld-m68k/plt1-isac.d: Likewise. * ld-metag/shared.d: Likewise. * ld-metag/stub_pic_app.d: Likewise. * ld-metag/stub_pic_shared.d: Likewise. * ld-metag/stub_shared.d: Likewise. * ld-s390/tlsbin_64.dd: Likewise. * ld-s390/tlspic_64.dd: Likewise. * ld-tic6x/shlib-1.dd: Likewise. * ld-tic6x/shlib-1b.dd: Likewise. * ld-tic6x/shlib-1rb.dd: Likewise. * ld-tic6x/shlib-app-1.dd: Likewise. * ld-tic6x/shlib-app-1b.dd: Likewise. * ld-tic6x/shlib-app-1r.dd: Likewise. * ld-tic6x/shlib-app-1rb.dd: Likewise. * ld-tic6x/shlib-noindex.dd: Likewise. * ld-vax-elf/export-class-data.dd: Likewise. * ld-vax-elf/plt-local-lib.dd: Likewise. * ld-vax-elf/plt-local.dd: Likewise. * ld-x86-64/bnd-ifunc-2.d: Likewise. * ld-x86-64/bnd-plt-1.d: Likewise. * ld-x86-64/gotpcrel1.dd: Likewise. * ld-x86-64/libno-plt-1b.dd: Likewise. * ld-x86-64/load1c-nacl.d: Likewise. * ld-x86-64/load1c.d: Likewise. * ld-x86-64/load1d-nacl.d: Likewise. * ld-x86-64/load1d.d: Likewise. * ld-x86-64/mov1a.d: Likewise. * ld-x86-64/mov1b.d: Likewise. * ld-x86-64/mov1c.d: Likewise. * ld-x86-64/mov1d.d: Likewise. * ld-x86-64/mov2a.d: Likewise. * ld-x86-64/mov2b.d: Likewise. * ld-x86-64/mov2c.d: Likewise. * ld-x86-64/mov2d.d: Likewise. * ld-x86-64/mpx3.dd: Likewise. * ld-x86-64/mpx4.dd: Likewise. * ld-x86-64/no-plt-1a.dd: Likewise. * ld-x86-64/no-plt-1b.dd: Likewise. * ld-x86-64/no-plt-1c.dd: Likewise. * ld-x86-64/no-plt-1e.dd: Likewise. * ld-x86-64/no-plt-1f.dd: Likewise. * ld-x86-64/no-plt-1g.dd: Likewise. * ld-x86-64/plt-main-bnd.dd: Likewise. * ld-x86-64/plt-nacl.pd: Likewise. * ld-x86-64/plt.pd: Likewise. * ld-x86-64/pr18591.d: Likewise. * ld-x86-64/pr19609-1c.d: Likewise. * ld-x86-64/pr19609-1e.d: Likewise. * ld-x86-64/pr19609-1j.d: Likewise. * ld-x86-64/pr19609-1l.d: Likewise. * ld-x86-64/pr19609-1m.d: Likewise. * ld-x86-64/pr19609-5b.d: Likewise. * ld-x86-64/pr19609-5c.d: Likewise. * ld-x86-64/pr19609-5e.d: Likewise. * ld-x86-64/pr19609-6b.d: Likewise. * ld-x86-64/pr19609-7b.d: Likewise. * ld-x86-64/pr19609-7d.d: Likewise. * ld-x86-64/pr19636-2d.d: Likewise. * ld-x86-64/pr20093-1.d: Likewise. * ld-x86-64/pr20093-2.d: Likewise. * ld-x86-64/pr20253-1b.d: Likewise. * ld-x86-64/pr20253-1d.d: Likewise. * ld-x86-64/pr20253-1f.d: Likewise. * ld-x86-64/pr20253-1h.d: Likewise. * ld-x86-64/pr20253-1j.d: Likewise. * ld-x86-64/pr20253-1l.d: Likewise. * ld-x86-64/protected3.d: Likewise. * ld-x86-64/tlsbin.dd: Likewise. * ld-x86-64/tlsbin2.dd: Likewise. * ld-x86-64/tlsbindesc.dd: Likewise. * ld-x86-64/tlsdesc-nacl.pd: Likewise. * ld-x86-64/tlsdesc.dd: Likewise. * ld-x86-64/tlsdesc.pd: Likewise. * ld-x86-64/tlsgd10.dd: Likewise. * ld-x86-64/tlsgd5.dd: Likewise. * ld-x86-64/tlsgd6.dd: Likewise. * ld-x86-64/tlsgd8.dd: Likewise. * ld-x86-64/tlsgdesc.dd: Likewise. * ld-x86-64/tlspic.dd: Likewise. * ld-x86-64/tlspic2.dd: Likewise. 2016-10-11 Nick Clifton <nickc@redhat.com> PR ld/20535 * emultempl/elf32.em (_search_needed): Add support for pseudo environment variables supported by ld.so. Namely $ORIGIN, $LIB and $PLATFORM. * configure.ac: Add getauxval to list AC_CHECK_FUNCS list. * config.in: Regenerate. * configure: Regenerate. 2016-10-11 Alan Modra <amodra@gmail.com> * ldlang.c (lang_do_assignments_1): Descend into output section statements that do not yet have bfd sections. Set symbol section temporarily for symbols defined in such statements to the undefined section. Don't error on data or reloc statements until final phase. * ldexp.c (exp_fold_tree_1 <etree_assign>): Handle bfd_und_section in expld.section. * testsuite/ld-mmix/bpo-10.d: Adjust. * testsuite/ld-mmix/bpo-11.d: Adjust. 2016-10-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * emulparams/elf64_s390.sh: Move binary start to 16M. * testsuite/ld-s390/tlsbin_64.dd: Adjust testcases accordingly. * testsuite/ld-s390/tlsbin_64.rd: Likewise. 2016-10-07 Alan Modra <amodra@gmail.com> * ldexp.c (MAX): Define. (exp_unop, exp_binop, exp_trinop): Alloc at least enough for etree_type.value. 2016-10-07 Alan Modra <amodra@gmail.com> * testsuite/lib/ld-lib.exp (is_generic_elf): New, extracted from.. * testsuite/ld-elf/elf.exp: ..here. 2016-10-06 Ludovic Court?s <ludo@gnu.org> * emulparams/elf32bmipn32-defs.sh: Shift quote of "x$EMULATION_NAME" to the left to work around <http://ftp.gnu.org/gnu/bash/bash-4.2-patches/bash42-007>. 2016-10-06 Alan Modra <amodra@gmail.com> * lexsup.c: Spell fall through comments consistently and add missing fall through comments. 2016-10-06 Alan Modra <amodra@gmail.com> * plugin.c (asymbol_from_plugin_symbol): Avoid compiler warning by adding return. 2016-10-04 Alan Modra <amodra@gmail.com> * ld.texinfo (Expression Section): Update result of arithmetic expressions. * ldexp.c (arith_result_section): New function. (fold_binary): Use it. 2016-10-04 Alan Modra <amodra@gmail.com> * ldexp.c (exp_value_fold): New function. (exp_unop, exp_binop, exp_trinop): Use it. 2016-09-30 Alan Modra <amodra@gmail.com> * scripttempl/v850.sc: Don't reference __ctbp, __ep, __gp when not relocating. * scripttempl/v850_rh850.sc: Likewise. 2016-09-30 Alan Modra <amodra@gmail.com> PR ld/20528 * testsuite/ld-elf/pr20528a.d: xfail generic elf targets. Allow multiple .text sections for hppa-linux. * testsuite/ld-elf/pr20528b.d: Likewise. 2016-09-30 Alan Modra <amodra@gmail.com> * ldmain.c (default_bfd_error_handler): New function pointer. (ld_bfd_error_handler): New function. (main): Arrange to call it on bfd errors/warnings. (ld_bfd_assert_handler): Enable tail call. 2016-09-30 Alan Modra <amodra@gmail.com> * ldlang.c (ignore_bfd_errors): Update params. 2016-09-29 H.J. Lu <hongjiu.lu@intel.com> PR ld/20528 * emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Don't merge 2 sections with different SHF_EXCLUDE. * testsuite/ld-elf/pr20528a.d: New file. * testsuite/ld-elf/pr20528a.s: Likewise. * testsuite/ld-elf/pr20528b.d: Likewise. * testsuite/ld-elf/pr20528b.s: Likewise. 2016-09-28 Christophe Lyon <christophe.lyon@linaro.org> PR ld/20608 * testsuite/ld-arm/arm-elf.exp: Handle new testcase. * testsuite/ld-arm/farcall-mixed-app2.d: New file. * testsuite/ld-arm/farcall-mixed-app2.r: Likewise. * testsuite/ld-arm/farcall-mixed-app2.s: Likewise. * testsuite/ld-arm/farcall-mixed-app2.sym: Likewise. 2016-09-26 Vlad Zakharov <vzakhar@synopsys.com> * Makefile.in: Regenerate. * configure: Likewise. 2016-09-26 Alan Modra <amodra@gmail.com> * testsuite/ld-powerpc/attr-gnu-4-4.s: Delete. * testsuite/ld-powerpc/attr-gnu-4-14.d: Delete. * testsuite/ld-powerpc/attr-gnu-4-24.d: Delete. * testsuite/ld-powerpc/attr-gnu-4-34.d: Delete. * testsuite/ld-powerpc/attr-gnu-4-41.d: Delete. * testsuite/ld-powerpc/attr-gnu-4-32.d: Adjust expected warning. * testsuite/ld-powerpc/attr-gnu-8-23.d: Likewise. * testsuite/ld-powerpc/attr-gnu-4-01.d: Adjust expected output. * testsuite/ld-powerpc/attr-gnu-4-02.d: Likewise. * testsuite/ld-powerpc/attr-gnu-4-03.d: Likewise. * testsuite/ld-powerpc/attr-gnu-4-10.d: Likewise. * testsuite/ld-powerpc/attr-gnu-4-11.d: Likewise. * testsuite/ld-powerpc/attr-gnu-4-20.d: Likewise. * testsuite/ld-powerpc/attr-gnu-4-22.d: Likewise. * testsuite/ld-powerpc/attr-gnu-4-33.d: Likewise. * testsuite/ld-powerpc/attr-gnu-8-11.d: Likewise. * testsuite/ld-powerpc/powerpc.exp: Don't run deleted tests. 2016-09-23 Akihiko Odaki <akihiko.odaki.4i@stu.hosei.ac.jp> PR ld/20595 * testsuite/ld-arm/unwind-4.d: Add -q option to linker command line and -r option to objdump command line. Match emitted relocs to make sure that superflous relocs are not generated. 2016-09-23 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * emulparams/elf64_s390.sh: Change TEXT_START_ADDR to 256MB. * testsuite/ld-s390/tlsbin_64.dd: Adjust testcase accordingly. * testsuite/ld-s390/tlsbin_64.rd: Likewise. 2016-09-22 Nick Clifton <nickc@redhat.com> * emultempl/elf32.em (_try_needed): In verbose mode, report failed attempts to find a needed library. 2016-09-21 Richard Sandiford <richard.sandiford@arm.com> * testsuite/ld-aarch64/emit-relocs-28.d: Expect spaces after "," in addresses. * testsuite/ld-aarch64/emit-relocs-301-be.d: Likewise. * testsuite/ld-aarch64/emit-relocs-301.d: Likewise. * testsuite/ld-aarch64/emit-relocs-302-be.d: Likewise. * testsuite/ld-aarch64/emit-relocs-302.d: Likewise. * testsuite/ld-aarch64/emit-relocs-310-be.d: Likewise. * testsuite/ld-aarch64/emit-relocs-310.d: Likewise. * testsuite/ld-aarch64/emit-relocs-313.d: Likewise. * testsuite/ld-aarch64/emit-relocs-515-be.d: Likewise. * testsuite/ld-aarch64/emit-relocs-515.d: Likewise. * testsuite/ld-aarch64/emit-relocs-516-be.d: Likewise. * testsuite/ld-aarch64/emit-relocs-516.d: Likewise. * testsuite/ld-aarch64/emit-relocs-531.d: Likewise. * testsuite/ld-aarch64/emit-relocs-532.d: Likewise. * testsuite/ld-aarch64/emit-relocs-533.d: Likewise. * testsuite/ld-aarch64/emit-relocs-534.d: Likewise. * testsuite/ld-aarch64/emit-relocs-535.d: Likewise. * testsuite/ld-aarch64/emit-relocs-536.d: Likewise. * testsuite/ld-aarch64/emit-relocs-537.d: Likewise. * testsuite/ld-aarch64/emit-relocs-538.d: Likewise. * testsuite/ld-aarch64/erratum835769.d: Likewise. * testsuite/ld-aarch64/erratum843419.d: Likewise. * testsuite/ld-aarch64/farcall-b-plt.d: Likewise. * testsuite/ld-aarch64/farcall-bl-plt.d: Likewise. * testsuite/ld-aarch64/gc-plt-relocs.d: Likewise. * testsuite/ld-aarch64/ifunc-21.d: Likewise. * testsuite/ld-aarch64/ifunc-7c.d: Likewise. * testsuite/ld-aarch64/tls-desc-ie.d: Likewise. * testsuite/ld-aarch64/tls-large-desc-be.d: Likewise. * testsuite/ld-aarch64/tls-large-desc.d: Likewise. * testsuite/ld-aarch64/tls-large-ie-be.d: Likewise. * testsuite/ld-aarch64/tls-large-ie.d: Likewise. * testsuite/ld-aarch64/tls-relax-all.d: Likewise. * testsuite/ld-aarch64/tls-relax-gd-ie.d: Likewise. * testsuite/ld-aarch64/tls-relax-gdesc-ie-2.d: Likewise. * testsuite/ld-aarch64/tls-relax-gdesc-ie.d: Likewise. * testsuite/ld-aarch64/tls-relax-large-desc-ie-be.d: Likewise. * testsuite/ld-aarch64/tls-relax-large-desc-ie.d: Likewise. * testsuite/ld-aarch64/tls-tiny-desc.d: Likewise. * testsuite/ld-aarch64/tls-tiny-gd.d: Likewise. gas * gas/arm/tls.d: Adjust output to match change in objdump.
2016-10-06-Wimplicit-fallthrough warning fixesAlan Modra7-10/+37
Comment changes. bfd/ * coff-h8300.c: Spell fall through comments consistently. * coffgen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-ppc.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf64-ppc.c: Likewise. * elfxx-aarch64.c: Likewise. * elfxx-mips.c: Likewise. * cpu-ns32k.c: Add missing fall through comments. * elf-m10300.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-frv.c: Likewise. * elf32-i386.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-nds32.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-sh.c: Likewise. * elf32-tic6x.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-x86-64.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * ieee.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * srec.c: Likewise. * versados.c: Likewise. opcodes/ * aarch64-opc.c: Spell fall through comments consistently. * i386-dis.c: Likewise. * aarch64-dis.c: Add missing fall through comments. * aarch64-opc.c: Likewise. * arc-dis.c: Likewise. * arm-dis.c: Likewise. * i386-dis.c: Likewise. * m68k-dis.c: Likewise. * mep-asm.c: Likewise. * ns32k-dis.c: Likewise. * sh-dis.c: Likewise. * tic4x-dis.c: Likewise. * tic6x-dis.c: Likewise. * vax-dis.c: Likewise. binutils/ * dlltool.c: Spell fall through comments consistently. * objcopy.c: Likewise. * readelf.c: Likewise. * dwarf.c: Add missing fall through comments. * elfcomm.c: Likewise. * sysinfo.y: Likewise. * readelf.c: Likewise. Also remove extraneous comments. gas/ * app.c: Add missing fall through comments. * dw2gencfi.c: Likewise. * expr.c: Likewise. * config/tc-alpha.c: Likewise. * config/tc-arc.c: Likewise. * config/tc-arm.c: Likewise. * config/tc-cr16.c: Likewise. * config/tc-crx.c: Likewise. * config/tc-dlx.c: Likewise. * config/tc-h8300.c: Likewise. * config/tc-hppa.c: Likewise. * config/tc-i370.c: Likewise. * config/tc-i386.c: Likewise. * config/tc-i960.c: Likewise. * config/tc-ia64.c: Likewise. * config/tc-m68hc11.c: Likewise. * config/tc-m68k.c: Likewise. * config/tc-mep.c: Likewise. * config/tc-metag.c: Likewise. * config/tc-microblaze.c: Likewise. * config/tc-mips.c: Likewise. * config/tc-ns32k.c: Likewise. * config/tc-rx.c: Likewise. * config/tc-score.c: Likewise. * config/tc-score7.c: Likewise. * config/tc-sh.c: Likewise. * config/tc-tic4x.c: Likewise. * config/tc-vax.c: Likewise. * config/tc-xstormy16.c: Likewise. * config/tc-z80.c: Likewise. * config/tc-z8k.c: Likewise. * config/obj-elf.c: Likewise. * config/tc-i386.c: Likewise. * depend.c: Spell fall through comments consistently. * config/tc-arm.c: Likewise. * config/tc-d10v.c: Likewise. * config/tc-i960.c: Likewise. * config/tc-ia64.c: Likewise. * config/tc-m68k.c: Likewise. * config/tc-mcore.c: Likewise. * config/tc-mep.c: Likewise. * config/tc-ns32k.c: Likewise. * config/tc-visium.c: Likewise. * config/tc-xstormy16.c: Likewise. * config/tc-z8k.c: Likewise. gprof/ * gprof.c: Add missing fall through comments. ld/ * lexsup.c: Spell fall through comments consistently and add missing fall through comments.
2016-10-06-Wimplicit-fallthrough noreturn fixesAlan Modra8-65/+21
binutils/ * cxxfilt.c (usage): Add ATTRIBUTE_NORETURN. * elfedit.c (usage): Likewise. * nm.c (usage): Likewise. * objcopy.c (copy_usage, strip_usage): Likewise. * srconv.c (show_usage): Likewise. * strings.c (usage): Likewise. * sysdump.c (show_usage): Likewise. * srconv.c: Remove unneeded forward function declarations. * strings.c: Likewise. * sysdump.c: Likewise. gas/ * as.h (as_assert): Add ATTRIBUTE_NORETURN.
2016-10-06-Wimplicit-fallthrough error fixesAlan Modra3-0/+7
Well, not all are errors, but a little more substantive than just fiddling with comments. bfd/ * coffcode.h (coff_slurp_symbol_table): Revert accidental commit made 2015-01-08. * elf32-nds32.c (nds32_elf_grok_psinfo): Add missing break. * reloc.c (bfd_default_reloc_type_lookup): Add missing breaks. opcodes/ * arc-ext.c (create_map): Add missing break. * msp430-decode.opc (encode_as): Likewise. * msp430-decode.c: Regenerate. binutils/ * coffdump.c (dump_coff_where): Add missing break. * stabs.c (stab_xcoff_builtin_type): Likewise. gas/ * config/tc-arc.c (find_opcode_match): Add missing break. * config/tc-i960.c (get_cdisp): Likewise. * config/tc-metag.c (parse_swap, md_apply_fix): Likewise. * config/tc-mt.c (md_parse_option): Likewise. * config/tc-nds32.c (nds32_apply_fix): Likewise. * config/tc-hppa.c (pa_ip): Assert rather than testing last condition of multiple if statements. * config/tc-s390.c (s390_exp_compare): Return 0 on error. * config/tc-tic4x.c (tic4x_operand_parse): Add as_bad and break out of case rather than falling into next case. Formatting. ld/ * plugin.c (asymbol_from_plugin_symbol): Avoid compiler warning by adding return.
2016-09-29Frame info dump: Fix bad register marks.Andreas Krebbel1-10/+23
On S/390 we see quite often registers marked as "bad register" in the readelf --debug-dump=frames or objdump -Wf output. 00000000 0000000000000014 00000000 CIE Version: 1 Augmentation: "zR" Code alignment factor: 1 Data alignment factor: -8 Return address column: 14 Augmentation data: 1b DW_CFA_def_cfa: r15 ofs 160 DW_CFA_nop DW_CFA_nop DW_CFA_nop ... 00000050 000000000000001c 00000054 FDE cie=00000000 pc=0000000080000e58..0000000080000e84 DW_CFA_advance_loc: 6 to 0000000080000e5e DW_CFA_offset: r14 at cfa-48 DW_CFA_offset: r15 at cfa-40 DW_CFA_advance_loc: 6 to 0000000080000e64 DW_CFA_def_cfa_offset: 320 DW_CFA_advance_loc: 18 to 0000000080000e76 DW_CFA_restore: bad register: r15 <------ DW_CFA_restore: r14 DW_CFA_def_cfa_offset: 160 This is triggered by this check in display_debug_frames (dwarf.c): case DW_CFA_restore: if (opa >= (unsigned int) cie->ncols || opa >= (unsigned int) fc->ncols) reg_prefix = bad_reg; cie->ncols is number of registers referenced in the CIE which is 15 due to r14 being given as return address column. So for the CFA_restore of r15 a "bad register" is being printed while the same rule on r14 is ok. The reason for this check is to prevent wild memory accesses when reading input with corrupted register values while accessing the col_type/col_offset arrays. However in that case r15 is a perfectly valid register. It just happens not to be mentioned in the CIE. Hence restoring the CIE rule for r15 should end up with the default rule which is DW_CFA_undefined. This probably wasn't observed on other platforms because they either do not use CFA_restore (x86-64) or do not issue CFA_restore on registers with a higher number than the return address column. binutils/ChangeLog: 2016-09-29 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * dwarf.c (frame_display_row): Fix formatting of return address register column. (display_debug_frames): Ignore invalid indices into cie->col_type/cie->col_offset arrays and default to DW_CF_undefined instead.
2016-09-29Add .cfi_val_offset GAS command.Andreas Krebbel1-2/+2
This patch adds support for .cfi_val_offset GAS pseudo command which maps to DW_CFA_val_offset and DW_CFA_val_offset_sf. gas/ChangeLog: 2016-09-29 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * doc/as.texinfo: Add docu for .cfi_val_offset. * dw2gencfi.c (cfi_add_CFA_val_offset): New function. (dot_cfi): Add case for DW_CFA_val_offset. (output_cfi_insn): Likewise. (cfi_pseudo_table): Add entry for cfi_val_offset. * dw2gencfi.h: Add prototype for cfi_add_CFA_val_offset. * testsuite/gas/cfi/cfi-common-8.d: New test. * testsuite/gas/cfi/cfi-common-8.s: New test. * testsuite/gas/cfi/cfi.exp: Run cfi-common-8 testcase. binutils/ChangeLog: 2016-09-29 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * dwarf.c (display_debug_frames): Adjust output line.
2016-09-29Display .gnu.attributes tags for powerpc64Alan Modra2-0/+6
* readelf.c (process_arch_specific): Call process_power_specific for EM_PPC64.
2016-09-26When building target binaries, ensure that the warning flags selected for ↵Vlad Zakharov5-14/+71
the command line match the target compiler. bfd * warning.m4 (AC_EGREP_CPP_FOR_BUILD): Introduce macro to verify CC_FOR_BUILD compiler. (AM_BINUTILS_WARNINGS): Introduce ac_cpp_for_build variable and add CC_FOR_BUILD compiler checks. * Makefile.in: Regenerate. * configure: Likewise. * doc/Makefile.in: Likewise. binutils * Makefile.am: Replace AM_CLFAGS with AM_CFLAGS_FOR_BUILD when building with CC_FOR_BUILD compiler. * Makefile.in: Regenerate. * configure: Likewise. * doc/Makefile.in: Likewise. gas * Makefile.in: Regenerate. * configure: Likewise. * doc/Makefile.in: Likewise. gold * Makefile.in: Regenerate. * configure: Likewise. * testsuite/Makefile.in: Likewise. gprof * Makefile.in: Regenerate. * configure: Likewise. ld * Makefile.in: Regenerate. * configure: Likewise. opcodes * Makefile.in: Regenerate. * configure: Likewise.
2016-09-26PowerPC .gnu.attributesAlan Modra2-36/+73
This patch extends Tag_GNU_Power_ABI_FP to cover long double ABIs, makes the assembler warn about undefined tag values, and removes similar warnings from the linker. I think it is better to not warn in the linker about undefined tag values as future extensions to the tags then won't result in likely bogus warnings. This is consistent with the fact that an older linker won't warn on an entirely new tag. include/ * elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment. bfd/ * elf-bfd.h (_bfd_elf_ppc_merge_fp_attributes): Declare. * elf32-ppc.c (_bfd_elf_ppc_merge_fp_attributes): New function. (ppc_elf_merge_obj_attributes): Use it. Don't copy first file attributes, merge them. Don't warn about undefined tag bits, or copy unknown values to output. * elf64-ppc.c (ppc64_elf_merge_private_bfd_data): Call _bfd_elf_ppc_merge_fp_attributes. binutils/ * readelf.c (display_power_gnu_attribute): Catch truncated section for all powerpc attributes. Display long double ABI. Don't capitalize words, except for names. Show known bits of tag values when some unknown bits are present. Whitespace fixes. gas/ * config/tc-ppc.c (ppc_elf_gnu_attribute): New function. (md_pseudo_table <ELF>): Handle "gnu_attribute". ld/ * testsuite/ld-powerpc/attr-gnu-4-4.s: Delete. * testsuite/ld-powerpc/attr-gnu-4-14.d: Delete. * testsuite/ld-powerpc/attr-gnu-4-24.d: Delete. * testsuite/ld-powerpc/attr-gnu-4-34.d: Delete. * testsuite/ld-powerpc/attr-gnu-4-41.d: Delete. * testsuite/ld-powerpc/attr-gnu-4-32.d: Adjust expected warning. * testsuite/ld-powerpc/attr-gnu-8-23.d: Likewise. * testsuite/ld-powerpc/attr-gnu-4-01.d: Adjust expected output. * testsuite/ld-powerpc/attr-gnu-4-02.d: Likewise. * testsuite/ld-powerpc/attr-gnu-4-03.d: Likewise. * testsuite/ld-powerpc/attr-gnu-4-10.d: Likewise. * testsuite/ld-powerpc/attr-gnu-4-11.d: Likewise. * testsuite/ld-powerpc/attr-gnu-4-20.d: Likewise. * testsuite/ld-powerpc/attr-gnu-4-22.d: Likewise. * testsuite/ld-powerpc/attr-gnu-4-33.d: Likewise. * testsuite/ld-powerpc/attr-gnu-8-11.d: Likewise. * testsuite/ld-powerpc/powerpc.exp: Don't run deleted tests.
generated by cgit v1.1 at 2024-11-25 14:14:07 +0000