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2019-06-14Regenerate with approved autotools versionAlan Modra4-15/+19
bfd/ * Makefile.in: Regenerate. * configure: Regenerate. binutils/ * Makefile.in: Regenerate. * aclocal.m4: Regenerate. * doc/Makefile.in: Regenerate. gas/ * Makefile.in: Regenerate. * configure: Regenerate. * doc/Makefile.in: Regenerate. ld/ * Makefile.in: Regenerate. * configure: Regenerate. libctf/ * configure: Regenerate.
2019-06-12Add support for NetBSD PaX notes to readelf.Christos Zoulas2-15/+39
PR 24663 * readelf.c (process_netbsd_elf_note): Add support for NT_NETBSD_PAX. (process_note): Add support for PaX notes.
2019-06-12Add support for NetBSD/sh3 core reg sections to readelf.Christos Zoulas2-0/+23
PR 24665 * readelf.c (get_netbsd_elfcore_note_type): Add support for SH core notes.
2019-06-12Add support to readelf to display NetBSD auxv notes in core files.Christos Zoulas2-10/+27
PR 24664 * readelf.c (get_netbsd_elfcore_note_type): Add support for NetBSD auxv notes.
2019-06-11Add support for reporting Alpha and Vax symbol visibility in readelf.Christos Zoulas2-0/+25
PR 24662 * readelf.c (get_alpha_symbol_other): New function. (get_symbol_other): Use for Alpha symbols. (is_32bit_pcrel_reloc): Add R_VAX_PCREL32.
2019-06-11Fix an unitinitalised local variable in decode_arm_unwind().Christos Zoulas2-0/+11
PR 24661 * readelf.c (decode_arm_unwind): Ensure that the local variable 'addr' is always initialised.
2019-06-10Fix printing large decimal values in strings.Nick Clifton2-2/+8
PR 24651 * strings.c (print_strings): Use %u to print unsigned values in decimal.
2019-06-10Tidy up ar_open by using asprintf to replace xmalloc and sprintf.Christos Zoulas2-2/+15
PR 24649 * arsup.c (ar_open): Use asprintf in place of xmalloc and sprintf.
2019-06-03Revert patch that disables building libctf for non-ELF based targets.Nick Clifton9-150/+28
Revert: binutls 2019-05-29 Nick Clifton <nickc@redhat.com> * configure.ac (LIBCTF): Export. Set to empty for non-ELF based targets. (HAVE_LIBCTF): Define if libctf support is available. * Makefile.am (LIBCTF): Set value to @LIBCTF@. * objdump.c: Make CTF code conditional upon HAVE_LIBCTF being defined. * readelf.c: Likewise. * configure: Regenerate. * Makefile.in: Regenerate. * config.in: Regenerate. top 2019-05-29 Nick Clifton <nickc@redhat.com> * configure.ac (noconfigdirs): Add libctf if the target does not use the ELF file format. * configure: Regenerate.
2019-05-31libctf: fix a number of build problems found on Solaris and NetBSDJose E. Marchesi3-6/+6
- Use of nonportable <endian.h> - Use of qsort_r - Use of zlib without appropriate magic to pull in the binutils zlib - Use of off64_t without checking (fixed by dropping the unused fields that need off64_t entirely) - signedness problems due to long being too short a type on 32-bit platforms: ctf_id_t is now 'unsigned long', and CTF_ERR must be used only for functions that return ctf_id_t - One lingering use of bzero() and of <sys/errno.h> All fixed, using code from gnulib where possible. Relatedly, set cts_size in a couple of places it was missed (string table and symbol table loading upon ctf_bfdopen()). binutils/ * objdump.c (make_ctfsect): Drop cts_type, cts_flags, and cts_offset. * readelf.c (shdr_to_ctf_sect): Likewise. include/ * ctf-api.h (ctf_sect_t): Drop cts_type, cts_flags, and cts_offset. (ctf_id_t): This is now an unsigned type. (CTF_ERR): Cast it to ctf_id_t. Note that it should only be used for ctf_id_t-returning functions. libctf/ * Makefile.am (ZLIB): New. (ZLIBINC): Likewise. (AM_CFLAGS): Use them. (libctf_a_LIBADD): New, for LIBOBJS. * configure.ac: Check for zlib, endian.h, and qsort_r. * ctf-endian.h: New, providing htole64 and le64toh. * swap.h: Code style fixes. (bswap_identity_64): New. * qsort_r.c: New, from gnulib (with one added #include). * ctf-decls.h: New, providing a conditional qsort_r declaration, and unconditional definitions of MIN and MAX. * ctf-impl.h: Use it. Do not use <sys/errno.h>. (ctf_set_errno): Now returns unsigned long. * ctf-util.c (ctf_set_errno): Adjust here too. * ctf-archive.c: Use ctf-endian.h. (ctf_arc_open_by_offset): Use memset, not bzero. Drop cts_type, cts_flags and cts_offset. (ctf_arc_write): Drop debugging dependent on the size of off_t. * ctf-create.c: Provide a definition of roundup if not defined. (ctf_create): Drop cts_type, cts_flags and cts_offset. (ctf_add_reftype): Do not check if type IDs are below zero. (ctf_add_slice): Likewise. (ctf_add_typedef): Likewise. (ctf_add_member_offset): Cast error-returning ssize_t's to size_t when known error-free. Drop CTF_ERR usage for functions returning int. (ctf_add_member_encoded): Drop CTF_ERR usage for functions returning int. (ctf_add_variable): Likewise. (enumcmp): Likewise. (enumadd): Likewise. (membcmp): Likewise. (ctf_add_type): Likewise. Cast error-returning ssize_t's to size_t when known error-free. * ctf-dump.c (ctf_is_slice): Drop CTF_ERR usage for functions returning int: use CTF_ERR for functions returning ctf_type_id. (ctf_dump_label): Likewise. (ctf_dump_objts): Likewise. * ctf-labels.c (ctf_label_topmost): Likewise. (ctf_label_iter): Likewise. (ctf_label_info): Likewise. * ctf-lookup.c (ctf_func_args): Likewise. * ctf-open.c (upgrade_types): Cast to size_t where appropriate. (ctf_bufopen): Likewise. Use zlib types as needed. * ctf-types.c (ctf_member_iter): Drop CTF_ERR usage for functions returning int. (ctf_enum_iter): Likewise. (ctf_type_size): Likewise. (ctf_type_align): Likewise. Cast to size_t where appropriate. (ctf_type_kind_unsliced): Likewise. (ctf_type_kind): Likewise. (ctf_type_encoding): Likewise. (ctf_member_info): Likewise. (ctf_array_info): Likewise. (ctf_enum_value): Likewise. (ctf_type_rvisit): Likewise. * ctf-open-bfd.c (ctf_bfdopen): Drop cts_type, cts_flags and cts_offset. (ctf_simple_open): Likewise. (ctf_bfdopen_ctfsect): Likewise. Set cts_size properly. * Makefile.in: Regenerate. * aclocal.m4: Likewise. * config.h: Likewise. * configure: Likewise.
2019-05-30Harmonize readelf's output for version sections.Nick Clifton2-2/+8
PR 24627 binutils * readelf.c (process_version_sections): Add 0x prefix to address display. Correct indentation. ld * testsuite/ld-elf/ver_def.vd: Update expected output.
2019-05-30s12z genelf.emAlan Modra2-3/+9
This changes s12z to use generic.em and genelf.em, which is more suited to targets that use the generic linker hash table. A tweak or two to some testsuite predicates then gives a clean testsuite result on the target. PR 24596 binutils/ * testsuite/lib/binutils-common.exp (supports_gnu_unique): Add s12z to targets not supporting this feature. ld/ * emulparams/m9s12zelf.sh (TEMPLATE_NAME): Set to generic. (EXTRA_EM_FILE): Define to genelf. * testsuite/lib/ld-lib.exp (uses_genelf): Add s12z.
2019-05-30Support tcl procedure calls in run_dump_test xfailAlan Modra2-1/+9
Also support tcl procedure calls in the run_ld_link_tests and run_ld_link_exec_tests optional "xfail" args. Implements "is_generic" and renames "is_generic_elf" to "uses_genelf", then uses these procs in lots of ld tests. moxie-elf -FAIL: ld-elf/orphan3 mt-elf -FAIL: ld-elf/merge s12z-elf -FAIL: ld-discard/extern s12z-elf -FAIL: ld-discard/start s12z-elf -FAIL: ld-discard/static s12z-elf -FAIL: PR ld/21703 s12z-elf -FAIL: PR ld/21703 -r s12z-elf -FAIL: Symbol flags copy s12z-elf -FAIL: ld-elf/group1 s12z-elf -FAIL: ld-elf/group3b s12z-elf -FAIL: ld-elf/group8a s12z-elf -FAIL: ld-elf/group8b s12z-elf -FAIL: ld-elf/group9a s12z-elf -FAIL: ld-elf/group9b s12z-elf -FAIL: ld-elf/linkonce2 s12z-elf -FAIL: ld-elf/merge2 s12z-elf -FAIL: ld-elf/merge3 s12z-elf -FAIL: ld-elf/pr12851 s12z-elf -FAIL: ld-elf/pr17550c s12z-elf -FAIL: ld-elf/pr17550d s12z-elf -FAIL: ld-elf/pr22677 s12z-elf -FAIL: ld-elf/pr22836-1a s12z-elf -FAIL: ld-elf/pr22836-1b s12z-elf -FAIL: ld-elf/warn1 s12z-elf -FAIL: ld-elf/warn3 binutils/ * testsuite/lib/binutils-common.exp (run_dump_test): Support tcl procedures for xfail args. ld/ * testsuite/lib/ld-lib.exp (run_ld_link_tests): Support procedure calls in optional "xfail" args. (run_ld_link_exec_tests): Likewise. (is_generic): New. (uses_genelf): Rename from is_generic_elf. Delete bogus semicolons. * testsuite/ld-scripts/align.exp: Rename is_generic_elf call. * testsuite/ld-elf/elf.exp: Use is_generic and uses_genelf. Delete xfail_implib var. * testsuite/ld-elf/sec64k.exp: Use is_generic. * testsuite/ld-elf/shared.exp: Likewise. * testsuite/ld-discard/extern.d: Use is_generic in xfail. * testsuite/ld-discard/start.d: Likewise. * testsuite/ld-discard/static.d: Likewise. * testsuite/ld-elf/attributes.d: Likewise. * testsuite/ld-elf/group1.d: Likewise. * testsuite/ld-elf/group3b.d: Likewise. * testsuite/ld-elf/group8a.d: Likewise. * testsuite/ld-elf/group8b.d: Likewise. * testsuite/ld-elf/group9a.d: Likewise. * testsuite/ld-elf/group9b.d: Likewise. * testsuite/ld-elf/linkonce2.d: Likewise. * testsuite/ld-elf/merge2.d: Likewise. * testsuite/ld-elf/merge3.d: Likewise. * testsuite/ld-elf/pr12851.d: Likewise. * testsuite/ld-elf/pr12975.d: Likewise. * testsuite/ld-elf/pr13177.d: Likewise. * testsuite/ld-elf/pr13195.d: Likewise. * testsuite/ld-elf/pr17550c.d: Likewise. * testsuite/ld-elf/pr17550d.d: Likewise. * testsuite/ld-elf/pr17615.d: Likewise. * testsuite/ld-elf/pr21562a.d: Likewise. * testsuite/ld-elf/pr21562b.d: Likewise. * testsuite/ld-elf/pr21562c.d: Likewise. * testsuite/ld-elf/pr21562d.d: Likewise. * testsuite/ld-elf/pr21562i.d: Likewise. * testsuite/ld-elf/pr21562j.d: Likewise. * testsuite/ld-elf/pr21562k.d: Likewise. * testsuite/ld-elf/pr21562l.d: Likewise. * testsuite/ld-elf/pr21562m.d: Likewise. * testsuite/ld-elf/pr21562n.d: Likewise. * testsuite/ld-elf/pr22677.d: Likewise. * testsuite/ld-elf/pr22836-1a.d: Likewise. * testsuite/ld-elf/pr22836-1b.d: Likewise. * testsuite/ld-elf/warn3.d: Likewise. * testsuite/ld-elf/warn1.d: Likewise and xfail sparc solaris targets rather than notarget. * testsuite/ld-elf/compressed1d.d: Use uses_genelf in xfail. * testsuite/ld-elf/orphan-10.d: Likewise. * testsuite/ld-elf/orphan-9.d: Likewise. * testsuite/ld-elf/orphan-region.d: Likewise. * testsuite/ld-elf/orphan.d: Likewise. * testsuite/ld-elf/orphan3.d: Likewise. * testsuite/ld-elf/pr20528a.d: Likewise. * testsuite/ld-elf/pr20528b.d: Likewise. * testsuite/ld-elf/pr23658-1a.d: Likewise. * testsuite/ld-elf/pr23658-1b.d: Likewise. * testsuite/ld-elf/pr349.d: Likewise. * testsuite/ld-elf/warn2.d: Likewise and xfail sparc solaris targets rather than notarget. * testsuite/ld-elf/merge.d: Correct ms1-*-* to mt-*-*.
2019-05-29Update release tools with libctf support.Nick Clifton2-1/+6
top * src-release.sh (do_proto_toplev): Add libctf to list of directories that can be disabled. binutils* README-how-to-make-a-release: Add libctf to list of directories that need updates in their ChangeLogs.
2019-05-29Do not build libctf for targets that do not use the ELF file format.Nick Clifton9-13/+164
top * configure.ac (noconfigdirs): Add libctf if the target does not use the ELF file format. * configure: Regenerate. binutils* configure.ac (LIBCTF): Export. Set to empty for non-ELF based targets. (HAVE_LIBCTF): Define if libctf support is available. * Makefile.am (LIBCTF): Set value to @LIBCTF@. * objdump.c: Make CTF code conditional upon HAVE_LIBCTF being defined. * readelf.c: Likewise. * configure: Regenerate. * Makefile.in: Regenerate. * config.in: Regenerate.
2019-05-28Add libctf to top-level MAINTAINERS; add myself as CTF maintainer.Nick Alcock2-0/+5
2019-05-28binutils: CTF support for objdump and readelfNick Alcock10-27/+480
This introduces CTF support for objdump and readelf. objdump has the following new arguments: --ctf=SECTION: display CTF in the given SECTION --ctf-parent=SECTION: name of CTF section that is the parent of this section readelf has the above, and these two as well: --ctf-symbols=SECTION: name of symbol table section (optional) --ctf-strings=SECTION: name of string table section (optional) (objdump can always use BFD machinery to determine the applicable string and symbol tables automatically, so these arguments are unnecessary.) Nearly all the work is done by the ctf_dump machinery in libctf: most of the remaining work is option-processing and section-reading, and thus is different for objdump and readelf: the minimal amount of similar code remaining is, in my view, too small to share, particularly given that objdump uses ctf_bfdopen() and readelf uses ctf_simple_open() since it doesn't have a bfd. I am not particularly satisfied with the way resources are freed in either of these (I was forced to do it at the top level, for lack of anywhere else to free resources allocated during option processing), but I can't see any better way to do it without introducing new infrastructure for no other purpose. There are essentially arbitrary ordering changes to the Makefile.in's order of libtool-related stuff that I can't get rid of, but they have no semantic effect. (It is possible that some hunks of these changes could be dropped, but that seems a bit risky to me.) binutils/ * objdump.c (ctf-api.h): New include. (dump_ctf_section_info): New variable. (dump_ctf_section_name): Likewise. (usage): Describe new options. (enum option_values): Add OPTION_CTF and OPTION_CTF_PARENT. (main): Use them to add --ctf and --ctf-parent. (read_section_stabs): Add new parameter, entsize_ptr. (find_stabs_section): Adjust accordingly. (make_ctfsect): New. (dump_ctf_indent_lines): New. (dump_ctf_archive_member): New. (dump_ctf): New. (dump_bfd): Call it. Free resources afterwards. * readelf.c (ctf-api.h): New include. (CTF_DUMP): New. (static bfd_boolean do_ctf): Likewise. (dump_ctf_parent_name): Likewise. (dump_ctf_symtab_name): Likewise. (dump_ctf_strtab_name): Likewise. (OPTION_CTF_DUMP): Likewise. (OPTION_CTF_PARENT): Likewise. (OPTION_CTF_SYMBOLS): Likewise. (OPTION_CTF_STRINGS): Likewise. (options): Add them. (usage): Likewise. (parse_args): Handle the new options, requesting CTF_DUMP. (process_section_contents): Handle CTF_DUMP. (shdr_to_ctf_sect): New. (dump_ctf_indent_lines): New. (dump_section_as_ctf): New. (main): Free resources. * Makefile.am (LIBCTF): New variable. (objdump_DEPENDENCIES): Use it. (readelf_DEPENDENCIES): Likewise. (objdump_LDADD): Likewise. (readelf_LDADD): Likewise. * aclocal.m4: Regenerated. * Makefile.in: Likewise. * doc/binutils.texi (objdump): Document the new options. (readelf): Likewise. * doc/ctf.options.texi: New. * doc/Makefile.in: Regenerated. * NEWS: Mention the new feature.
2019-05-27readelf group errors/warningsAlan Modra2-1/+6
I noticed that one of the readelf errors stopped processing of further group sections. This patch makes readelf continue on to other groups, like it does with the other errors. * readelf.c (process_section_groups): Continue processing groups when sh_entsize exceeds group size.
2019-05-24aarch64: add STO_AARCH64_VARIANT_PCS and DT_AARCH64_VARIANT_PCSSzabolcs Nagy2-0/+26
The bottom 2 bits of st_other are used for visibility, the top 6 bits are de facto reserved for processor specific use. This patch defines a bits to mark function symbols that follow a variant procedure call standard with different register usage convention. A dynamic tag is also defined that marks modules with R_<CLS>_JUMP_SLOT relocations referencing symbols marked with STO_AARCH64_VARIANT_PCS. This can be used by dynamic linkers that support lazy binding to decide what registers need to be preserved during symbol resolution. binutils/ChangeLog: * readelf.c (get_aarch64_dynamic_type): Handle DT_AARCH64_VARIANT_PCS. (get_aarch64_symbol_other): New, handles STO_AARCH64_VARIANT_PCS. (get_symbol_other): Call get_aarch64_symbol_other. include/ChangeLog: * elf/aarch64.h (DT_AARCH64_VARIANT_PCS): Define. (STO_AARCH64_VARIANT_PCS): Define.
2019-05-24PowerPC add initial -mfuture instruction supportPeter Bergner2-1/+6
This patch adds initial 64-bit insn assembler/disassembler support. The only instruction added is "pnop" along with the automatic aligning of prefix instruction so they do not cross 64-byte boundaries. include/ * dis-asm.h (WIDE_OUTPUT): Define. * opcode/ppc.h (prefix_opcodes, prefix_num_opcodes): Declare. (PPC_OPCODE_POWERXX, PPC_GET_PREFIX, PPC_GET_SUFFIX), (PPC_PREFIX_P, PPC_PREFIX_SEG): Define. opcodes/ * ppc-dis.c (ppc_opts): Add "future" entry. (PREFIX_OPCD_SEGS): Define. (prefix_opcd_indices): New array. (disassemble_init_powerpc): Initialize prefix_opcd_indices. (lookup_prefix): New function. (print_insn_powerpc): Handle 64-bit prefix instructions. * ppc-opc.c (PREFIX_OP, PREFIX_FORM, SUFFIX_MASK, PREFIX_MASK), (PMRR, POWERXX): Define. (prefix_opcodes): New instruction table. (prefix_num_opcodes): New constant. binutils/ * objdump.c (disassemble_bytes): Set WIDE_OUTPUT in flags. gas/ * config/tc-ppc.c (ppc_setup_opcodes): Handle prefix_opcodes. (struct insn_label_list): New. (insn_labels, free_insn_labels): New variables. (ppc_record_label, ppc_clear_labels, ppc_start_line_hook): New funcs. (ppc_frob_label, ppc_new_dot_label): Move functions earlier in file and call ppc_record_label. (md_assemble): Handle 64-bit prefix instructions. Align labels that are on the same line as a prefix instruction. * config/tc-ppc.h (tc_frob_label, ppc_frob_label): Move to later in the file. (md_start_line_hook): Define. (ppc_start_line_hook): Declare. * testsuite/gas/ppc/prefix-align.d, * testsuite/gas/ppc/prefix-align.s: New test. * testsuite/gas/ppc/ppc.exp: Run new test.
2019-05-23binutils: add myself as the maintainer for BPFJose E. Marchesi2-0/+5
binutils/ChangeLog: 2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com> * MAINTAINERS: Add myself as the maintainer for BPF.
2019-05-23binutils: add support for eBPFJose E. Marchesi3-1/+19
This patch adds support for ELF64 eBPF to readelf, and fixes a `nm' test to run properly in bpf-*-* targets. binutils/ChangeLog: 2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com> * readelf.c: Include elf/bpf.h. (guess_is_rela): Hanle EM_BPF. (dump_relocations): Likewise. (is_32bit_abs_reloc): Likewise. * testsuite/binutils-all/nm.exp: Add bpf-*-* to the list of ELF targets.
2019-05-21AArch64: Add SVE DWARF registersTamar Christina4-3/+44
The SVE DRAWF register names are missing from binutils, this may cause objdump and readelf to ignore certain DRAWF output as the registers are unknown (most notably CIEs). This patch adds the registers in accordance to the "DWARF for ARM(r) 64-bit Architecture (AARch64) with SVE support" documentation [1]. [1] https://developer.arm.com/docs/100985/latest/dwarf-for-the-arm-64-bit-architecture-aarch64-with-sve-support binutils/ChangeLog: * dwarf.c (dwarf_regnames_aarch64): Add SVE registers. * testsuite/binutils-all/aarch64/sve-dwarf-registers.d: New test. * testsuite/binutils-all/aarch64/sve-dwarf-registers.s: New test.
2019-05-20[MIPS] PR gas/14798: Limit IRIX5 specific default typing to IRIX targetsFaraz Shahbazker3-8/+14
On IRIX 5, every global symbol that is not explicitly labelled as being a function is assumed to be an object. There is no reason why IRIX behaviour should extend to all MIPS targets, so limit this to only IRIX targets. gas/ PR 14798 * config/tc-mips.c (s_mips_globl): Only treat symbols that are not explicitly labelled as BSF_OBJECTs for IRIX targets. * testsuite/gas/mips/pr14798.s: New test source. * testsuite/gas/mips/pr14798-irix.d: New test. * testsuite/gas/mips/pr14798.d: Likewise. * testsuite/gas/mips/mips.exp: Run the new tests. binutils/ PR 14798 * testsuite/binutils-all/readelf.ss-mips: Update reference output. * testsuite/binutils-all/readelf.ss-tmips: Likewise. ld/ PR 14798 * testsuite/ld-mips-elf/reloc-6a.s: Specify .text section for global code symbols. * testsuite/ld-mips-elf/reloc-6b.s: Likewise.
2019-05-20Updated translations for various binutils subdirectories.Nick Clifton2-2328/+5863
bfd * po/fr.po: Updated French translation. binutils* po/ca.po: Updated Catalan translation. gprof * po/de.po: Updated German translation. opcodes * po/fr.po: Updated French translation.
2019-05-16[PATCH, binutils, Arm] Add Armv8.1-M Mainline and MVE enablement to NEWSAndre Vieira2-0/+7
gas/ChangeLog: 2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com> * NEWS: Mention Armv8.1-M Mainline and MVE. binutils/ChangeLog: 2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com> * NEWS: Mention Armv8.1-M Mainline and MVE.
2019-05-16[PATCH 1/57][Arm][GAS]: Add support for +mve and +mve.fpAndre Vieira2-0/+9
bfd/ChangeLog: 2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com> * elf32-arm.c (elf32_arm_merge_eabi_attributes): Add case for Tag_MVE_arch. binutils/ChangeLog: 2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com> * readelf.c (arm_attr_tag_MVE_arch): New array for Tag_MVE_arch values. (arm_attr_public_tag arm_attr_public_tags): Add case for Tag_MVE_arch. elfcpp/ChangeLog: 2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com> * arm.h (Tag_MVE_arch): Define new enum value. gas/ChangeLog: 2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com> * config/tc-arm.c (mve_ext, mve_fp_ext): New features. (armv8_1m_main_ext_table): Add new extensions. (aeabi_set_public_attributes): Translate new features to new build attributes. (arm_convert_symbolic_attribute): Add Tag_MVE_arch. * doc/c-arm.texi: Document new extensions and new build attribute. include/ChangeLog: 2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com> * elf/arm.h (Tag_MVE_arch): Define new enum value. * opcode/arm.h (FPU_MVE, FPU_MVE_FP): New MACROs for new features.
2019-05-14Add missing verilogtest.s file.Nick Clifton1-0/+12
2019-05-14Add new option to objcopy: --verilog-data-width. Use this option to set the ↵Jamey Hicks9-2/+103
size of byte bundles generated in verilog format files. PR 19921 binutils* objcopy.c: Add new option --verilog-data-width. Use it to set the value of VerilogDataWidth. * doc/binutils.texi: Document the new option. * testsuite/binutils-all/objcopy.exp: Run tests of new option. * testsuite/binutils-all/verilog-1.hex: New file. * testsuite/binutils-all/verilog-2.hex: New file. * testsuite/binutils-all/verilog-4.hex: New file. * testsuite/binutils-all/verilog-8.hex: New file. * NEWS: Mention the new feature. bfd * verilog.c: (VerilogDataWidth): New variable. (verilog_write_record): Emit bytes in VerilogDataWidth bundles.
2019-05-10Re: Sign-extend start and stop address inputs to objdumpAlan Modra2-8/+21
git commit 2379f9c475 introduced an rx-elf test failure. This fixes it. * testsuite/binutils-all/objdump.exp (test_objdump_disas_limited), (test_objdump_content_limited): Add text arg, use in place of .text. (bintest_signed.o): Call get_standard_section_names for name of text section.
2019-05-08Sign-extend start and stop address inputs to objdumpFaraz Shahbazker3-0/+88
For targets that treat addresses as signed (MIPS/SH64), user-specified start/stop address limits cannot be compared directly to section VMAs. We must sign-extend user-specified 32-bit address limits which have bit 31 set for such targets. binutils/ * objdump.c (sign_extend_address): New function. (dump_bfd): Sign-extend user-specified start/stop addresses for targets that need it. * testsuite/binutils-all/objdump.exp: Add tests for objdump with start and stop addresses in higher address ranges.
2019-05-01Fix spelling mistakes in binutils testsuite.Matthew Malcomson3-2/+8
* testsuite/binutils-all/objdump.exp: Correct executable spelling. * testsuite/binutils-all/compress.exp: Likewise.
2019-05-01Change nm so that when it is running in POSIX compatible mode, it does not ↵Nick Clifton3-33/+94
prefix symbol values with 0. PR 24507 * nm.c: (print_format): New variable. (value_format_32bit, value_format_64bit): Delete. (set_print_radix): Remove code to alter value_format strings. (set_output_format): Record chosen format in print_format. (get_print_format): New function - constructs a printf formatting string according to the requirements of size, radix, and output format. (print_value): Use get_print_format. * testsuite/binutils-all/nm.exp: Add tests of "nm --format=posix" and "nm -t d".
2019-04-30Work around gcc9 warning bugAlan Modra2-13/+14
* wrstabs.c (stab_start_class_type): Add assert to work around gcc9 warning. Tidy.
2019-04-24Stop strip from merging notes when stripping debug or dwo information.Nick Clifton3-3/+20
* objcopy.c (strip_main): Do not enable note merging by default if just stripping debug or dwo information. * doc/binutils.texi (strip): Update documentation.
2019-04-23Update binutils release making documenation to mention changing the symbolic ↵Nick Clifton2-0/+7
documentation link. * README-how-to-make-a-release: Add note to update the symbolic link from "docs" to "docs-2.x" on the sourceware website.
2019-04-16ns32k testsuite tidyAlan Modra3-2/+7
Some of these tests were excluded for ns32k-netbsd, exclude for all ns32k instead. binutils/ * testsuite/binutils-all/copy-2.d: Don't run for ns32k-*-*. * testsuite/binutils-all/copy-3.d: Likewise. gas/ * testsuite/gas/all/gas.exp: Remove ns32k xfails. * testsuite/gas/all/weakref1u.d: Don't run for ns32k-*-*. ld/ * testsuite/ld-scripts/pr20302.d: Don't run for ns32k-*-*. * testsuite/ld-scripts/section-match-1.d: Likewise. * testsuite/ld-undefined/require-defined.exp: Likewise.
2019-04-15[binutils, ARM, 1/16] Add support for Armv8.1-M Mainline CLIAndre Vieira2-1/+5
The patch is straightforward, it does the following: - support the new Tag_CPU_arch build attribute value, ie.: + declare the new value + update all the asserts forcing logic to be reviewed for new architectures + create a corresponding bfd_mach_arm_8_1M_MAIN enumerator in bfd and add mapping from Tag_CPU_arch to it + teach readelf about new Tag_CPU_arch value - declare armv8.1-m.main as a supported architecture value - define Armv8.1-M Mainline in terms of feature bits available - tell objdump mapping from bfd_mach_arm_8_1M_MAIN enumerator to feature bits available - update architecture-specific logic in gas and bfd guarded by the asserts mentioned above. - tests for all the above ChangeLog entries are as follows: *** bfd/ChangeLog *** 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * archures.c (bfd_mach_arm_8_1M_MAIN): Define. * bfd-in2.h: Regenerate. * cpu-arm.c (arch_info_struct): Add entry for Armv8.1-M Mainline. * elf32-arm.c (using_thumb_only): Return true for Armv8.1-M Mainline and update assert. (using_thumb2): Likewise. (using_thumb2_bl): Update assert. (arch_has_arm_nop): Likewise. (bfd_arm_get_mach_from_attributes): Add case for Armv8.1-M Mainline. (tag_cpu_arch_combine): Add logic for Armv8.1-M Mainline merging. *** binutils/ChangeLog *** 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * readelf.c (arm_attr_tag_CPU_arch): Add entry for Armv8.1-M Mainline. *** gas/ChangeLog *** 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * config/tc-arm.c (cpu_arch_ver): Add entry for Armv8.1-M Mainline Tag_CPU_arch build attribute value. Reindent. (get_aeabi_cpu_arch_from_fset): Update assert. (aeabi_set_public_attributes): Update assert for Tag_DIV_use logic. * testsuite/gas/arm/attr-march-armv8_1-m.main.d: New test. *** include/ChangeLog *** 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro. (MAX_TAG_CPU_ARCH): Set value to above macro. * opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro. (ARM_AEXT_V8_1M_MAIN): Likewise. (ARM_AEXT2_V8_1M_MAIN): Likewise. (ARM_ARCH_V8_1M_MAIN): Likewise. *** ld/ChangeLog *** 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * testsuite/ld-arm/attr-merge-13.attr: New test. * testsuite/ld-arm/attr-merge-13a.s: New test. * testsuite/ld-arm/attr-merge-13b.s: New test. *** opcodes/ChangeLog *** 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * arm-dis.c (select_arm_features): Add logic for Armv8.1-M Mainline.
2019-04-08x86: Define GNU_PROPERTY_X86_ISA_1_AVX512_BF16H.J. Lu4-2/+12
Update assembler and readelf to support #define GNU_PROPERTY_X86_ISA_1_AVX512_BF16 (1U << 24) for AVX512_BF16. binutils/ * readelf.c (decode_x86_isa): Handle GNU_PROPERTY_X86_ISA_1_AVX512_BF16. * testsuite/binutils-all/i386/pr21231b.d: Updated. * testsuite/binutils-all/x86-64/pr21231b.d: Likewise. gas/ * config/tc-i386.c (output_insn): Support GNU_PROPERTY_X86_ISA_1_AVX512_BF16. * testsuite/gas/i386/property-2.s: Add AVX512_BF16 test. * testsuite/gas/i386/property-2.d: Updated. * testsuite/gas/i386/x86-64-property-2.d: Likewise. include/ * elf/common.h (GNU_PROPERTY_X86_ISA_1_AVX512_BF16): New.
2019-04-08Count i386-moss as ELFH.J. Lu2-0/+5
* testsuite/binutils-all/nm.exp: Count i386-moss as ELF.
2019-03-26AArch64/Arm: Update testcases fixing endiannes and linux targetsTamar Christina11-146/+145
This fixes the testcases that are failing due to my recent patch. It turns out that the start address across baremetal and linux builds isn't entirely predictable without a linker script. Since the address themselves are not the important thing I am ignoring them now. Secondly I was encoding data using .word using non 0 values, however because .word is subjected to endiannes these non-zero values under big-endian happen to fall into the encoding space of instructions which changes the disassembly. Using 0 fixes this problem and the purpose of the test still holds, though objdump will dump ... for data only sections, which is ok as the data/insn mixed sections will test the patch. The ARM Attributes sections is not important and is ignored. binutils/ChangeLog: * testsuite/binutils-all/aarch64/in-order.d: Likewise. * testsuite/binutils-all/aarch64/out-of-order-all.d: Likewise. * testsuite/binutils-all/aarch64/out-of-order.d: Likewise. * testsuite/binutils-all/aarch64/out-of-order.s: Likewise. * testsuite/binutils-all/arm/in-order-all.d: Likewise. * testsuite/binutils-all/arm/in-order.d: Likewise. * testsuite/binutils-all/arm/out-of-order-all.d: Likewise. * testsuite/binutils-all/arm/out-of-order.d: Likewise. * testsuite/binutils-all/arm/out-of-order.s: Likewise.
2019-03-26Take over Dave Brolley's maintainerships for FR30, FRV and MEP.Nick Clifton2-3/+8
* MAINTAINERS: Take over Dave Brolley's maintainerships for FR30, FRV and MEP.
2019-03-26Fix relpp may be used uninitializedAlan Modra2-1/+5
* objdump.c (dump_relocs_in_section): Warning fix.
2019-03-25Arm: Fix Arm disassembler mapping symbol search.Tamar Christina8-0/+223
Similar to the AArch64 patches the Arm disassembler has the same issues with out of order sections but also a few short comings. For one thing there are multiple code blocks to determine mapping symbols, and they all work slightly different, and neither fully correct. The first thing this patch does is centralise the mapping symbols search into one function mapping_symbol_for_insn. This function is then updated to perform a search in a similar way as AArch64. Their used to be a value has_mapping_symbols which was used to determine the default disassembly for objects that have no mapping symbols. The problem with the approach was that it was determining this value in the same loop that needed it, which is why this field could take on the states -1, 0, 1 where -1 means "don't know". However this means that until you actually find a mapping symbol or reach the end of the disassembly glob, you don't know if you did the right action or not, and if you didn't you can't correct it anymore. This is why the two jump-reloc-veneers-* testcases end up disassembling some insn as data when they shouldn't. Out of order here refers to an object file where sections are not listed in a monotonic increasing VMA order. The ELF ABI for Arm [1] specifies the following for mapping symbols: 1) A text section must always have a corresponding mapping symbol at it's start. 2) Data sections do not require any mapping symbols. 3) The range of a mapping symbol extends from the address it starts on up to the next mapping symbol (exclusive) or section end (inclusive). However there is no defined order between a symbol and it's corresponding mapping symbol in the symbol table. This means that while in general we look up for a corresponding mapping symbol, we have to make at least one check of the symbol below the address being disassembled. When disassembling different PCs within the same section, the search for mapping symbol can be cached somewhat. We know that the mapping symbol corresponding to the current PC is either the previous one used, or one at the same address as the current PC. However this optimization and mapping symbol search must stop as soon as we reach the end or start of the section. Furthermore if we're only disassembling a part of a section, the search is a allowed to search further than the current chunk, but is not allowed to search past it (The mapping symbol if there, must be at the same address, so in practice we usually stop at PC+4). lastly, since only data sections don't require a mapping symbol the default mapping type should be DATA and not INSN as previously defined, however if the binary has had all its symbols stripped than this isn't very useful. To fix this we determine the default based on the section flags. This will allow the disassembler to be more useful on stripped binaries. If there is no section than we assume you to be disassembling INSN. [1] https://developer.arm.com/docs/ihi0044/latest/elf-for-the-arm-architecture-abi-2018q4-documentation#aaelf32-table4-7 binutils/ChangeLog: * testsuite/binutils-all/arm/in-order-all.d: New test. * testsuite/binutils-all/arm/in-order.d: New test. * testsuite/binutils-all/arm/objdump.exp: Support .d tests. * testsuite/binutils-all/arm/out-of-order-all.d: New test. * testsuite/binutils-all/arm/out-of-order.T: New test. * testsuite/binutils-all/arm/out-of-order.d: New test. * testsuite/binutils-all/arm/out-of-order.s: New test. ld/ChangeLog: * testsuite/ld-arm/jump-reloc-veneers-cond-long.d: Update disassembly. * testsuite/ld-arm/jump-reloc-veneers-long.d: Update disassembly. opcodes/ChangeLog: * arm-dis.c (struct arm_private_data): Remove has_mapping_symbols. (mapping_symbol_for_insn): Implement new algorithm. (print_insn): Remove duplicate code.
2019-03-25AArch64: Have -D override mapping symbol as documented.Tamar Christina4-16/+93
The documentation for -D says that on Arm platforms -D should disassemble data as instructions. "If the target is an ARM architecture this switch also has the effect of forcing the disassembler to decode pieces of data found in code sections as if they were instructions. " This makes it do as it says on the tincan so it's more consistent with aarch32. The usecase here is for baremetal developers who have created their instructions using .word directives instead if .insn. Though for Linux users I do find this behavior somewhat non-optimal. Perhaps there should be a new flag that just disassembles the values following the actual mapping symbol? binutils/ChangeLog: * testsuite/binutils-all/aarch64/in-order-all.d: New test. * testsuite/binutils-all/aarch64/out-of-order-all.d: New test. * testsuite/binutils-all/aarch64/out-of-order.d: opcodes/ChangeLog: * aarch64-dis.c (print_insn_aarch64): Implement override.
2019-03-25AArch64: Fix AArch64 disassembler mapping symbol searchTamar Christina3-1/+50
My previous patch for AArch64 was not enough to catch all the cases where disassembling an out-of-order section could go wrong. It had missed the case DATA sections could be incorrectly disassembled as TEXT. Out of order here refers to an object file where sections are not listed in a monotonic increasing VMA order. The ELF ABI for AArch64 [1] specifies the following for mapping symbols: 1) A text section must always have a corresponding mapping symbol at it's start. 2) Data sections do not require any mapping symbols. 3) The range of a mapping symbol extends from the address it starts on up to the next mapping symbol (exclusive) or section end (inclusive). However there is no defined order between a symbol and it's corresponding mapping symbol in the symbol table. This means that while in general we look up for a corresponding mapping symbol, we have to make at least one check of the symbol below the address being disassembled. When disassembling different PCs within the same section, the search for mapping symbol can be cached somewhat. We know that the mapping symbol corresponding to the current PC is either the previous one used, or one at the same address as the current PC. However this optimization and mapping symbol search must stop as soon as we reach the end or start of the section. Furthermore if we're only disassembling a part of a section, the search is a allowed to search further than the current chunk, but is not allowed to search past it (The mapping symbol if there, must be at the same address, so in practice we usually stop at PC+4). lastly, since only data sections don't require a mapping symbol the default mapping type should be DATA and not INSN as previously defined, however if the binary has had all its symbols stripped than this isn't very useful. To fix this we determine the default based on the section flags. This will allow the disassembler to be more useful on stripped binaries. If there is no section than we assume you to be disassembling INSN. [1] https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4#aaelf64-section4-5-4 binutils/ChangeLog: * testsuite/binutils-all/aarch64/in-order.d: New test. * testsuite/binutils-all/aarch64/out-of-order.d: Disassemble data as well. opcodes/ChangeLog: * aarch64-dis.c (print_insn_aarch64): Update the mapping symbol search order.
2019-03-25AArch64: Fix disassembler bug with out-of-order sectionsTamar Christina5-0/+77
The AArch64 disassembler has an optimization that it uses to reduce the amount it has to search for mapping symbols during disassembly. This optimization assumes that sections are listed in the section header in monotonic increasing VMAs. However this is not a requirement for the ELF specification. Because of this when such "out of order" sections occur the disassembler would pick the wrong mapping symbol to disassemble the section with. This fixes it by explicitly passing along the stop offset for the current disassembly glob and when this changes compared to the previous one we've seen the optimization won't be performed. In effect this restarts the search from a well defined starting point. Usually the symbol's address. The existing stop_vma can't be used for this as it is allowed to be unset and setting this unconditionally would change the semantics of this field. binutils/ChangeLog: * objdump.c (disassemble_bytes): Pass stop_offset. * testsuite/binutils-all/aarch64/out-of-order.T: New test. * testsuite/binutils-all/aarch64/out-of-order.d: New test. * testsuite/binutils-all/aarch64/out-of-order.s: New test. include/ChangeLog: * dis-asm.h (struct disassemble_info): Add stop_offset. opcodes/ChangeLog: * aarch64-dis.c (last_stop_offset): New. (print_insn_aarch64): Use stop_offset.
2019-03-19Prevent an illegal memory access by objdump when parsing a corrupt file on a ↵Nick Clifton2-7/+15
32-bit host. PR 24360 * objdump.c (load_specific_debug_section): Check that the amount of memory to be allocated matches the size of the section.
2019-03-13[BFD, LD, AArch64, 3/3] Add --pac-plt to enable PLTs protected with PAC.Sudakshina Das2-0/+8
This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds new definitions of PAC enabled PLTs and both BTI and PAC enabled PLTs. 2) It also defines the new dynamic tag DT_AARCH64_PAC_PLT for the PAC enabled PLTs. 3) This patch adds a new ld command line option: --pac-plt. In the presence of this option, the linker uses the PAC enabled PLTs and marks with DT_AARCH64_PAC_PLT. 4) In case both BTI and PAC are enabled the linker should pick PLTs enabled with both and also use dynamic tags for both. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elfnn-aarch64.c (PLT_PAC_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): New. (PLT_BTI_PAC_ENTRY_SIZE, PLT_BTI_PAC_SMALL_ENTRY_SIZE): New. (setup_plt_values): Account for PAC or PAC and BTI enabled PLTs. (elfNN_aarch64_size_dynamic_sections): Add checks for PLT_BTI_PAC and PLT_PAC_PLT. (elfNN_aarch64_finish_dynamic_sections): Account for PLT_BTI_PAC. (get_plt_type): Add case for DT_AARCH64_PAC_PLT. (elfNN_aarch64_plt_sym_val): Add cases for PLT_BTI_PAC and PLT_PAC. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * readelf.c (get_aarch64_dynamic_type): Add case for DT_AARCH64_PAC_PLT. (dynamic_section_aarch64_val): Likewise. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elf/aarch64.h (DT_AARCH64_PAC_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * NEWS: Document --pac-plt. * emultempl/aarch64elf.em (OPTION_PAC_PLT): New. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add pac-plt. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_PAC_PLT. * testsuite/ld-aarch64/aarch64-elf.exp: Add the following tests. * testsuite/ld-aarch64/bti-pac-plt-1.d: New test. * testsuite/ld-aarch64/bti-pac-plt-2.d: New test. * testsuite/ld-aarch64/pac-plt-1.d: New test. * testsuite/ld-aarch64/pac-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: Add .ifndef directive.
2019-03-13[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI ↵Sudakshina Das2-0/+39
enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
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