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2023-11-23RISC-V: Add sub-extension XTheadZvamo for T-Head VECTOR vendor extensionJin Ma1-0/+5
T-Head has a range of vendor-specific instructions. Therefore it makes sense to group them into smaller chunks in form of vendor extensions. This patch adds the sub-extension "XTheadZvamo" for the "XTheadVector" extension, and it provides AMO instructions for T-Head VECTOR vendor extension. The 'th' prefix and the "XTheadVector" extension are documented in a PR for the RISC-V toolchain conventions ([1]). [1] https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/19 Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com> Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu> bfd/ChangeLog: * elfxx-riscv.c (riscv_multi_subset_supports): Add support for "XTheadZvamo" extension. (riscv_multi_subset_supports_ext): Likewise. gas/ChangeLog: * doc/c-riscv.texi: * testsuite/gas/riscv/x-thead-vector-zvamo.d: New test. * testsuite/gas/riscv/x-thead-vector-zvamo.s: New test. include/ChangeLog: * opcode/riscv-opc.h (MATCH_TH_VAMOADDWV): New. * opcode/riscv.h (enum riscv_insn_class): Add insn class. opcodes/ChangeLog: * riscv-opc.c: Likewise.
2023-11-23RISC-V: Add T-Head VECTOR vendor extension.Jin Ma1-0/+12
T-Head has a range of vendor-specific instructions ([2]). Therefore it makes sense to group them into smaller chunks in form of vendor extensions. This patch adds the "XTheadVector" extension, a collection of T-Head-specific vector instructions. The 'th' prefix and the "XTheadVector" extension are documented in a PR for the RISC-V toolchain conventions ([1]). Here are some things that need to be explained: The "XTheadVector" extension is not a custom-extension, but a non-standard non-conforming extension. The encoding space of the "TheadVector" instructions overlaps with those of the 'V' extension. This encoding space conflict is not on purpose, but the result of issues in the past that have been resolved since. Therefore, the "XTheadVector" extension and the 'V' extension are in conflict. [1] https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/19 [2] https://github.com/T-head-Semi/thead-extension-spec/releases/download/2.3.0/xthead-2023-11-10-2.3.0.pdf Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com> Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu> bfd/ChangeLog: * elfxx-riscv.c (riscv_parse_check_conflicts): The "XTheadVector" extension and the 'V' extension are in conflict. (riscv_multi_subset_supports): Likewise.. (riscv_multi_subset_supports_ext): Likewise. gas/ChangeLog: * doc/c-riscv.texi: * testsuite/gas/riscv/x-thead-vector-fail.d: New test. * testsuite/gas/riscv/x-thead-vector-fail.l: New test. * testsuite/gas/riscv/x-thead-vector.s: New test. include/ChangeLog: * opcode/riscv.h (enum riscv_insn_class):
2023-11-23Automatic date update in version.inGDB Administrator1-1/+1
2023-11-22LoongArch: fix internal error when as handling unsupported modifier.Lulu Cai1-3/+0
2023-11-22Automatic date update in version.inGDB Administrator1-1/+1
2023-11-21Fix: symbols eliminated by --gc-sections still trigger warnings for ↵Nick Clifton2-0/+15
gnu.warning.SYM PR 31067 * linker.c (_bfd_generic_link_add_one_symbol): When issuing a warning message, also display a message about the warning not being affected by garbage colleciton. * ld.texi (Special Sections): New entry in the linker manual. Describes how the .gnu.warning and .gnu.warning.SYM sections behave.
2023-11-21Automatic date update in version.inGDB Administrator1-1/+1
2023-11-20Automatic date update in version.inGDB Administrator1-1/+1
2023-11-19Automatic date update in version.inGDB Administrator1-1/+1
2023-11-18Automatic date update in version.inGDB Administrator1-1/+1
2023-11-17Fix read_ranges for 32-bit longJoseph Myers1-1/+1
bfd/dwarf2.c:read_ranges compares bfd_vma values against -1UL, which doesn't work correctly when long is 32-bit and bfd_vma is 64-bit (observed as "nm -l" being very slow for mingw64 host; probably causes issues on 32-bit hosts as well as IL32LLP64 cases such as mingw64). Fix by using (bfd_vma) -1 in place of -1UL, as done elsewhere.
2023-11-17LoongArch: Modify link_info.relax_pass from 3 to 2mengqinggang1-1/+1
The first pass handles R_LARCH_RELAX relocations, the second pass handles R_LARCH_ALIGN relocations.
2023-11-17LoongArch: Remove "elf_seg_map (info->output_bfd) == NULL" relaxation conditionmengqinggang1-4/+21
Previously the condition prevented shared objects from being relaxed. To remove the limitation, we need to update program header size and .eh_frame_hdr size before relaxation.
2023-11-17LoongArch: Multiple relax_trip in one relax_passmengqinggang1-3/+7
If deleting instructions in one relax_trip, set again to true to start the next relax_trip.
2023-11-17LoongArch: Directly delete relaxed instuctions in first relaxation passmengqinggang1-5/+7
Directly delete relaxed instuctions in first relaxation pass, not use R_LARCH_DELETE relocation. If not, the PC-relative offset may increase.
2023-11-17LoongArch: Fix ld --no-relax bugmengqinggang1-13/+6
When calling ld with --no-relax, pcalau12i + ld.d still can be relaxed. This patch fix this bug and pcalau12i + ld.d can be relaxed with --relax.
2023-11-17Automatic date update in version.inGDB Administrator1-1/+1
2023-11-16Automatic date update in version.inGDB Administrator1-1/+1
2023-11-15Finalized intl-update patchesArsen Arsenovi?7-250/+2375
* intl: Remove directory. Replaced with out-of-tree GNU gettext. * .gitignore: Add '/gettext*'. * configure.ac (host_libs): Replace intl with gettext. (hbaseargs, bbaseargs, baseargs): Split baseargs into {h,b}baseargs. (skip_barg): New flag. Skips appending current flag to bbaseargs. <library exemptions>: Exempt --with-libintl-{type,prefix} from target and build machine argument passing. * configure: Regenerate. * Makefile.def (host_modules): Replace intl module with gettext module. (configure-ld): Depend on configure-gettext. * Makefile.in: Regenerate. * src-release.sh: Remove references to the intl/ directory.
2023-11-15Automatic date update in version.inGDB Administrator1-1/+1
2023-11-14Automatic date update in version.inGDB Administrator1-1/+1
2023-11-13Automatic date update in version.inGDB Administrator1-1/+1
2023-11-12Automatic date update in version.inGDB Administrator1-1/+1
2023-11-11Automatic date update in version.inGDB Administrator1-1/+1
2023-11-10bfd, binutils: add gfx11 amdgpu architecturesSimon Marchi4-1/+20
Teach bfd and readelf about some recent gfx11 architectures. This code is taken from the rocgdb 5.7.x branch [1]. [1] https://github.com/rocm-Developer-Tools/rocgdb/tree/rocm-5.7.x bfd/ChangeLog: * archures.c (bfd_mach_amdgcn_gfx1100, bfd_mach_amdgcn_gfx1101, bfd_mach_amdgcn_gfx1102): New. * bfd-in2.h (bfd_mach_amdgcn_gfx1100, bfd_mach_amdgcn_gfx1101, bfd_mach_amdgcn_gfx1102): New. * cpu-amdgcn.c (arch_info_struct): Add entries for bfd_mach_amdgcn_gfx1100, bfd_mach_amdgcn_gfx1101, bfd_mach_amdgcn_gfx1102. binutils/ChangeLog: * readelf.c (decode_AMDGPU_machine_flags): Handle gfx1100, gfx1101, gfx1102. include/ChangeLog: * elf/amdgpu.h (EF_AMDGPU_MACH_AMDGCN_GFX1100, EF_AMDGPU_MACH_AMDGCN_GFX1101, EF_AMDGPU_MACH_AMDGCN_GFX1102): New. Change-Id: I95a8a62942e359781a1c9fa2079950fbcf2a78b8 Co-Authored-By: Laurent Morichetti <laurent.morichetti@amd.com> Cc: Lancelot Six <lancelot.six@amd.com>
2023-11-10Correct formatting errors in elf32-microblaze.cMichael J. Eager1-10/+10
Signed-off-by: Michael J. Eager <eager@eagercon.com>
2023-11-10MIPS: Change all E_MIPS_* to EF_MIPS_*Ying Huang2-114/+114
2023-11-10Add ability to change linker warning messages into errors when reporting ↵Nick Clifton3-11/+81
executable stacks and/or executable segments. include * bfdlink.h (struct bfd_link_info): Update descriptions of the 'execstack', 'noexecstack' and 'warn_execstack' fields. Add 'error_exectack' and 'warn_is_error_for_rwx_segments' fields. bfd * elf.c (assign_file_positions_except_relocs): Turn warnings about executable segments into errors if so requested. * elflink.c (bfd_elf_size_dynamic_sections): Turn warnings about executable stacks into errors if so requested. ld * ldlex.h (enum option_values): Add OPTION_ERROR_EXECSTACK, OPTION_NO_ERROR_EXECSTACK, OPTION_WARN_EXECSTACK_OBJECTS, OPTION_ERROR_RWX_SEGMENTS and OPTION_NO_ERROR_RWX_SEGMENTS. (struct ld_option): Add new long options. (parse_args): Parse new long options. (elf_static_list_options): Display the new options. * ld.texi: Document the new command line options. * configure.ac (error-execstack): New configuration option. (error-rwx-segments): New configuration option. * emultempl/elf.em (_before_parse): Initialse the new linkinfo fields. * NEWS: Mention the new features. * config.in: Regenerate. * configure: Regenerate. * testsuite/ld-elf/commonpage2.d: Disable errors for RWX segments and/or executable stacks. * testsuite/ld-elf/elf.exp: Likewise. * testsuite/ld-elf/header.d: Likewise. * testsuite/ld-elf/loadaddr1.d: Likewise. * testsuite/ld-elf/loadaddr2.d: Likewise. * testsuite/ld-elf/maxpage4.d: Likewise. * testsuite/ld-elf/nobits-1.d: Likewise. * testsuite/ld-elf/note-1.d: Likewise. * testsuite/ld-elf/orphan-10.d: Likewise. * testsuite/ld-elf/orphan-11.d: Likewise. * testsuite/ld-elf/orphan-12.d: Likewise. * testsuite/ld-elf/orphan-5.d: Likewise. * testsuite/ld-elf/orphan-7.d: Likewise. * testsuite/ld-elf/orphan-8.d: Likewise. * testsuite/ld-elf/orphan-9.d: Likewise. * testsuite/ld-elf/orphan-region.d: Likewise. * testsuite/ld-elf/orphan.d: Likewise. * testsuite/ld-elf/pr19539.d: Likewise. * testsuite/ld-elf/pr26256-1a.d: Likewise. * testsuite/ld-elf/pr26907.d: Likewise. * testsuite/ld-elf/pr28597.d: Likewise. * testsuite/ld-elf/retain2.d: Likewise. * testsuite/ld-elf/shared.exp: Likewise. * testsuite/ld-elf/size-1.d: Likewise. * testsuite/ld-elf/textaddr7.d: Likewise. * testsuite/ld-elf/warn1.d: Likewise. * testsuite/ld-elf/warn2.d: Likewise. * testsuite/ld-i386/discarded1.d: Likewise. * testsuite/ld-i386/pr19175.d: Likewise. * testsuite/ld-i386/pr19539.d: Likewise. * testsuite/ld-i386/pr23189.d: Likewise. * testsuite/ld-plugin/lto-3r.d: Likewise. * testsuite/ld-plugin/lto-5r.d: Likewise. * testsuite/ld-plugin/lto.exp: Likewise. * testsuite/ld-powerpc/ppc476-shared.d: Likewise. * testsuite/ld-powerpc/ppc476-shared2.d: Likewise. * testsuite/ld-powerpc/pr28827-2.d: Likewise. * testsuite/ld-s390/s390.exp: Likewise. * testsuite/ld-scripts/align2a.d: Likewise. * testsuite/ld-scripts/align2b.d: Likewise. * testsuite/ld-scripts/align5.d: Likewise. * testsuite/ld-scripts/alignof.exp: Likewise. * testsuite/ld-scripts/crossref.exp: Likewise. * testsuite/ld-scripts/defined2.d: Likewise. * testsuite/ld-scripts/defined3.d: Likewise. * testsuite/ld-scripts/defined5.d: Likewise. * testsuite/ld-scripts/pr14962.d: Likewise. * testsuite/ld-scripts/pr18963.d: Likewise. * testsuite/ld-scripts/pr20302.d: Likewise. * testsuite/ld-scripts/print-memory-usage.exp: Likewise. * testsuite/ld-scripts/rgn-at1.d: Likewise. * testsuite/ld-scripts/rgn-at10.d: Likewise. * testsuite/ld-scripts/rgn-at4.d: Likewise. * testsuite/ld-scripts/rgn-at6.d: Likewise. * testsuite/ld-scripts/rgn-at8.d: Likewise. * testsuite/ld-scripts/rgn-at9.d: Likewise. * testsuite/ld-scripts/rgn-over1.d: Likewise. * testsuite/ld-scripts/rgn-over2.d: Likewise. * testsuite/ld-scripts/rgn-over4.d: Likewise. * testsuite/ld-scripts/rgn-over5.d: Likewise. * testsuite/ld-scripts/rgn-over6.d: Likewise. * testsuite/ld-scripts/script.exp: Likewise. * testsuite/ld-scripts/sizeof.exp: Likewise. * testsuite/ld-scripts/sort-file.d: Likewise. * testsuite/ld-x86-64/discarded1.d: Likewise. * testsuite/ld-x86-64/pr19175.d: Likewise. * testsuite/ld-x86-64/pr19539a.d: Likewise. * testsuite/ld-x86-64/pr19539b.d: Likewise. * testsuite/ld-x86-64/pr23189.d: Likewise.
2023-11-10Automatic date update in version.inGDB Administrator1-1/+1
2023-11-09bfd: use less memory in string mergingMichael Matz1-0/+14
the offset-to-entry mappings are allocated in blocks, which may become a bit wasteful in case there are extremely many small input files or sections. This made it so that a large project (Qt5WebEngine) didn't build anymore on x86 32bit due to address space limits. It barely fit into address space before the new string merging, and then got pushed over the limit by this. So instead of leaving the waste reallocate the maps to their final size once known. Now the link barely fits again. bfd/ * merge.c (record_section): Reallocate offset maps to their final size.
2023-11-09ld: Avoid overflows in string mergingMichael Matz1-4/+8
as the bug report shows we had an overflow in the test if hash table resizing is needed. Reorder the expression to avoid that. There's still a bug somewhere in gracefully handling failure in resizing (e.g. out of memory), but this pushes the boundary for that occurring somewhen into the future and immediately helps the reporter. bfd/ PR ld/31009 * merge.c (NEEDS_RESIZE): New macro avoiding overflow. (sec_merge_maybe_resize): Use it. (sec_merge_hash_insert): Ditto.
2023-11-09bfd: aarch64: Avoid BTI stub for a PLT that has BTISzabolcs Nagy1-3/+14
We decide to emit BTI stubs based on the instruction at the target location. But PLT code is generated later than the stubs so we always read 0 which is not a valid BTI. Fix the logic to special case the PLT section: this is code the linker generates so we know when it will have BTI. This avoids BTI stubs in large executables where the PLTs have them already. An alternative is to never emit BTI stubs for PLTs, instead use BTI in the PLT if a library gets too big, however that may be more tricky given the ordering of PLT sizing and stub insertion. Related to bug 30957.
2023-11-09bfd: aarch64: Fix leaks in case of BTI stub reuseSzabolcs Nagy1-24/+32
BTI stub parameters were recomputed even if those were already set up. This is unnecessary work and leaks the symbol name that is allocated for the stub.
2023-11-09bfd: aarch64: Fix broken BTI stub PR30930Szabolcs Nagy1-2/+15
Input sections are grouped together that can use the same stub area (within reach) and these groups have a stable id. Stubs have a name generated from the stub group id and target symbol. When a relocation requires a stub with a name that already exists, the stub is reused instead of adding a new one. For an indirect branch stub another BTI stub may be inserted near the target to provide a BTI landing pad. The BTI stub can end up with the same stub group id and thus the same name as the indirect stub. This happens if the target symbol is within reach of the indirect branch stub. Then, due to the name collision, only a single stub was emmitted which branched to itself causing an infinite loop at runtime. A possible solution is to just name the BTI stubs differently, but since in the problematic case the indirect and BTI stub are in the same stub area, a better solution is to emit a single stub with a direct branch. The stub is still needed since the caller cannot reach the target directly and we also want a BTI landing pad in the stub in case other indirect stubs target the same symbol and thus need a BTI stub. In short we convert an indirect branch stub into a BTI stub when the target is within reach and has no BTI. It is a hassle to change the symbol of the stub so a BTI stub may end up with *_veneer instead of *_bti_veneer after the conversion, but this should not matter much. (Refactoring some of _bfd_aarch64_add_call_stub_entries would be useful but too much for this bug fix patch.) The same conversion to direct branch could be done even if the target did not need a BTI. The stub groups are fixed in the current logic so linking can fail if too many stubs are inserted and the section layout is changed too much, but this only happens in extreme cases that can be reasonably ignored. Because of this the target cannot go out of reach during stub insertion so the optimization is valid, but not implemented by this patch for the non-BTI case. Fixes bug 30930.
2023-11-09bfd: aarch64: Fix BTI stub optimization PR30957Szabolcs Nagy1-4/+3
The instruction was looked up in the wrong input file (file of branch source instead of branch target) when optimizing away BTI stubs in commit 5834f36d93cabf1a8bcc7dd7654141aed3d296bc bfd: aarch64: Optimize BTI stubs PR30076 This can cause adding BTI stubs when they are not necessary or removing them when they are (the latter is a correctness issue but it is very unlikely in practice). Fixes bug 30957.
2023-11-09Automatic date update in version.inGDB Administrator1-1/+1
2023-11-08ld: print branch fixups into the map file for ppc elf targetsClément Chigot1-3/+9
In a safety context, it could interesting to track the trampolines being generated, ensuring there are expected or not. bfd/ChangeLog: * elf32-ppc.c (ppc_elf_relax_section): Log branch fixups. ld/ChangeLog: * ld.texi (--print-map): Add new item about fixups.
2023-11-07Add minimal thread-safety to BFDTom Tromey7-55/+299
This patch provides some minimal thread-safety to BFD. The BFD client can request thread-safety by providing a lock and unlock function. The globals used during BFD creation (e.g., bfd_id_counter) are then locked, and the file descriptor cache is also locked. A function to clean up any thread-local data is now provided for BFD clients. * bfd-in2.h: Regenerate. * bfd.c (lock_fn, unlock_fn): New globals. (bfd_thread_init, bfd_thread_cleanup, bfd_lock, bfd_unlock): New functions. * cache.c (bfd_cache_lookup_worker): Use _bfd_open_file_unlocked. (cache_btell, cache_bseek, cache_bread, cache_bwrite): Lock and unlock. (cache_bclose): Add comment. (cache_bflush, cache_bstat, cache_bmmap): Lock and unlock. (_bfd_cache_init_unlocked): New function. (bfd_cache_init): Use it. Lock and unlock. (_bfd_cache_close_unlocked): New function. (bfd_cache_close, bfd_cache_close_all): Use it. Lock and unlock. (_bfd_open_file_unlocked): New function. (bfd_open_file): Use it. Lock and unlock. * doc/bfd.texi (BFD front end): Add Threading menu item. * libbfd.h: Regenerate. * opncls.c (_bfd_new_bfd): Lock and unlock. * po/bfd.pot: Regenerate.
2023-11-07Make various error-related globals thread-localTom Tromey8-36/+166
This changes bfd_error et al to be thread-local. * Makefile.in: Regenerate. * aclocal.m4: Include ax_tls.m4. * ax_tls.m4: New file. * bfd.c: (bfd_error, input_error, input_bfd, _bfd_error_buf): Now thread-local. (bfd_asprintf): Update docs. * config.in, configure: Regenerate. * configure.ac: Call AX_TLS. * po/bfd.pot: Regenerate.
2023-11-07Make _bfd_error_buf staticTom Tromey4-1197/+1364
This makes _bfd_error_buf static and adds a way to clear it. I felt that this made the subsequent patches a little cleaner. * bfd.c (_bfd_error_buf): Now static. (bfd_set_input_error): Use _bfd_clear_error_data. (_bfd_clear_error_data): New function. (bfd_init): Use _bfd_clear_error_data. * libbfd.h: Regenerate. * opncls.c (bfd_close_all_done): Use _bfd_clear_error_data. * po/bfd.pot: Regenerate.
2023-11-08Automatic date update in version.inGDB Administrator1-1/+1
2023-11-07RISC-V: Add support for XCValu extension in CV32E40PMary Bennett1-0/+5
Spec: https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest/instruction_set_extensions.html Contributors: Mary Bennett <mary.bennett@embecosm.com> Nandni Jamnadas <nandni.jamnadas@embecosm.com> Pietra Ferreira <pietra.ferreira@embecosm.com> Charlie Keaney Jessica Mills Craig Blackmore <craig.blackmore@embecosm.com> Simon Cook <simon.cook@embecosm.com> Jeremy Bennett <jeremy.bennett@embecosm.com> Helene Chelin <helene.chelin@embecosm.com> bfd/ChangeLog: * elfxx-riscv.c (riscv_multi_subset_supports): Added `xcvalu` instruction class. (riscv_multi_subset_supports_ext): Likewise. gas/ChangeLog: * config/tc-riscv.c (validate_riscv_insn): Added the necessary operands for the extension. (riscv_ip): Likewise. * doc/c-riscv.texi: Noted XCValu as an additional ISA extension for CORE-V. * testsuite/gas/riscv/cv-alu-boundaries.d: New test. * testsuite/gas/riscv/cv-alu-boundaries.l: New test. * testsuite/gas/riscv/cv-alu-boundaries.s: New test. * testsuite/gas/riscv/cv-alu-fail-march.d: New test. * testsuite/gas/riscv/cv-alu-fail-march.l: New test. * testsuite/gas/riscv/cv-alu-fail-march.s: New test. * testsuite/gas/riscv/cv-alu-fail-operand-01.d: New test. * testsuite/gas/riscv/cv-alu-fail-operand-01.l: New test. * testsuite/gas/riscv/cv-alu-fail-operand-01.s: New test. * testsuite/gas/riscv/cv-alu-fail-operand-02.d: New test. * testsuite/gas/riscv/cv-alu-fail-operand-02.l: New test. * testsuite/gas/riscv/cv-alu-fail-operand-02.s: New test. * testsuite/gas/riscv/cv-alu-fail-operand-03.d: New test. * testsuite/gas/riscv/cv-alu-fail-operand-03.l: New test. * testsuite/gas/riscv/cv-alu-fail-operand-03.s: New test. * testsuite/gas/riscv/cv-alu-fail-operand-04.d: New test. * testsuite/gas/riscv/cv-alu-fail-operand-04.l: New test. * testsuite/gas/riscv/cv-alu-fail-operand-04.s: New test. * testsuite/gas/riscv/cv-alu-fail-operand-05.d: New test. * testsuite/gas/riscv/cv-alu-fail-operand-05.l: New test. * testsuite/gas/riscv/cv-alu-fail-operand-05.s: New test. * testsuite/gas/riscv/cv-alu-fail-operand-06.d: New test. * testsuite/gas/riscv/cv-alu-fail-operand-06.l: New test. * testsuite/gas/riscv/cv-alu-fail-operand-06.s: New test. * testsuite/gas/riscv/cv-alu-fail-operand-07.d: New test. * testsuite/gas/riscv/cv-alu-fail-operand-07.l: New test. * testsuite/gas/riscv/cv-alu-fail-operand-07.s: New test. * testsuite/gas/riscv/cv-alu-insns.d: New test. * testsuite/gas/riscv/cv-alu-insns.s: New test. opcodes/ChangeLog: * riscv-dis.c (print_insn_args): Disassemble xcb operand. * riscv-opc.c: Defined the MASK and added XCValu instructions. include/ChangeLog: * opcode/riscv-opc.h: Added corresponding MATCH and MASK macros for XCValu. * opcode/riscv.h: Added corresponding EXTRACT and ENCODE macros for XCValu. (enum riscv_insn_class): Added the XCValu instruction class.
2023-11-07RISC-V: Add support for XCVmac extension in CV32E40PMary Bennett1-0/+5
Spec: https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest/instruction_set_extensions.html Contributors: Mary Bennett <mary.bennett@embecosm.com> Nandni Jamnadas <nandni.jamnadas@embecosm.com> Pietra Ferreira <pietra.ferreira@embecosm.com> Charlie Keaney Jessica Mills Craig Blackmore <craig.blackmore@embecosm.com> Simon Cook <simon.cook@embecosm.com> Jeremy Bennett <jeremy.bennett@embecosm.com> Helene Chelin <helene.chelin@embecosm.com> bfd/ChangeLog: * elfxx-riscv.c (riscv_multi_subset_supports): Added `xcvmac` instruction class. (riscv_multi_subset_supports_ext): Likewise. gas/ChangeLog: * config/tc-riscv.c (validate_riscv_insn): Added the necessary operands for the extension. (riscv_ip): Likewise. * doc/c-riscv.texi: Noted XCVmac as an additional ISA extension for CORE-V. * testsuite/gas/riscv/cv-mac-fail-march.d: New test. * testsuite/gas/riscv/cv-mac-fail-march.l: New test. * testsuite/gas/riscv/cv-mac-fail-march.s: New test. * testsuite/gas/riscv/cv-mac-fail-operand.d: New test. * testsuite/gas/riscv/cv-mac-fail-operand.l: New test. * testsuite/gas/riscv/cv-mac-fail-operand.s: New test. * testsuite/gas/riscv/cv-mac-insns.d: New test. * testsuite/gas/riscv/cv-mac-insns.s: New test. opcodes/ChangeLog: * riscv-dis.c (print_insn_args): Disassemble information with the EXTRACT macro implemented. * riscv-opc.c: Defined the MASK and added XCVmac instructions. include/ChangeLog: * opcode/riscv-opc.h: Added corresponding MATCH and MASK macros for XCVmac. * opcode/riscv.h: Added corresponding EXTRACT and ENCODE macros for uimm. (enum riscv_insn_class): Added the XCVmac instruction class.
2023-11-07Automatic date update in version.inGDB Administrator1-1/+1
2023-11-06RISC-V: Moved out linker internal relocations after R_RISCV_max.Nelson Chu5-108/+93
Just the lightest modifications about this, without any further checks and considering --emit-relocs. We will need to improve it in the future, but first do this to avoid conflicts between linker internal relocations and the new definition of psabi. For example, TLSDESC relocs. Passed riscv-gnu-toolchain regressions, so should be safe enough to commit. Co-authored-by: Tsukasa OI <research_trasio@irq.a4lg.com> bfd/ * reloc.c: Removed linker internal relocations. * bfd-in2.h: Regenerated. * libbfd.h: Regenerated. * elfnn-riscv.c: Defined R_RISCV_DELETE in include/elf/riscv.h. * elfxx-riscv.c (howto_table, howto_table_internal): Moved linker internal relocations from howto_table into howto_table_internal. (riscv_reloc_map): Removed linker internal relocations mapping. (riscv_elf_rtype_to_howto): Return howto of linker internal relocations from howto_table_internal. include/ * elf/riscv.h: Defined linker internal relocations after R_RISCV_max.
2023-11-06Automatic date update in version.inGDB Administrator1-1/+1
2023-11-05Automatic date update in version.inGDB Administrator1-1/+1
2023-11-04Automatic date update in version.inGDB Administrator1-1/+1
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2023-11-02Automatic date update in version.inGDB Administrator1-1/+1
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