Age | Commit message (Collapse) | Author | Files | Lines |
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LTO plugin support in plugin_maybe_claim wants to close the IR bfd
after replacing it with the recompiled object, but can't do so for
archive elements due to various pointers that access the archive bfd.
Thin archives have the same problem. They too cannot have their
element bfds closed.
PR ld/20241
bfd/
* archive.c (open_nested_file): Set my_archive.
* bfd.c (_bfd_default_error_handler <%B>): Exclude archive file name
for thin archives.
* bfdio.c (bfd_tell): Don't adjust origin for thin archives.
(bfd_seek): Likewise.
* bfdwin.c (bfd_get_file_window): Likewise.
* cache.c (cache_bmmap): Likewise.
(bfd_cache_lookup_worker): Don't look in my_archive for thin archives.
* mach-o.c (bfd_mach_o_follow_dsym): Don't open my_archive for
thin archives.
* plugin.c (try_claim): Likewise.
* xcofflink.c (xcoff_link_add_dynamic_symbols): Use import path of
file within thin archive, not the archive.
binutils/
* bucomm.c (bfd_get_archive_filename): Return file name within thin
archive.
ld/
* ldmain.c (add_archive_element): Just print file name of file within
thin archives.
* ldmisc.c (vfinfo): Likewise.
* plugin.c (plugin_object_p): Open file within thin archives.
(plugin_maybe_claim): Expand comment.
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Add the GOT base for R_386_GOT32/R_386_GOT32X relocations against IFUNC
symbols if there is no base register and disallow them for PIC.
bfd/
PR ld/20244
* elf32-i386.c (elf_i386_relocate_section): Add the .got.plt
section address for R_386_GOT32/R_386_GOT32X relocations against
IFUNC symbols if there is no base register and return error for
PIC.
ld/
PR ld/20244
* testsuite/ld-i386/i386.exp: Run pr20244-2a, pr20244-2b,
pr20244-2c and pr20244-2d.
* testsuite/ld-i386/no-plt.exp: Run pr20244-3a and pr20244-3b.
* testsuite/ld-i386/pr20244-2.s: New file.
* testsuite/ld-i386/pr20244-2a.d: Likewise.
* testsuite/ld-i386/pr20244-2b.d: Likewise.
* testsuite/ld-i386/pr20244-2c.d: Likewise.
* testsuite/ld-i386/pr20244-2d.d: Likewise.
* testsuite/ld-i386/pr20244-3a.c: Likewise.
* testsuite/ld-i386/pr20244-3b.S: Likewise.
* testsuite/ld-i386/pr20244-3c.S: Likewise.
* testsuite/ld-i386/pr20244-3d.S: Likewise.
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bfd/
* elf32-i386.c (elf_i386_relocate_section): Simplify IFUNC
GOT32 adjustment for static executables.
ld/
2016-06-13 H.J. Lu <hongjiu.lu@intel.com>
* testsuite/ld-i386/i386.exp: Run ifunc-1a and ifunc-1b.
* testsuite/ld-i386/ifunc-1a.c: New file.
* testsuite/ld-i386/ifunc-1b.S: Likewise.
* testsuite/ld-i386/ifunc-1c.S: Likewise.
* testsuite/ld-i386/ifunc-1d.S: Likewise.
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Complement:
commit b47468a6dbd1b54c44c2edc0f7db64a073d894ea
Author: Catherine Moore <clm@redhat.com>
Date: Mon May 6 15:25:45 2013 +0000
and the return of support for R_MIPS_PC32 there.
bfd/
* elf32-mips.c (elf_mips_gnu_pcrel32): Update comment.
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bfd/
2016-06-13 Cupertino Miranda <cmiranda@synospsy.com>
* elf32-arc.c (elf_arc_relocate_section): Fixed condition.
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- Correctly solved relocations on the .got header.
- This bug arrised from enabling RELRO (-z combreloc).
Because the .got and .got.plt sections were split in new linker
scripts the header is no longer part of sgotplt contents.
Changed the patch to sgot contents instead.
- Latest fix to .got header relocs.
bfd/
2016-06-13 Cupertino Miranda <cmiranda@synospsy.com>
* elf32-arc.c (elf_arc_finish_dynamic_sections): Changed.
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Fail safe for trying to reloc GOT and PLT on non dynamic linker. Fix
issue with dynamic relocs not being generated with -pie. Removed some
structures that were not being used. Fixed typo changing RELENT to
RELAENT. Fix for all SECTOFF relocations.
bfd/
2016-06-13 Cupertino Miranda <cmiranda@synospsy.com>
* elf32-arc.c (arc_local_data, arc_local_data): Removed.
(SECTSTART): Changed.
(elf_arc_relocate_section): Fixed mistake in PIE related
condition.
(elf_arc_size_dynamic_sections): Changed DT_RELENT to DT_RELAENT.
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bfd/
2016-06-13 Cupertino Miranda <cmiranda@synospsy.com>
* elf32-arc.c (elf32_arc_reloc_type_class): Defined function to
enable support for "-z combreloc" and DT_RELACOUNT.
(elf_backend_reloc_type_class): Likewise
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When relocating R_386_GOT32 in "op $0, bar@GOT", we shouldn't subtract
GOT base without a base register and we should disallow it without a
base register for PIC.
bfd/
PR ld/20244
* elf32-i386.c (elf_i386_relocate_section): When relocating
R_386_GOT32, return error without a base register for PIC and
subtract the .got.plt section address only with a base register.
ld/
PR ld/20244
* testsuite/ld-i386/i386.exp: Run pr20244-1a and pr20244-1b.
* testsuite/ld-i386/pr20244-1.s: New file.
* testsuite/ld-i386/pr20244-1a.d: Likewise.
* testsuite/ld-i386/pr20244-1b.d: Likewise.
* testsuite/ld-i386/pr20244-1c.d: Likewise.
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I noticed when writing _bfd_elf_strtab_save/restore that size_t would
be better than bfd_size_type for a number of things in elf-strtab.c.
Using a 64-bit bfd_size_type on a 32-bit host doesn't make much sense
for array sizes and indices.
* elf-strtab.c (struct strtab_save): Use size_t for "size".
(struct elf_strtab_hash): Likewise for "size" and "alloced".
(_bfd_elf_strtab_init): Formatting.
(_bfd_elf_strtab_add): Return size_t rather than bfd_size_type.
(_bfd_elf_strtab_addref): Take size_t idx param.
(_bfd_elf_strtab_delref, _bfd_elf_strtab_refcount): Likewise.
(_bfd_elf_strtab_offset): Likewise.
(_bfd_elf_strtab_clear_all_refs): Use size_t idx.
(_bfd_elf_strtab_save): Use size_t "idx" and "size" vars.
(_bfd_elf_strtab_restore, _bfd_elf_strtab_emit): Similarly.
(_bfd_elf_strtab_finalize): Similarly.
* elf-bfd.h (_bfd_elf_strtab_add): Update prototypes.
(_bfd_elf_strtab_addref, _bfd_elf_strtab_delref): Likewise.
(_bfd_elf_strtab_refcount, _bfd_elf_strtab_offset): Likewise.
* elf.c (bfd_elf_get_elf_syms): Calculate symbol buffer size
using bfd_size_type.
(bfd_section_from_shdr): Delete amt.
(_bfd_elf_init_reloc_shdr): Likewise.
(_bfd_elf_link_assign_sym_version): Likewise.
(assign_section_numbers): Use size_t reloc_count.
* elflink.c (struct elf_symbuf_head): Use size_t "count".
(bfd_elf_link_record_dynamic_symbol): Use size_t for some vars.
(elf_link_is_defined_archive_symbol): Likewise.
(elf_add_dt_needed_tag): Likewise.
(elf_finalize_dynstr): Likewise.
(elf_link_add_object_symbols): Likewise.
(bfd_elf_size_dynamic_sections): Likewise.
(elf_create_symbuf): Similarly.
(bfd_elf_match_symbols_in_sections): Likewise.
(elf_link_swap_symbols_out): Likewise.
(elf_link_check_versioned_symbol): Likewise.
(bfd_elf_gc_record_vtinherit): Likewise.
(bfd_elf_gc_common_finalize_got_offsets): Likewise.
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This patch fixes an edge case in linker relaxation that causes symbol
values to be computed incorrectly in the presence of align directives
in input source code.
bfd/
* elf32-avr.c (elf32_avr_relax_delete_bytes): Adjust syms
and relocs only if shrinking occurred.
ld/
* testsuite/ld-avr/avr-prop-5.d: New.
* testsuite/ld-avr/avr-prop-5.s: New.
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We can generate i386 TLS code sequences for general and local dynamic
models without PLT, which uses indirect call via GOT:
call *___tls_get_addr@GOT(%reg)
where EBX register isn't required as GOT base, instead of direct call:
call ___tls_get_addr[@PLT]
which requires EBX register as GOT base.
Since direct call is 4-byte long and indirect call, is 5-byte long, the
extra one byte must be handled properly.
For general dynamic model, 7-byte lea instruction before call instruction
is replaced by 6-byte one to make room for indirect call. For local
dynamic model, we simply use 5-byte indirect call.
TLS linker optimization is updated to recognize new instruction patterns.
For local dynamic model to local exec model transition, we generate
a 6-byte lea instruction as nop, instead of a 1-byte nop plus a 4-byte
lea instruction. Since linker may convert
call ___tls_get_addr[@PLT]
to
addr32 call ____tls_get_addr
when producing static executable, both patterns are recognized.
bfd/
* elf64-i386.c (elf_i386_link_hash_entry): Add tls_get_addr.
(elf_i386_link_hash_newfunc): Initialize tls_get_addr to 2.
(elf_i386_check_tls_transition): Check indirect call and direct
call with the addr32 prefix for general and local dynamic models.
Set the tls_get_addr feild.
(elf_i386_convert_load_reloc): Always use addr32 prefix for
indirect ___tls_get_addr call via GOT.
(elf_i386_relocate_section): Handle GD->LE, GD->IE and LD->LE
transitions with indirect call and direct call with the addr32
prefix.
ld/
* testsuite/ld-i386/i386.exp: Run libtlspic2.so, tlsbin2,
tlsgd3, tlsld2, tlsgd4, tlspie3a, tlspie3b and tlspie3c.
* testsuite/ld-i386/pass.out: New file.
* testsuite/ld-i386/tls-def1.c: Likewise.
* testsuite/ld-i386/tls-gd1.S: Likewise.
* testsuite/ld-i386/tls-ld1.S: Likewise.
* testsuite/ld-i386/tls-main1.c: Likewise.
* testsuite/ld-i386/tls.exp: Likewise.
* testsuite/ld-i386/tlsbin2-nacl.rd: Likewise.
* testsuite/ld-i386/tlsbin2.dd: Likewise.
* testsuite/ld-i386/tlsbin2.rd: Likewise.
* testsuite/ld-i386/tlsbin2.sd: Likewise.
* testsuite/ld-i386/tlsbin2.td: Likewise.
* testsuite/ld-i386/tlsbinpic2.s: Likewise.
* testsuite/ld-i386/tlsgd3.dd: Likewise.
* testsuite/ld-i386/tlsgd3.s: Likewise.
* testsuite/ld-i386/tlsgd4.d: Likewise.
* testsuite/ld-i386/tlsgd4.s: Likewise.
* testsuite/ld-i386/tlsld2.s: Likewise.
* testsuite/ld-i386/tlspic2-nacl.rd: Likewise.
* testsuite/ld-i386/tlspic2.dd: Likewise.
* testsuite/ld-i386/tlspic2.rd: Likewise.
* testsuite/ld-i386/tlspic2.sd: Likewise.
* testsuite/ld-i386/tlspic2.td: Likewise.
* testsuite/ld-i386/tlspic3.s: Likewise.
* testsuite/ld-i386/tlspie3.s: Likewise.
* testsuite/ld-i386/tlspie3a.d: Likewise.
* testsuite/ld-i386/tlspie3b.d: Likewise.
* testsuite/ld-i386/tlspie3c.d: Likewise.
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The only non-comment fix here is in the code writing out the 3 fixed
.got.plt entries - it mistakenly put a 64-bit 0 at offsets 8 and 12
instead of 8 and 16.
bfd/ChangeLog:
* elf32-s390.c (elf_s390_finish_dynamic_symbol): Fix comment.
* elf64-s390.c (elf_s390x_plt_entry): Fix comment.
(elf_s390_relocate_section): Fix comment.
(elf_s390_finish_dynamic_sections): Fix initialization of fixed
.got.plt entries.
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Embedding the .plt section in another revealed a bug in the way the
larl operand of the first magic plt entry is being calculated. Fixed
with the attached patch.
bfd/ChangeLog:
* elf64-s390.c (elf_s390_finish_dynamic_sections): Subtract plt
section offset when calculation the larl operand in the first PLT
entry.
ld/ChangeLog:
* testsuite/ld-s390/pltoffset-1.dd: New test.
* testsuite/ld-s390/pltoffset-1.ld: New test.
* testsuite/ld-s390/pltoffset-1.s: New test.
* testsuite/ld-s390/s390.exp: Run new test.
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VLE is an encoding, not a particular processor architecture, so it
isn't really proper to select insns based on PPC_OPCODE_VLE. For
example
{"evaddw", VX (4, 512), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
{"vaddubs", VX (4, 512), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
shows two insns that have the same encoding, both available with VLE.
Enabling both with VLE means we can't disassemble the second variant
even if -Maltivec is given rather than -Mspe. Also, we don't check
user assembly against the processor type as well as we could.
Another problem is that when using the VLE encoding, insns from the
main ppc opcode table are not available, except those using opcode 4
and 31. Correcting this revealed two errors in the ld testsuite,
use of "nop" and "rfmci" when -mvle.
This patch fixes those problems in the opcode table, and removes
PPCNONE. I find a plain 0 distracts less from other values.
In addition, I've implemented code to recognize some machine values
from the apuinfo note present in ppc32 objects. It's not a complete
disambiguation since we're lacking info to detect newer chips, but
what we have should help with disassembly.
include/
* elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
PPC_APUINFO_VLE: Define.
opcodes/
* ppc-dis.c (ppc_opts): Delete extraneous parentheses. Default
cpu for "vle" to e500.
* ppc-opc.c (ALLOW8_SPRG): Remove PPC_OPCODE_VLE.
(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW, DCBT_EO): Likewise.
(PPCNONE): Delete, substitute throughout.
(powerpc_opcodes): Remove PPCVLE from "flags". Add to "deprecated"
except for major opcode 4 and 31.
(vle_opcodes <se_rfmci>): Add PPCRFMCI to flags.
bfd/
* cpu-powerpc.c (powerpc_compatible): Allow bfd_mach_ppc_vle entry
to match other 32-bit archs.
* elf32-ppc.c (_bfd_elf_ppc_set_arch): New function.
(ppc_elf_object_p): Call it.
(ppc_elf_special_sections): Use APUINFO_SECTION_NAME. Fix
overlong line.
(APUINFO_SECTION_NAME, APUINFO_LABEL): Don't define here.
* elf64-ppc.c (ppc64_elf_object_p): Call _bfd_elf_ppc_set_arch.
* bfd-in.h (_bfd_elf_ppc_at_tls_transform,
_bfd_elf_ppc_at_tprel_transform): Move to..
* elf-bfd.h: ..here.
(_bfd_elf_ppc_set_arch): Declare.
* bfd-in2.h: Regenerate.
gas/
* config/tc-ppc.c (PPC_APUINFO_ISEL, PPC_APUINFO_PMR,
PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE,
PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK, PPC_APUINFO_VLE): Don't define.
(ppc_setup_opcodes): Check vle disables powerpc_opcodes overridden
by vle_opcodes, and that vle flag doesn't enable opcodes. Don't
add vle_opcodes twice.
(ppc_cleanup): Use APUINFO_SECTION_NAME and APUINFO_LABEL.
ld/
* testsuite/ld-powerpc/apuinfo1.s: Delete nop.
* testsuite/ld-powerpc/apuinfo-vle2.s: New.
* testsuite/ld-powerpc/powerpc.exp: Use apuinfo-vle2.s.
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We can generate x86-64 TLS code sequences for general and local dynamic
models without PLT, which uses indirect call via GOT:
call *__tls_get_addr@GOTPCREL(%rip)
instead of direct call:
call __tls_get_addr[@PLT]
Since direct call is 4-byte long and indirect call, is 5-byte long, the
extra one byte must be handled properly.
For general dynamic model, one 0x66 prefix before call instruction is
removed to make room for indirect call. For local dynamic model, we
simply use 5-byte indirect call.
TLS linker optimization is updated to recognize new instruction patterns.
For local dynamic model to local exec model transition, we generate
4 0x66 prefixes, instead of 3, before mov instruction in 64-bit and
generate a 5-byte nop, instead of 4-byte, before mov instruction in
32-bit. Since linker may convert
call *__tls_get_addr@GOTPCREL(%rip)
to
addr32 call __tls_get_addr
when producing static executable, both patterns are recognized.
bfd/
* elf64-x86-64.c (elf_x86_64_link_hash_entry): Add tls_get_addr.
(elf_x86_64_link_hash_newfunc): Initialize tls_get_addr to 2.
(elf_x86_64_check_tls_transition): Check indirect call and
direct call with the addr32 prefix for general and local dynamic
models. Set the tls_get_addr feild.
(elf_x86_64_convert_load_reloc): Always use addr32 prefix for
indirect __tls_get_addr call via GOT.
(elf_x86_64_relocate_section): Handle GD->LE, GD->IE and LD->LE
transitions with indirect call and direct call with the addr32
prefix.
ld/
* testsuite/ld-x86-64/pass.out: New file.
* testsuite/ld-x86-64/tls-def1.c: Likewise.
* testsuite/ld-x86-64/tls-gd1.S: Likewise.
* testsuite/ld-x86-64/tls-ld1.S: Likewise.
* testsuite/ld-x86-64/tls-main1.c: Likewise.
* testsuite/ld-x86-64/tls.exp: Likewise.
* testsuite/ld-x86-64/tlsbin2-nacl.rd: Likewise.
* testsuite/ld-x86-64/tlsbin2.dd: Likewise.
* testsuite/ld-x86-64/tlsbin2.rd: Likewise.
* testsuite/ld-x86-64/tlsbin2.sd: Likewise.
* testsuite/ld-x86-64/tlsbin2.td: Likewise.
* testsuite/ld-x86-64/tlsbinpic2.s: Likewise.
* testsuite/ld-x86-64/tlsgd10.dd: Likewise.
* testsuite/ld-x86-64/tlsgd10.s: Likewise.
* testsuite/ld-x86-64/tlsgd11.dd: Likewise.
* testsuite/ld-x86-64/tlsgd11.s: Likewise.
* testsuite/ld-x86-64/tlsgd12.d: Likewise.
* testsuite/ld-x86-64/tlsgd12.s: Likewise.
* testsuite/ld-x86-64/tlsgd13.d: Likewise.
* testsuite/ld-x86-64/tlsgd13.s: Likewise.
* testsuite/ld-x86-64/tlsgd14.dd: Likewise.
* testsuite/ld-x86-64/tlsgd14.s: Likewise.
* testsuite/ld-x86-64/tlsgd5c.s: Likewise.
* testsuite/ld-x86-64/tlsgd6c.s: Likewise.
* testsuite/ld-x86-64/tlsgd9.dd: Likewise.
* testsuite/ld-x86-64/tlsgd9.s: Likewise.
* testsuite/ld-x86-64/tlsld4.dd: Likewise.
* testsuite/ld-x86-64/tlsld4.s: Likewise.
* testsuite/ld-x86-64/tlsld5.dd: Likewise.
* testsuite/ld-x86-64/tlsld5.s: Likewise.
* testsuite/ld-x86-64/tlsld6.dd: Likewise.
* testsuite/ld-x86-64/tlsld6.s: Likewise.
* testsuite/ld-x86-64/tlspic2-nacl.rd: Likewise.
* testsuite/ld-x86-64/tlspic2.dd: Likewise.
* testsuite/ld-x86-64/tlspic2.rd: Likewise.
* testsuite/ld-x86-64/tlspic2.sd: Likewise.
* testsuite/ld-x86-64/tlspic2.td: Likewise.
* testsuite/ld-x86-64/tlspic3.s: Likewise.
* testsuite/ld-x86-64/tlspie2.s: Likewise.
* testsuite/ld-x86-64/tlspie2a.d: Likewise.
* testsuite/ld-x86-64/tlspie2b.d: Likewise.
* testsuite/ld-x86-64/tlspie2c.d: Likewise.
* testsuite/ld-x86-64/tlsgd5.dd: Updated.
* testsuite/ld-x86-64/tlsgd6.dd: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run libtlspic2.so, tlsbin2,
tlsgd5b, tlsgd6b, tlsld4, tlsld5, tlsld6, tlsgd9, tlsgd10,
tlsgd11, tlsgd14, tlsgd12, tlsgd13, tlspie2a, tlspie2b and
tlspie2c.
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bfd/
* coff-z8k.c (extra_case): Fix range check for R_JR relocation.
ld/
* ld/testsuite/ld-z8k/0filler.s: New file.
* ld/testsuite/ld-z8k/branch-target.s: New file.
* ld/testsuite/ld-z8k/branch-target2.s: New file.
* ld/testsuite/ld-z8k/calr-back-8001.d: New file.
* ld/testsuite/ld-z8k/calr-back-8002.d: New file.
* ld/testsuite/ld-z8k/calr-back-fail-8001.d: New file.
* ld/testsuite/ld-z8k/calr-back-fail-8002.d: New file.
* ld/testsuite/ld-z8k/calr-forw-8001.d: New file.
* ld/testsuite/ld-z8k/calr-forw-8002.d: New file.
* ld/testsuite/ld-z8k/calr-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/calr-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/calr-opcode.s: New file.
* ld/testsuite/ld-z8k/dbjnz-forw-8001.d: New file.
* ld/testsuite/ld-z8k/dbjnz-forw-8002.d: New file.
* ld/testsuite/ld-z8k/dbjnz-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/dbjnz-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/dbjnz-opcode.s: New file.
* ld/testsuite/ld-z8k/djnz-back-8001.d: New file.
* ld/testsuite/ld-z8k/djnz-back-8002.d: New file.
* ld/testsuite/ld-z8k/djnz-back-fail-8001.d: New file.
* ld/testsuite/ld-z8k/djnz-back-fail-8002.d: New file.
* ld/testsuite/ld-z8k/djnz-forw-8001.d: New file.
* ld/testsuite/ld-z8k/djnz-forw-8002.d: New file.
* ld/testsuite/ld-z8k/djnz-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/djnz-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/djnz-opcode.s: New file.
* ld/testsuite/ld-z8k/filler.s: New file.
* ld/testsuite/ld-z8k/jr-back-8001.d: New file.
* ld/testsuite/ld-z8k/jr-back-8002.d: New file.
* ld/testsuite/ld-z8k/jr-back-fail-8001.d: New file.
* ld/testsuite/ld-z8k/jr-back-fail-8002.d: New file.
* ld/testsuite/ld-z8k/jr-forw-8001.d: New file.
* ld/testsuite/ld-z8k/jr-forw-8002.d: New file.
* ld/testsuite/ld-z8k/jr-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/jr-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/jr-opcode.s: New file.
* ld/testsuite/ld-z8k/ldr-back-8001.d: New file.
* ld/testsuite/ld-z8k/ldr-back-8002.d: New file.
* ld/testsuite/ld-z8k/ldr-back-fail-8001.d: New file.
* ld/testsuite/ld-z8k/ldr-back-fail-8002.d: New file.
* ld/testsuite/ld-z8k/ldr-forw-8001.d: New file.
* ld/testsuite/ld-z8k/ldr-forw-8002.d: New file.
* ld/testsuite/ld-z8k/ldr-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/ldr-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/ldr-opcode.s: New file.
* ld/testsuite/ld-z8k/ldrb-forw-8001.d: New file.
* ld/testsuite/ld-z8k/ldrb-forw-8002.d: New file.
* ld/testsuite/ld-z8k/ldrb-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/ldrb-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/ldrb-opcode.s: New file.
* ld/testsuite/ld-z8k/ldrb-opcode2.s: New file.
* ld/testsuite/ld-z8k/other-file.s: New file.
* ld/testsuite/ld-z8k/reloc.dd: New file.
* ld/testsuite/ld-z8k/reloc.ld: New file.
* ld/testsuite/ld-z8k/relocseg.dd: New file.
* ld/testsuite/ld-z8k/relocseg.ld: New file.
* ld/testsuite/ld-z8k/relocseg1.dd: New file.
* ld/testsuite/ld-z8k/test-ld.sh: New file.
* ld/testsuite/ld-z8k/this-file.s: New file.
* ld/testsuite/ld-z8k/z8k.exp: New file.
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match any ARM architecture.
PR target/20088
* cpu-arm.c (processors): Add "arm_any" type to match any ARM
architecture.
(arch_info_struct): Likewise.
(architectures): Likewise.
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bfd * config.bfd: Replace -uclibc with *.
gas * configure.tgt: Replace -uclibc with *.
ld * configure.tgt: Replace -uclibc with *.
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The 0x66 prefix is data16, not data32 in 64-bit.
* elf64-x86-64.c: Replace data32 with data16 in comments.
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This reverts the pr16467 change, which was incorrect due to faulty
analysis of the pr16467 testcase. The failure was not due to a
mismatch in symbol type (ifunc/non-ifunc) but due to a symbol loop
being set up.
See https://sourceware.org/ml/binutils/2016-06/msg00013.html for some
rambling on versioned symbols and ELF shared library symbol overriding
that explain this patch.
bfd/
PR ld/20159
PR ld/16467
* elflink.c (_bfd_elf_merge_symbol): Revert PR16467 change.
(_bfd_elf_add_default_symbol): Don't indirect to/from defined
symbol given a version by a script different to the version
of the symbol being added.
(elf_link_add_object_symbols): Use _bfd_elf_strtab_save and
_bfd_elf_strtab_restore. Don't fudge dynstr references.
* elf-strtab.c (_bfd_elf_strtab_restore_size): Delete.
(struct strtab_save): New.
(_bfd_elf_strtab_save, _bfd_elf_strtab_restore): New functions.
* elf-bfd.h (_bfd_elf_strtab_restore_size): Delete.
(_bfd_elf_strtab_save, _bfd_elf_strtab_restore): Declare.
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opcodes/ChangeLog:
2016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* nds32-asm.h: Add extern "C".
* sh-opc.h: Likewise.
bfd/ChangeLog:
2016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* elf32-hppa.h: Add extern "C".
* elf32-nds32.h: Likewise.
* elf32-tic6x.h: Likewise.
include/ChangeLog:
2016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* elf/mips.h: Likewise.
* elf/sh.h: Likewise.
* opcode/d10v.h: Likewise.
* opcode/d30v.h: Likewise.
* opcode/ia64.h: Likewise.
* opcode/mips.h: Likewise.
* opcode/ppc.h: Likewise.
* opcode/sparc.h: Likewise.
* opcode/tic6x.h: Likewise.
* opcode/v850.h: Likewise.
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* po/sr.po: New Serbian translation.
* configure.ac (ALL_LINGUAS): Add sr.
* configure: Regenerate.
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Fix internal errors like:
ld: BFD (GNU Binutils) 2.26.51.20160526 internal error, aborting at .../bfd/elfxx-mips.c:10278 in _bfd_mips_elf_relocate_section
ld: Please report this bug.
triggered by the `bfd_reloc_outofrange' condition on branch relocations.
bfd/
* elfxx-mips.c (b_reloc_p): New function.
(_bfd_mips_elf_relocate_section) <bfd_reloc_outofrange>: Handle
branch relocations.
ld/
* testsuite/ld-mips-elf/unaligned-branch.d: New test.
* testsuite/ld-mips-elf/unaligned-branch.s: New test source.
* testsuite/ld-mips-elf/unaligned-text.s: New test source.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
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The original MIPS SVR4 psABI defines the calculation for the R_MIPS_26
relocation in a complex way, as follows[1]:
Name Value Field Symbol Calculation
R_MIPS_26 4 T-targ26 local (((A << 2) | \
(P & 0xf0000000)) + S) >> 2
4 T-targ26 external (sign-extend(A << 2) + S) >> 2
This is further clarified, by correcting typos (already applied in the
excerpt above) in the 64-bit psABI extension[2]. A note is included in
both documents to specify that for the purpose of relocation processing
a local symbol is one with binding STB_LOCAL and type STT_SECTION, and
otherwise, a symbol is external.
We have both calculations implemented for the R_MIPS_26 relocation, and
by extension also for the R_MIPS16_26 and R_MICROMIPS_26_S1 relocations,
from now on collectively called jump relocations. However our code uses
a different condition to tell local and external symbols apart, that is
it only checks for the STB_LOCAL binding and ignores the symbol type,
however for REL relocations only. The external calculation is used for
all RELA jump relocations.
In reality the difference matters for jump relocations referring local
MIPS16 and, as from recent commit 44d3da233815 ("MIPS/GAS: Treat local
jump relocs the same no matter if REL or RELA"), also local microMIPS
symbols. Such relocations are not converted to refer to corresponding
section symbols instead and retain the original local symbol reference.
It can be inferred from the relocation calculation definitions that the
addend is effectively unsigned for the local case and explicitly signed
for the external case. With the REL relocation format it makes sense
given the limited range provided for by the field being relocated: the
use of an unsigned addend expands the range by one bit for the local
case, because a negative offset from a section symbol makes no sense,
and any usable negative offset from the original local symbol will have
worked out positive if converted to a section-relative reference. In
the external case a signed addend gives more flexibility as offsets both
negative and positive can be used with a symbol. Any such offsets will
typically have a small value.
The inclusion of the (P & 0xf0000000) component, ORed in the calculation
in the local case, seems questionable as bits 31:28 are not included in
the relocatable field and are masked out as the relocation is applied.
Their value is therefore irrelevant for output processing, the relocated
field ends up the same regardless of their value. They could be used
for overflow detection, however this is precluded by adding them to bits
31:28 of the symbol referred, as the sum will not correspond to the
value calculated by the processor at run time whenever bits 31:28 of the
symbol referred are not all zeros, even though it is valid as long they
are the same as bits 31:28 of P.
We deal with this problem by ignoring any overflow resulting from the
local calculation. This however makes us miss genuine overflow cases,
where 31:28 of the symbol referred are different from bits 31:28 of P,
and non-functional code is produced.
Given the situation, for the purpose of overflow detection we can change
our code to follow the original psABI and only treat the in-place addend
as unsigned in the section symbol case, permitting jumps to offsets
128MiB and above into section. Sections so large may be uncommon, but
still a reasonable use case. On the other hand such large offsets from
regular local symbols are not expected and it makes sense to support
(possibly small) negative offsets instead, also in consistency with what
we do for global symbols.
Drop the (P & 0xf0000000) component then, treat the addend as signed
with local non-section symbols and also detect an overflow in the result
of such calculation with local symbols. NB it does not affect the value
computed for the relocatable field, it only affects overflow detection.
References:
[1] "SYSTEM V APPLICATION BINARY INTERFACE, MIPS RISC Processor
Supplement, 3rd Edition", Figure 4-11: "Relocation Types", p. 4-19
<http://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf>
[2] "64-bit ELF Object File Specification, Draft Version 2.5", Table 32
"Relocation Types", p. 45
<http://techpubs.sgi.com/library/manuals/4000/007-4658-001/pdf/007-4658-001.pdf>
bfd/
* elfxx-mips.c (mips_elf_calculate_relocation): <R_MIPS16_26>
<R_MIPS_26, R_MICROMIPS_26_S1>: Drop the region bits of the
reloc location from calculation, treat the addend as signed with
local non-section symbols and enable overflow detection.
ld/
* testsuite/ld-mips-elf/jal-global-overflow-0.d: New test.
* testsuite/ld-mips-elf/jal-global-overflow-1.d: New test.
* testsuite/ld-mips-elf/jal-local-overflow-0.d: New test.
* testsuite/ld-mips-elf/jal-local-overflow-1.d: New test.
* testsuite/ld-mips-elf/jal-global-overflow.s: New test source.
* testsuite/ld-mips-elf/jal-local-overflow.s: New test source.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
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The ldmain.c implementation of these linker callback functions always
return true, so any code handling a false return is dead. What's
more, some of the bfd backends abort if ever a false return is seen,
and there seems to be some confusion in gdb's compile-object-load.c.
The return value was never meant to be "oh yes, a multiple_definition
error occurred", but rather "out of memory or other catastrophic
failure".
This patch removes the status return on the callbacks that always
return true. I kept the return status for "notice" because that one
does happen to need to return "out of memory".
include/
* bfdlink.h (struct bfd_link_callbacks): Update comments.
Return void from multiple_definition, multiple_common,
add_to_set, constructor, warning, undefined_symbol,
reloc_overflow, reloc_dangerous and unattached_reloc.
bfd/
* aoutx.h: Adjust linker callback calls throughout file,
removing dead code.
* bout.c: Likewise.
* coff-alpha.c: Likewise.
* coff-arm.c: Likewise.
* coff-h8300.c: Likewise.
* coff-h8500.c: Likewise.
* coff-i960.c: Likewise.
* coff-mcore.c: Likewise.
* coff-mips.c: Likewise.
* coff-ppc.c: Likewise.
* coff-rs6000.c: Likewise.
* coff-sh.c: Likewise.
* coff-tic80.c: Likewise.
* coff-w65.c: Likewise.
* coff-z80.c: Likewise.
* coff-z8k.c: Likewise.
* coff64-rs6000.c: Likewise.
* cofflink.c: Likewise.
* ecoff.c: Likewise.
* elf-bfd.h: Likewise.
* elf-m10200.c: Likewise.
* elf-m10300.c: Likewise.
* elf32-arc.c: Likewise.
* elf32-arm.c: Likewise.
* elf32-avr.c: Likewise.
* elf32-bfin.c: Likewise.
* elf32-cr16.c: Likewise.
* elf32-cr16c.c: Likewise.
* elf32-cris.c: Likewise.
* elf32-crx.c: Likewise.
* elf32-d10v.c: Likewise.
* elf32-epiphany.c: Likewise.
* elf32-fr30.c: Likewise.
* elf32-frv.c: Likewise.
* elf32-ft32.c: Likewise.
* elf32-h8300.c: Likewise.
* elf32-hppa.c: Likewise.
* elf32-i370.c: Likewise.
* elf32-i386.c: Likewise.
* elf32-i860.c: Likewise.
* elf32-ip2k.c: Likewise.
* elf32-iq2000.c: Likewise.
* elf32-lm32.c: Likewise.
* elf32-m32c.c: Likewise.
* elf32-m32r.c: Likewise.
* elf32-m68hc1x.c: Likewise.
* elf32-m68k.c: Likewise.
* elf32-mep.c: Likewise.
* elf32-metag.c: Likewise.
* elf32-microblaze.c: Likewise.
* elf32-moxie.c: Likewise.
* elf32-msp430.c: Likewise.
* elf32-mt.c: Likewise.
* elf32-nds32.c: Likewise.
* elf32-nios2.c: Likewise.
* elf32-or1k.c: Likewise.
* elf32-ppc.c: Likewise.
* elf32-s390.c: Likewise.
* elf32-score.c: Likewise.
* elf32-score7.c: Likewise.
* elf32-sh.c: Likewise.
* elf32-sh64.c: Likewise.
* elf32-spu.c: Likewise.
* elf32-tic6x.c: Likewise.
* elf32-tilepro.c: Likewise.
* elf32-v850.c: Likewise.
* elf32-vax.c: Likewise.
* elf32-visium.c: Likewise.
* elf32-xstormy16.c: Likewise.
* elf32-xtensa.c: Likewise.
* elf64-alpha.c: Likewise.
* elf64-hppa.c: Likewise.
* elf64-ia64-vms.c: Likewise.
* elf64-mmix.c: Likewise.
* elf64-ppc.c: Likewise.
* elf64-s390.c: Likewise.
* elf64-sh64.c: Likewise.
* elf64-x86-64.c: Likewise.
* elflink.c: Likewise.
* elfnn-aarch64.c: Likewise.
* elfnn-ia64.c: Likewise.
* elfxx-mips.c: Likewise.
* elfxx-sparc.c: Likewise.
* elfxx-tilegx.c: Likewise.
* linker.c: Likewise.
* pdp11.c: Likewise.
* pe-mips.c: Likewise.
* reloc.c: Likewise.
* reloc16.c: Likewise.
* simple.c: Likewise.
* vms-alpha.c: Likewise.
* xcofflink.c: Likewise.
* elf32-rl78.c (get_symbol_value, get_romstart, get_ramstart): Delete
status param. Adjust calls to these and linker callbacks throughout.
* elf32-rx.c: (get_symbol_value, get_gp, get_romstart,
get_ramstart): Delete status param. Adjust calls to these and
linker callbacks throughout.
ld/
* ldmain.c (multiple_definition, multiple_common, add_to_set,
constructor_callback, warning_callback, undefined_symbol,
reloc_overflow, reloc_dangerous, unattached_reloc): Return void.
* emultempl/elf32.em: Adjust callback calls.
gdb/
* compile/compile-object-load.c (link_callbacks_multiple_definition,
link_callbacks_warning, link_callbacks_undefined_symbol,
link_callbacks_undefined_symbol, link_callbacks_reloc_overflow,
link_callbacks_reloc_dangerous,
link_callbacks_unattached_reloc): Return void.
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On RELA targets the addend can affect JALX target's alignment, so only
verify it once the whole relocation calculation has completed.
bfd/
* elfxx-mips.c (mips_elf_calculate_relocation) <R_MIPS16_26>
<R_MIPS_26, R_MICROMIPS_26_S1>: Include the addend in JALX's
target alignment verification.
ld/
* testsuite/ld-mips-elf/unaligned-jalx-addend-0.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-addend-1.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-0.d: New
test.
* testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d: New
test.
* testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-0.d: New
test.
* testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d: New
test.
* testsuite/ld-mips-elf/unaligned-jalx-addend-0.s: New test
source.
* testsuite/ld-mips-elf/unaligned-jalx-addend-1.s: New test
source.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
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Symbol table entries for section symbols are different between IRIX and
traditional MIPS ELF targets in that IRIX entries have their `st_name'
member pointing at the section's name in the string table section, while
traditional entries have 0 there and the section header string table has
to be referred via the relevant section header's `shn_name' member
instead.
This is chosen with the `elf_backend_name_local_section_symbols' backend
and can be observed with `readelf -s' output for an IRIX object:
Symbol table '.symtab' contains 12 entries:
Num: Value Size Type Bind Vis Ndx Name
0: 00000000 0 NOTYPE LOCAL DEFAULT UND
1: 00000000 0 SECTION LOCAL DEFAULT 1 .text
2: 00000000 0 SECTION LOCAL DEFAULT 3 .data
3: 00000000 0 SECTION LOCAL DEFAULT 4 .bss
4: 00000000 0 SECTION LOCAL DEFAULT 5 .reginfo
5: 00000000 0 SECTION LOCAL DEFAULT 6 .MIPS.abiflags
6: 00000000 0 SECTION LOCAL DEFAULT 7 .pdr
7: 00000000 0 SECTION LOCAL DEFAULT 9 .gnu.attributes
8: 00002000 16 FUNC GLOBAL DEFAULT 1 foo
9: 00004008 0 FUNC LOCAL DEFAULT 1 abar
10: 00002008 0 FUNC LOCAL DEFAULT 1 afoo
11: 00004000 16 FUNC GLOBAL DEFAULT 1 bar
and a corresponding traditional object:
Symbol table '.symtab' contains 12 entries:
Num: Value Size Type Bind Vis Ndx Name
0: 00000000 0 NOTYPE LOCAL DEFAULT UND
1: 00000000 0 SECTION LOCAL DEFAULT 1
2: 00000000 0 SECTION LOCAL DEFAULT 3
3: 00000000 0 SECTION LOCAL DEFAULT 4
4: 00004008 0 FUNC LOCAL DEFAULT 1 abar
5: 00002008 0 FUNC LOCAL DEFAULT 1 afoo
6: 00000000 0 SECTION LOCAL DEFAULT 5
7: 00000000 0 SECTION LOCAL DEFAULT 6
8: 00000000 0 SECTION LOCAL DEFAULT 7
9: 00000000 0 SECTION LOCAL DEFAULT 9
10: 00002000 16 FUNC GLOBAL DEFAULT 1 foo
11: 00004000 16 FUNC GLOBAL DEFAULT 1 bar
respectively. Consequently the right way to retrieve a section symbol's
name has to be chosen in `mips_elf_calculate_relocation' for the purpose
of error reporting.
Originally we produced symbol tables in the traditional object format
only and we handled it correctly until it was lost in a rewrite with:
commit 7403cb6305f5660fccc8869d3333a731102ae978
Author: Mark Mitchell <mark@codesourcery.com>
Date: Wed Jun 30 20:13:43 1999 +0000
probably because of the extra pointer indirection added which made the
same expression have a different meaning.
With the addition of IRIX symbol table format with:
commit 174fd7f9556183397625dbfa99ef68ecd325c74b
Author: Richard Sandiford <rdsandiford@googlemail.com>
Date: Mon Feb 9 08:04:00 2004 +0000
the bug has been partially covered and now when a relocation error is
triggered with an IRIX object the offending section symbol is correctly
reported:
tmpdir/dump0.o: In function `foo':
(.text+0x2000): relocation truncated to fit: R_MIPS_26 against `.text'
tmpdir/dump0.o: In function `bar':
(.text+0x4000): relocation truncated to fit: R_MIPS_26 against `.text'
because `bfd_elf_string_from_elf_section' retrieves the name from the
string table section. With a traditional object however the function
returns an empty string and consequently `no symbol' is printed instead:
tmpdir/dump0.o: In function `foo':
(.text+0x2000): relocation truncated to fit: R_MIPS_26 against `no symbol'
tmpdir/dump0.o: In function `bar':
(.text+0x4000): relocation truncated to fit: R_MIPS_26 against `no symbol'
Restore the original semantics so that the section name is always
correctly retrieved.
bfd/
* elfxx-mips.c (mips_elf_calculate_relocation): Also use the
section name if `bfd_elf_string_from_elf_section' returns an
empty string.
ld/
* testsuite/ld-mips-elf/reloc-local-overflow.d: New test.
* testsuite/ld-mips-elf/reloc-local-overflow.s: Source for the
new test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
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Upon a `bfd_reloc_outofrange' error continue processing so that any
further issues are also reported, similarly to how `bfd_reloc_overflow'
is handled. Adjust message formatting accordingly, using `%X' to abort
processing at conclusion.
Reduce the number of test cases by grouping relocations the handling of
which can now be verified together with a single source and dump.
bfd/
* elfxx-mips.c (_bfd_mips_elf_relocate_section)
<bfd_reloc_outofrange>: Use the `%X%H' rather than `%C' format
for message. Continue processing rather than returning failure.
ld/
* testsuite/ld-mips-elf/unaligned-jalx-0.d: Fold
`unaligned-jalx-2' here.
* testsuite/ld-mips-elf/unaligned-jalx-mips16-0.d: Fold
`unaligned-jalx-mips16-2' here.
* testsuite/ld-mips-elf/unaligned-jalx-micromips-0.d: Fold
`unaligned-jalx-micromips-2' here.
* testsuite/ld-mips-elf/unaligned-jalx-0.s: Update accordingly.
* testsuite/ld-mips-elf/unaligned-jalx-1.d: Update error
message.
* testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d: Likewise.
* testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d: Likewise.
* testsuite/ld-mips-elf/unaligned-jalx-2.d: Remove test.
* testsuite/ld-mips-elf/unaligned-jalx-mips16-2.d: Remove test.
* testsuite/ld-mips-elf/unaligned-jalx-micromips-2.d: Remove
test.
* testsuite/ld-mips-elf/unaligned-jalx-2.s: Remove test source.
* testsuite/ld-mips-elf/unaligned-lwpc-0.d: Fold
`unaligned-lwpc-3' here.
* testsuite/ld-mips-elf/unaligned-lwpc-0.s: Update accordingly.
* testsuite/ld-mips-elf/unaligned-lwpc-1.d: Fold
`unaligned-lwpc-2' here.
* testsuite/ld-mips-elf/unaligned-lwpc-1.s: Update accordingly.
* testsuite/ld-mips-elf/unaligned-lwpc-2.d: Remove test.
* testsuite/ld-mips-elf/unaligned-lwpc-2.s: Remove test source.
* testsuite/ld-mips-elf/unaligned-lwpc-3.d: Remove test.
* testsuite/ld-mips-elf/unaligned-lwpc-3.s: Remove test source.
* testsuite/ld-mips-elf/unaligned-ldpc-0.d: Fold
`unaligned-ldpc-4' here.
* testsuite/ld-mips-elf/unaligned-ldpc-0.s: Update accordingly.
* testsuite/ld-mips-elf/unaligned-ldpc-1.d: Update error
message. Fold `unaligned-ldpc-2' and `unaligned-ldpc-3' here.
* testsuite/ld-mips-elf/unaligned-ldpc-1.s: Update accordingly.
* testsuite/ld-mips-elf/unaligned-ldpc-2.d: Remove test.
* testsuite/ld-mips-elf/unaligned-ldpc-2.s: Remove test source.
* testsuite/ld-mips-elf/unaligned-ldpc-3.d: Remove test.
* testsuite/ld-mips-elf/unaligned-ldpc-3.s: Remove test source.
* testsuite/ld-mips-elf/unaligned-ldpc-4.d: Remove test.
* testsuite/ld-mips-elf/unaligned-ldpc-4.s: Remove test source.
* testsuite/ld-mips-elf/mips-elf.exp: Delete removed tests.
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A `bfd_reloc_outofrange' condition from `mips_elf_calculate_relocation'
currently triggers the warning callback, which in the case of LD prints
messages like:
foo.o: In function `foo':
(.text+0x0): warning: JALX to a non-word-aligned address
or:
foo.o: In function `foo':
(.text+0x0): warning: PC-relative load from unaligned address
and nothing else, which suggests this is a benign condition and link has
otherwise successfully run to completion. This is however not the case,
the link terminates right away with no further messages and no output
produced.
Use the general error or warning info callback then, preserving the
message format. Also set a BFD error condition so that a failure is
unambiguously reported. Complement the change with a set of suitable
test suite additions.
bfd/
* elfxx-mips.c (_bfd_mips_elf_relocate_section)
<bfd_reloc_outofrange>: Call `->einfo' rather than `->warning'.
Call `bfd_set_error'.
ld/
* testsuite/ld-mips-elf/unaligned-jalx-0.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-1.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-2.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-mips16-0.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-mips16-2.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-micromips-0.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-micromips-2.d: New test.
* testsuite/ld-mips-elf/unaligned-lwpc-0.d: New test.
* testsuite/ld-mips-elf/unaligned-lwpc-1.d: New test.
* testsuite/ld-mips-elf/unaligned-lwpc-2.d: New test.
* testsuite/ld-mips-elf/unaligned-lwpc-3.d: New test.
* testsuite/ld-mips-elf/unaligned-ldpc-0.d: New test.
* testsuite/ld-mips-elf/unaligned-ldpc-1.d: New test.
* testsuite/ld-mips-elf/unaligned-ldpc-2.d: New test.
* testsuite/ld-mips-elf/unaligned-ldpc-3.d: New test.
* testsuite/ld-mips-elf/unaligned-ldpc-4.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-0.s: New test source.
* testsuite/ld-mips-elf/unaligned-jalx-1.s: New test source.
* testsuite/ld-mips-elf/unaligned-jalx-2.s: New test source.
* testsuite/ld-mips-elf/unaligned-insn.s: New test source.
* testsuite/ld-mips-elf/unaligned-lwpc-0.s: New test source.
* testsuite/ld-mips-elf/unaligned-lwpc-1.s: New test source.
* testsuite/ld-mips-elf/unaligned-lwpc-2.s: New test source.
* testsuite/ld-mips-elf/unaligned-lwpc-3.s: New test source.
* testsuite/ld-mips-elf/unaligned-ldpc-0.s: New test source.
* testsuite/ld-mips-elf/unaligned-ldpc-1.s: New test source.
* testsuite/ld-mips-elf/unaligned-ldpc-2.s: New test source.
* testsuite/ld-mips-elf/unaligned-ldpc-3.s: New test source.
* testsuite/ld-mips-elf/unaligned-ldpc-4.s: New test source.
* testsuite/ld-mips-elf/unaligned-syms.s: New test source.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
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