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2017-05-23[ARC] Fix fall through warnings.claziss2-0/+9
bfd/ 2017-05-23 Dilian Palauzov <git-dpa@aegee.org> * elf32-arc.c (arc_elf_merge_attributes): Add fall through comments.
2017-05-23Automatic date update in version.inGDB Administrator1-1/+1
2017-05-22x86-64: Use dynobj instead of htab->elf.dynobjH.J. Lu2-2/+6
* elf64-x86-64.c (elf_x86_64_link_setup_gnu_properties): Use dynobj instead of htab->elf.dynobj.
2017-05-22Automatic date update in version.inGDB Administrator1-1/+1
2017-05-21Automatic date update in version.inGDB Administrator1-1/+1
2017-05-20Automatic date update in version.inGDB Administrator1-1/+1
2017-05-20MIPS/BFD: For n64 hold the number of internal relocs in `->reloc_count'Maciej W. Rozycki2-75/+18
Revert parts of commit fee24f1c5bfe ("objdump improvements for mips elf64"), <https://sourceware.org/ml/binutils/2003-03/msg00108.html>, and make the `->reloc_count' member of `struct bfd_section' hold the actual number of internal relocations stored in its `->relocation' vector. To do so adjust `mips_elf64_slurp_one_reloc_table' to set `->reloc_count' to the actual number of internal relocations retrieved and discard `mips_elf64_canonicalize_reloc', `mips_elf64_canonicalize_dynamic_reloc' and their corresponding target macros. Contrary to the description of `mips_elf64_slurp_one_reloc_table', adjusted appropriately, this makes generic relocation processing code happy and satisfies the "merge notes section" binutils test case. Add extra binutils test cases to expand the coverage of the generic "merge notes section" test case, now passing with the n64 ABI, across the MIPS o32, n32 and n64 ABIs regardless of the default ABI selected in target configuration, and also to verify correctness of the relocations produced. Conversely, do not provide any additional test cases for the original issue addressed with the commit referred: - objdump would display only 1/3 of the total number of relocations, because it used the external relocation count, but each external relocation is brought in as 3 internal relocations. as n64 ABI relocation processing with `objdump -r' and `objdump -R' is already widely covered across the GAS and LD test suites. bfd/ * elf64-mips.c (mips_elf64_canonicalize_reloc): Remove prototype and function. (mips_elf64_canonicalize_dynamic_reloc): Likewise. (mips_elf64_slurp_one_reloc_table): Set `reloc_count' to the actual number of internal relocations retrieved. Adjust function description. (bfd_elf64_canonicalize_reloc): Remove macro. (bfd_elf64_canonicalize_dynamic_reloc): Likewise. binutils/ * testsuite/binutils-all/mips/mips-note-2.d: New test. * testsuite/binutils-all/mips/mips-note-2r.d: New test. * testsuite/binutils-all/mips/mips-note-2-n32.d: New test. * testsuite/binutils-all/mips/mips-note-2-n64.d: New test. * testsuite/binutils-all/mips/mips-note-2r-n32.d: New test. * testsuite/binutils-all/mips/mips-note-2r-n64.d: New test. * testsuite/binutils-all/mips/mips.exp: Define `has_newabi'. Run the new tests.
2017-05-19binutils: support for the SPARC M8 processorJose E. Marchesi7-7/+77
This patch adds support for the new SPARC M8 processor (implementing OSA 2017) to binutils. New instructions: - Dictionary Unpack + dictunpack - Partitioned Compare with shifted result + Signed variants: fpcmp{le,gt,eq,ne}{8,16,32}shl + Unsigned variants: fpcmpu{le,gt}{8,16,32}shl - Partitioned Dual-Equal compared, with shifted result + fpcmpde{8,16,32}shl - Partitioned Unsigned Range Compare, with shifted result + fpcmpur{8,16,32}shl - 64-bit shifts on Floating-Point registers + fps{ll,ra,rl}64x - Misaligned loads and stores + ldm{sh,uh,sw,uw,x,ux} + ldm{sh,uh,sw,uw,x,ux}a + ldmf{s,d} + ldmf{s,d}a + stm{h,w,x} + stm{h,w,x}a + stmf{s,d} + stmf{s,d}a - Oracle Numbers + on{add,sub,mul,div} - Reverse Bytes/Bits + revbitsb + revbytes{h,w,x} - Run-Length instructions + rle_burst + rle_length - New crypto instructions + sha3 - Instruction to read the new register %entropy + rd %entropy New Alternate Address Identifiers: - 0x24, #ASI_CORE_COMMIT_COUNT - 0x24, #ASI_CORE_SELECT_COUNT - 0x48, #ASI_ARF_ECC_REG - 0x53, #ASI_ITLB_PROBE - 0x58, #ASI_DSFAR - 0x5a, #ASI_DTLB_PROBE_PRIMARY - 0x5b, #ASI_DTLB_PROBE_REAL - 0x64, #ASI_CORE_SELECT_COMMIT_NHT The new assembler command-line options for selecting the M8 architecture are: -Av9m8 or -Asparc6 for 64-bit binaries. -Av8plusm8 for 32-bit (v8+) binaries. The corresponding disassembler command-line options are: -msparc:v9m8 for 64-bit binaries. -msparc:v8plusm8 for 32-bit (v8+) binaries. Tested for regressions in the following targets: sparc-aout sparc-linux sparc-vxworks sparc64-linux bfd/ChangeLog: 2017-05-19 Jose E. Marchesi <jose.marchesi@oracle.com> * archures.c (bfd_mach_sparc_v9m8): Define. (bfd_mach_sparc_v8plusm8): Likewise. (bfd_mach_sparc_v9_p): Adjust to M8. (bfd_mach_sparc_64bit_p): Likewise. * aoutx.h (machine_type): Handle bfd_mach_sparc_v9m8 and bfd_mach_sparc_v8plusm8. * bfd-in2.h: Regenerated. * cpu-sparc.c (arch_info_struct): Entries for sparc:v9m8 and sparc:v8plusm8. * elfxx-sparc.c (_bfd_sparc_elf_object_p): Handle bfd_mach_sparc_v8plusm8 and bfd_mach_sparc_v9m8 using the new hw capabilities ONADDSUB, ONMUL, ONDIV, DICTUNP, FPCPSHL, RLE and SHA3. * elf32-sparc.c (elf32_sparc_final_write_processing): Handle bfd_mach_sparc_v8plusm8. binutils/ChangeLog: 2017-05-19 Jose E. Marchesi <jose.marchesi@oracle.com> * NEWS: Mention the SPARC M8 support. gas/ChangeLog: 2017-05-19 Jose E. Marchesi <jose.marchesi@oracle.com> * config/tc-sparc.c (sparc_arch_table): Entries for `sparc6', `v9m8' and `v8plusm8'. (sparc_md_end): Handle SPARC_OPCODE_ARCH_M8. (get_hwcap_name): Support the M8 hardware capabilities. (sparc_ip): Handle new operand types. * doc/c-sparc.texi (Sparc-Opts): Document -Av9m8, -Av8plusm8 and -Asparc6, and the corresponding -xarch aliases. * testsuite/gas/sparc/sparc6.s: New file. * testsuite/gas/sparc/sparc6.d: Likewise. * testsuite/gas/sparc/sparc6-diag.s: Likewise. * testsuite/gas/sparc/sparc6-diag.l: Likewise. * testsuite/gas/sparc/fpcmpshl.s: Likewise. * testsuite/gas/sparc/fpcmpshl.d: Likewise. * testsuite/gas/sparc/fpcmpshl-diag.s: Likewise. * testsuite/gas/sparc/fpcmpshl-diag.l: Likewise. * testsuite/gas/sparc/ldm-stm.s: Likewise. * testsuite/gas/sparc/ldm-stm.d: Likewise. * testsuite/gas/sparc/ldm-stm-diag.s: Likewise. * testsuite/gas/sparc/ldm-stm-diag.l: Likewise. * testsuite/gas/sparc/ldmf-stmf.s: Likewise. * testsuite/gas/sparc/ldmf-stmf.d: Likewise. * testsuite/gas/sparc/ldmf-stmf-diag.s: Likewise. * testsuite/gas/sparc/ldmf-stmf-diag.l: Likewise. * testsuite/gas/sparc/on.s: Likewise. * testsuite/gas/sparc/on.d: Likewise. * testsuite/gas/sparc/on-diag.s: Likewise. * testsuite/gas/sparc/on-diag.l: Likewise. * testsuite/gas/sparc/rle.s: Likewise. * testsuite/gas/sparc/rle.d: Likewise. * testsuite/gas/sparc/sparc.exp (gas_64_check): Run new tests. * testsuite/gas/sparc/rdasr.s: Add test for RDENTROPY. * testsuite/gas/sparc/rdasr.d: Likewise. include/ChangeLog: 2017-05-19 Jose E. Marchesi <jose.marchesi@oracle.com> * elf/sparc.h (ELF_SPARC_HWCAP2_SPARC6): Define. (ELF_SPARC_HWCAP2_ONADDSUB): Likewise. (ELF_SPARC_HWCAP2_ONMUL): Likewise. (ELF_SPARC_HWCAP2_ONDIV): Likewise. (ELF_SPARC_HWCAP2_DICTUNP): Likewise. (ELF_SPARC_HWCAP2_FPCMPSHL): Likewise. (ELF_SPARC_HWCAP2_RLE): Likewise. (ELF_SPARC_HWCAP2_SHA3): Likewise. * opcode/sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_M8 and adjust SPARC_OPCODE_ARCH_MAX. (HWCAP2_SPARC6): Define. (HWCAP2_ONADDSUB): Likewise. (HWCAP2_ONMUL): Likewise. (HWCAP2_ONDIV): Likewise. (HWCAP2_DICTUNP): Likewise. (HWCAP2_FPCMPSHL): Likewise. (HWCAP2_RLE): Likewise. (HWCAP2_SHA3): Likewise. (OPM): Likewise. (OPMI): Likewise. (ONFCN): Likewise. (REVFCN): Likewise. (SIMM10): Likewise. opcodes/ChangeLog: 2017-05-19 Jose E. Marchesi <jose.marchesi@oracle.com> * sparc-dis.c (MASK_V9): Include SPARC_OPCODE_ARCH_M8. (X_IMM2): Define. (compute_arch_mask): Handle bfd_mach_sparc_v8plusm8 and bfd_mach_sparc_v9m8. (print_insn_sparc): Handle new operand types. * sparc-opc.c (MASK_M8): Define. (v6): Add MASK_M8. (v6notlet): Likewise. (v7): Likewise. (v8): Likewise. (v9): Likewise. (v9a): Likewise. (v9b): Likewise. (v9c): Likewise. (v9d): Likewise. (v9e): Likewise. (v9v): Likewise. (v9m): Likewise. (v9andleon): Likewise. (m8): Define. (HWS_VM8): Define. (HWS2_VM8): Likewise. (sparc_opcode_archs): Add entry for "m8". (sparc_opcodes): Add OSA2017 and M8 instructions dictunpack, fpcmp{ule,ugt,eq,ne,de,ur}{8,16,32}shl, fpx{ll,ra,rl}64x, ldm{sh,uh,sw,uw,x,ux}, ldm{sh,uh,sw,uw,x,ux}a, ldmf{s,d}, ldmf{s,d}a, on{add,sub,mul,div}, rdentropy, revbitsb, revbytes{h,w,x}, rle_burst, rle_length, sha3, stm{h,w,x}, stm{h,w,x}a, stmf{s,d}, stmf{s,d}a. (asi_table): New M8 ASIs ASI_CORE_COMMIT_COUNT, ASI_CORE_SELECT_COUNT, ASI_ARF_ECC_REG, ASI_ITLB_PROBE, ASI_DSFAR, ASI_DTLB_PROBE_PRIMARY, ASI_DTLB_PROBE_REAL, ASI_CORE_SELECT_COMMIT_NHT.
2017-05-19garbage collect debug sections when no alloc sections are keptAlan Modra2-3/+11
The pr20882 testcase fails on a number of targets that add attribute or note sections to object files, and the default linker script says those sections should be kept. This patch changes --gc-sections to drop debug and special sections like .comment when no SEC_ALLOC section in an object file is kept. The assumption is that debug sections are describing code and data that will become part of the final image in memory. * elflink.c (_bfd_elf_gc_mark_extra_sections): Don't keep debug and special sections when no non-note alloc sections in an object are kept.
2017-05-19Automatic date update in version.inGDB Administrator1-1/+1
2017-05-18Don't compare boolean values against TRUE or FALSEAlan Modra17-68/+87
bfd/ * arc-got.h: Don't compare boolean values against TRUE or FALSE. * elf-m10300.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-bfin.c: Likewise. * elf32-m68k.c: Likewise. * elf32-nds32.c: Likewise. * elf32-tilepro.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-riscv.c: Likewise. * elfxx-tilegx.c: Likewise. * mach-o.c: Likewise. * peXXigen.c: Likewise. * vms-alpha.c: Likewise. * vms-lib.c: Likewise. opcodes/ * aarch64-asm.c: Don't compare boolean values against TRUE or FALSE. * aarch64-dis.c: Likewise. * aarch64-gen.c: Likewise. * aarch64-opc.c: Likewise. binutils/ * strings.c: Don't compare boolean values against TRUE or FALSE. gas/ * config/tc-aarch64.c: Don't compare booleans against TRUE or FALSE. * config/tc-hppa.c: Likewise. * config/tc-mips.c: Likewise. * config/tc-score7.c: Likewise. ld/ * emultempl/elf32.em: Don't compare boolean values against TRUE or FALSE. * emultempl/pe.em: Likewise. * emultempl/pep.em: Likewise. * emultempl/xtensaelf.em: Likewise.
2017-05-18Automatic date update in version.inGDB Administrator1-1/+1
2017-05-17Mark debug sections referenced by kept debug sectionsH.J. Lu2-28/+61
If a debug section is referenced by a kept debug section, it should also be kept. Some targets, like mips, keep input files when there are some special sections, like .gnu.attributes, even if input file is unused otherwise. In this case, all debug sections are kept. The new test will fail on such targets. We can either fix those targets or XFAIL the test. bfd/ PR ld/20882 * elflink.c (elf_gc_mark_debug_section): New function. (_bfd_elf_gc_mark_extra_sections): Mark any debug sections referenced by kept debug sections. ld/ PR ld/20882 * testsuite/ld-gc/gc.exp: Run pr20882. * testsuite/ld-gc/pr20882.d: New file. * testsuite/ld-gc/pr20882a.s: Likewise. * testsuite/ld-gc/pr20882b.s: Likewise. * testsuite/ld-gc/pr20882c.s: Likewise.
2017-05-17Automatic date update in version.inGDB Administrator1-1/+1
2017-05-16Rename non_ir_ref to non_ir_ref_regularAlan Modra55-57/+114
Since the flag is now set only for regular object refs. include/ * bfdlink.h (struct bfd_link_hash_entry <non_ir_ref>): Rename to non_ir_ref_regular. bfd/ * elf-m10300.c: Rename occurrences of non_ir_ref. * elf32-arm.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cris.c: Likewise. * elf32-d10v.c: Likewise. * elf32-dlx.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-xstormy16.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-x86-64.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfnn-riscv.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * linker.c: Likewise. ld/ * plugin.c: Rename occurrences of non_ir_ref.
2017-05-16non_ir_ref_dynamicAlan Modra4-6/+18
dynamic_ref_after_ir_def is a little odd compared to other symbol flags in that as the name suggests, it is set only for certain references after a definition. It turns out that setting a flag for any non-ir reference from a dynamic object can be used to solve the problem for which this flag was invented, which I think is a cleaner. This patch does that, and sets non_ir_ref only for regular object references. include/ * bfdlink.h (struct bfd_link_hash_entry): Update non_ir_ref comment. Rename dynamic_ref_after_ir_def to non_ir_ref_dynamic. ld/ * plugin.c (is_visible_from_outside): Use non_ir_ref_dynamic. (plugin_notice): Set non_ir_ref for references from regular objects, non_ir_ref_dynamic for references from dynamic objects. bfd/ * elf64-ppc.c (add_symbol_adjust): Transfer non_ir_ref_dynamic. * elflink.c (elf_link_add_object_symbols): Update to use non_ir_ref_dynamic. (elf_link_input_bfd): Test non_ir_ref_dynamic in addition to non_ir_ref. * linker.c (_bfd_generic_link_add_one_symbol): Likewise.
2017-05-16Automatic date update in version.inGDB Administrator1-1/+1
2017-05-15MIPS16e2: Add MIPS16e2 ASE supportMaciej W. Rozycki2-0/+6
Add MIPS16e2 ASE support as per the architecture specification[1], including in particular: 1. A new ELF ASE flag to mark MIPS16e2 binaries. 2. MIPS16e2 instruction assembly support, including a relaxation update to use LUI rather than an LI/SLL instruction pair for loading the high part of 32-bit addresses. 3. MIPS16e2 instruction disassembly support, including updated rules for extended forms of instructions that are now subdecoded and therefore do not alias to the original MIPS16 ISA revision instructions even for encodings that are not valid in the MIPS16e2 instruction set. Add `-mmips16e2' and `-mno-mips16e2' GAS command-line options and their corresponding `mips16e2' and `no-mips16e2' settings for the `.set' and `.module' pseudo-ops. Control the availability of the MT ASE subset of the MIPS16e2 instruction set with a combination of these controls and the preexisting MT ASE controls. Parts of this change by Matthew Fortune and Andrew Bennett. References: [1] "MIPS32 Architecture for Programmers: MIPS16e2 Application-Specific Extension Technical Reference Manual", Imagination Technologies Ltd., Document Number: MD01172, Revision 01.00, April 26, 2016 include/ * elf/mips.h (AFL_ASE_MIPS16E2): New macro. (AFL_ASE_MASK): Adjust accordingly. * opcode/mips.h: Document new operand codes defined. (mips_operand_type): Add OP_REG28 enum value. (INSN2_SHORT_ONLY): Update description. (ASE_MIPS16E2, ASE_MIPS16E2_MT): New macros. bfd/ * elfxx-mips.c (print_mips_ases): Handle MIPS16e2 ASE. opcodes/ * mips-dis.c (mips_arch_choices): Add ASE_MIPS16E2 and ASE_MIPS16E2_MT flags to the unnamed MIPS16 entry. (mips_convert_abiflags_ases): Handle the AFL_ASE_MIPS16E2 flag. (print_insn_arg) <OP_REG28>: Add handler. (validate_insn_args) <OP_REG28>: Handle. (print_mips16_insn_arg): Handle MIPS16 instructions that require 32-bit encoding and 9-bit immediates. (print_insn_mips16): Handle MIPS16 instructions that require 32-bit encoding and MFC0/MTC0 operand decoding. * mips16-opc.c (decode_mips16_operand) <'>', '9', 'G', 'N', 'O'> <'Q', 'T', 'b', 'c', 'd', 'r', 'u'>: Add handlers. (RD_C0, WR_C0, E2, E2MT): New macros. (mips16_opcodes): Add entries for MIPS16e2 instructions: GP-relative "addiu" and its "addu" spelling, "andi", "cache", "di", "ehb", "ei", "ext", "ins", GP-relative "lb", "lbu", "lh", "lhu", and "lw" instructions, "ll", "lui", "lwl", "lwr", "mfc0", "movn", "movtn", "movtz", "movz", "mtc0", "ori", "pause", "pref", "rdhwr", "sc", GP-relative "sb", "sh" and "sw" instructions, "swl", "swr", "sync" and its "sync_acquire", "sync_mb", "sync_release", "sync_rmb" and "sync_wmb" aliases, "xori", "dmt", "dvpe", "emt" and "evpe". Add split regular/extended entries for original MIPS16 ISA revision instructions whose extended forms are subdecoded in the MIPS16e2 ISA revision: "li", "sll" and "srl". binutils/ * readelf.c (print_mips_ases): Handle MIPS16e2 ASE. * NEWS: Mention MIPS16e2 ASE support. gas/ * config/tc-mips.c (RELAX_MIPS16_ENCODE): Add `e2' flag. (RELAX_MIPS16_E2): New macro. (RELAX_MIPS16_PIC, RELAX_MIPS16_SYM32, RELAX_MIPS16_NOMACRO) (RELAX_MIPS16_USER_SMALL, RELAX_MIPS16_USER_EXT) (RELAX_MIPS16_DSLOT, RELAX_MIPS16_JAL_DSLOT) (RELAX_MIPS16_EXTENDED, RELAX_MIPS16_MARK_EXTENDED) (RELAX_MIPS16_CLEAR_EXTENDED, RELAX_MIPS16_ALWAYS_EXTENDED) (RELAX_MIPS16_MARK_ALWAYS_EXTENDED) (RELAX_MIPS16_CLEAR_ALWAYS_EXTENDED, RELAX_MIPS16_MACRO) (RELAX_MIPS16_MARK_MACRO, RELAX_MIPS16_CLEAR_MACRO): Shift bits. (mips16_immed_extend): New prototype. (options): Add OPTION_MIPS16E2 and OPTION_NO_MIPS16E2 enum values. (md_longopts): Add "mmips16e2" and "mno-mips16e2" options. (mips_ases): Add "mips16e2" entry. (mips_set_ase): Handle MIPS16e2 ASE. (insn_insert_operand): Explicitly handle immediates with MIPS16 instructions that require 32-bit encoding. (is_opcode_valid_16): Pass enabled ASE bitmask on to `opcode_is_member'. (validate_mips_insn): Explicitly handle immediates with MIPS16 instructions that require 32-bit encoding. (operand_reg_mask) <OP_REG28>: Add handler. (match_reg28_operand): New function. (match_operand) <OP_REG28>: Add handler. (append_insn): Pass ASE_MIPS16E2 setting to RELAX_MIPS16_ENCODE. (match_mips16_insn): Handle MIPS16 instructions that require 32-bit encoding and `V' and `u' operand codes. (mips16_ip): Allow any characters except from `.' in opcodes. (mips16_immed_extend): Handle 9-bit immediates. Do not shuffle immediates whose width is not one of these listed. (md_estimate_size_before_relax): Handle MIPS16e2 relaxation. (mips_relax_frag): Likewise. (md_convert_frag): Likewise. (mips_convert_ase_flags): Handle MIPS16e2 ASE. * doc/as.texinfo (Target MIPS options): Add `-mmips16e2' and `-mno-mips16e2' options. (-mmips16e2, -mno-mips16e2): New options. * doc/c-mips.texi (MIPS Options): Add `-mmips16e2' and `-mno-mips16e2' options. (MIPS ASE Instruction Generation Overrides): Add `.set mips16e2' and `.set nomips16e2'.
2017-05-15Automatic date update in version.inGDB Administrator1-1/+1
2017-05-14Automatic date update in version.inGDB Administrator1-1/+1
2017-05-13Automatic date update in version.inGDB Administrator1-1/+1
2017-05-12x86: Merge X86_ISA_1_USED/X86_ISA_1_NEEDED propertiesH.J. Lu3-2/+11
If there are more than GNU property note in an input, we should merge X86_ISA_1_USED and X86_ISA_1_NEEDED properties. bfd/ * elf32-i386.c (elf_i386_parse_gnu_properties): Merge GNU_PROPERTY_X86_ISA_1_USED and GNU_PROPERTY_X86_ISA_1_NEEDED properties. * elf64-x86-64.c (elf_x86_64_parse_gnu_properties): Likewise. ld/ * testsuite/ld-i386/i386.exp: Run property-x86-3. * testsuite/ld-x86-64/x86-64.exp: Likewise. * testsuite/ld-i386/property-x86-3.d: New file. * testsuite/ld-i386/property-x86-3.s: Likewise. * testsuite/ld-x86-64/property-x86-3.d: Likewise. * testsuite/ld-x86-64/property-x86-3.s: Likewise.
2017-05-12Automatic date update in version.inGDB Administrator1-1/+1
2017-05-11x86-64: Rename .plt.bnd to .plt.secH.J. Lu2-83/+102
Rename .plt.bnd to .plt.sec to indicate that this is used as the second PLT section. There is no change in run-time behavior. We also scan the .plt.sec section to synthesize PLT symbols. bfd/ * elf64-x86-64.c (elf_x86_64_link_hash_entry): Rename plt_bnd to plt_second. (elf_x86_64_link_hash_table): Rename plt_bnd/plt_bnd_eh_frame to plt_second/plt_second_eh_frame. (elf_x86_64_link_hash_newfunc): Updated. (elf_x86_64_allocate_dynrelocs): Likewise. (elf_x86_64_size_dynamic_sections): Likewise. (elf_x86_64_relocate_section): Likewise. (elf_x86_64_finish_dynamic_symbol): Likewise. (elf_x86_64_finish_dynamic_sections): Likewise. (elf_x86_64_plt_type): Rename plt_bnd to plt_second. (elf_x86_64_get_synthetic_symtab): Updated. Also scan the .plt.sec section. (elf_backend_setup_gnu_properties): Updated. Create the .plt.sec section instead of the .plt.sec section. ld/ * emulparams/elf_x86_64.sh (TINY_READONLY_SECTION): Replace .plt.bnd with .plt.sec. * testsuite/ld-x86-64/bnd-ifunc-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-2-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-2.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1.d: Likewise. * testsuite/ld-x86-64/mpx3.dd: Likewise. * testsuite/ld-x86-64/mpx3n.dd: Likewise. * testsuite/ld-x86-64/mpx4.dd: Likewise. * testsuite/ld-x86-64/mpx4n.dd: Likewise. * testsuite/ld-x86-64/plt-main-bnd-now.rd: Likewise. * testsuite/ld-x86-64/pr21038b-now.d: Likewise. * testsuite/ld-x86-64/pr21038b.d: Likewise. * testsuite/ld-x86-64/pr21038c-now.d: Likewise. * testsuite/ld-x86-64/pr21038c.d: Likewise.
2017-05-11x86: Generate PLT relocations for -z nowH.J. Lu3-30/+8
This patch partially reverses: commit 25070364b0ce33eed46aa5d78ebebbec6accec7e Author: H.J. Lu <hjl.tools@gmail.com> Date: Sat May 16 07:00:21 2015 -0700 Don't generate PLT relocations for now binding to support LD_AUDIT and LD_PROFILE with -z now. If there is an existing GOT relocation, it is still used to avoid PLT relocation against the same function symbol. bfd/ * elf32-i386.c (elf_i386_allocate_dynrelocs): Partially revert commit 25070364b0ce33eed46aa5d78ebebbec6accec7e. * elf64-x86-64.c (elf_x86_64_allocate_dynrelocs): Likewse. ld/ * testsuite/ld-i386/plt-pic2.dd: Updated. * testsuite/ld-i386/plt2.dd: Likewise. * testsuite/ld-i386/plt2.rd: Likewise. * testsuite/ld-i386/pr17689now.rd: Likewise. * testsuite/ld-ifunc/ifunc-16-i386-now.d: Likewise. * testsuite/ld-ifunc/ifunc-16-x86-64-now.d: Likewise. * testsuite/ld-ifunc/pr17154-i386-now.d: Likewise. * testsuite/ld-ifunc/pr17154-x86-64-now.d: Likewise. * testsuite/ld-x86-64/bnd-branch-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-2-now.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1-now.d: Likewise. * testsuite/ld-x86-64/plt2.dd: Likewise. * testsuite/ld-x86-64/plt2.rd: Likewise. * testsuite/ld-x86-64/pr17689now.rd: Likewise. * testsuite/ld-x86-64/pr21038b-now.d: Likewise. * testsuite/ld-x86-64/pr21038c-now.d: Likewise.
2017-05-11Automatic date update in version.inGDB Administrator1-1/+1
2017-05-10bfd: fix the deletion of relocs in sparc64Jose E. Marchesi2-5/+25
This patch fixes the deletion of relocations in BFD sections in sparc64 targets. A specialized `_bfd_set_reloc' function is provided that updates the internal canon_reloc_count(sec) counter instead of sec->reloc_count. Additionally, the `write_relocs' callback in elf64-sparc is adapted to use the canon_reloc_count to traverse `sec->orelocation'. Tested in sparc64-linux-gnu targets. Fixes an existing failure in the merge-notes objcopy test. No regressions. bfd/ChangeLog: 2017-05-10 Jose E. Marchesi <jose.marchesi@oracle.com> * elf64-sparc.c (elf64_sparc_set_reloc): New function. (bfd_elf64_set_reloc): Define. (elf64_sparc_write_relocs): Use `canon_reloc_count'.
2017-05-10bfd: new BFD target entry point _bfd_set_reloc.Jose E. Marchesi27-10/+124
This patch adds a new entry point to the BFD_JUMP_TABLE_RELOCS. The previous common implementation `bfd_set_reloc', in bfd/bfd.c, has been moved to bfd/reloc.c with the name `_bfd_generic_set_reloc', and all BFD targets has been adapted to use it. This patch doesn't introduce any change on functionality, but prepares the ground for further work. bfd/ChangeLog: 2017-05-10 Jose E. Marchesi <jose.marchesi@oracle.com> * targets.c (BFD_JUMP_TABLE_RELOCS): Add NAME##_set_reloc. (struct bfd_target): New field _bfd_set_reloc. * bfd.c (bfd_set_reloc): Call backend _set_bfd. * reloc.c (_bfd_generic_set_reloc): New function. * coffcode.h (coff_set_reloc): Define to _bfd_generic_set_reloc. * nlm-target.h (nlm_set_reloc): Likewise. * coff-rs6000.c (_bfd_xcoff_set_reloc): Likewise. * aout-tic30.c (MY_set_reloc): Likewise. * aout-target.h (MY_set_reloc): Likewise. * elfxx-target.h (bfd_elfNN_set_reloc): Likewise. * coff-alpha.c (_bfd_ecoff_set_reloc): Likewise. * mach-o-target.c (bfd_mach_o_set_reloc): Likewise. * vms-alpha.c (alpha_vms_set_reloc): Likewise. * aout-adobe.c (aout_32_set_reloc): Likewise. * bout.c (b_out_set_reloc): Likewise. * coff-mips.c (_bfd_ecoff_set_reloc): Likewise. * i386os9k.c (aout_32_set_reloc): Likewise. * ieee.c (ieee_set_reloc): Likewise. * oasys.c (oasys_set_reloc): Likewise. * som.c (som_set_reloc): Likewise. * versados.c (versados_set_reloc): Likewise. * coff64-rs6000.c (rs6000_xcoff64_vec): Add _bfd_generic_set_reloc. (rs6000_xcoff64_aix_vec): LIkewise. * libbfd.c (_bfd_norelocs_set_reloc): New function. * libbfd-in.h: Prototype for _bfd_norelocs_set_reloc. * i386msdos.c (msdos_set_reloc): Define to _bfd_norelocs_set_reloc. * elfcode.h (elf_set_reloc): Define. * bfd-in2.h: Regenerated.
2017-05-10x86-64: Use .plt.bnd for IFUNC function addressH.J. Lu2-2/+18
When -z bndplt is used, we must use the .plt.bnd entry for IFUNC function address. bfd/ PR ld/21481 * elf64-x86-64.c (elf_x86_64_finish_dynamic_symbol): Use .plt.bnd for IFUNC function address. ld/ PR ld/21481 * testsuite/ld-x86-64/pr21481a.c: New file. * testsuite/ld-x86-64/pr21481b.S: Likewise. * testsuite/ld-x86-64/x86-64.exp: Run PR ld/21481 tests.
2017-05-10[ARC] Object attributes.Claudiu Zissulescu2-12/+450
gas/ 2017-05-10 Claudiu Zissulescu <claziss@synopsys.com> * testsuite/gas/arc/attr-arc600.d: New file. * testsuite/gas/arc/attr-arc600_mul32x16.d: Likewise. * testsuite/gas/arc/attr-arc600_norm.d: Likewise. * testsuite/gas/arc/attr-arc601.d: Likewise. * testsuite/gas/arc/attr-arc601_mul32x16.d: Likewise. * testsuite/gas/arc/attr-arc601_mul64.d: Likewise. * testsuite/gas/arc/attr-arc601_norm.d: Likewise. * testsuite/gas/arc/attr-arc700.d: Likewise. * testsuite/gas/arc/attr-arcem.d: Likewise. * testsuite/gas/arc/attr-archs.d: Likewise. * testsuite/gas/arc/attr-autodetect-1.d: Likewise. * testsuite/gas/arc/attr-autodetect-1.s: Likewise. * testsuite/gas/arc/attr-cpu-a601.d: Likewise. * testsuite/gas/arc/attr-cpu-a601.s: Likewise. * testsuite/gas/arc/attr-cpu-a700.d: Likewise. * testsuite/gas/arc/attr-cpu-a700.s: Likewise. * testsuite/gas/arc/attr-cpu-em.d: Likewise. * testsuite/gas/arc/attr-cpu-em.s: Likewise. * testsuite/gas/arc/attr-cpu-hs.d: Likewise. * testsuite/gas/arc/attr-cpu-hs.s: Likewise. * testsuite/gas/arc/attr-em.d: Likewise. * testsuite/gas/arc/attr-em4.d: Likewise. * testsuite/gas/arc/attr-em4_dmips.d: Likewise. * testsuite/gas/arc/attr-em4_fpuda.d: Likewise. * testsuite/gas/arc/attr-em4_fpus.d: Likewise. * testsuite/gas/arc/attr-hs.d: Likewise. * testsuite/gas/arc/attr-hs34.d: Likewise. * testsuite/gas/arc/attr-hs38.d: Likewise. * testsuite/gas/arc/attr-hs38_linux.d: Likewise. * testsuite/gas/arc/attr-mul64.d: Likewise. * testsuite/gas/arc/attr-name.d: Likewise. * testsuite/gas/arc/attr-name.s: Likewise. * testsuite/gas/arc/attr-nps400.d: Likewise. * testsuite/gas/arc/attr-override-mcpu.d: Likewise. * testsuite/gas/arc/attr-override-mcpu.s * testsuite/gas/arc/attr-quarkse_em.d: Likewise. * testsuite/gas/arc/blank.s: Likewise. * testsuite/gas/elf/section2.e-arc: Likewise. * testsuite/gas/arc/cpu-pseudop-1.d: Update test. * testsuite/gas/arc/cpu-pseudop-2.d: Likewise. * testsuite/gas/arc/nps400-0.d: Likewise. * testsuite/gas/elf/elf.exp: Set target_machine for ARC. * config/tc-arc.c (opcode/arc-attrs.h): Include. (ARC_GET_FLAG, ARC_SET_FLAG, streq): Define. (arc_attribute): Declare new function. (md_pseudo_table): Add arc_attribute. (cpu_types): Rename default cpu features. (selected_cpu): Set the default OSABI flag. (mpy_option): New variable. (pic_option): Likewise. (sda_option): Likewise. (tls_option): Likewise. (feature_type, feature_list): Remove. (arc_initial_eflag): Likewise. (attributes_set_explicitly): New variable. (arc_check_feature): Check also for the conflicting features. (arc_select_cpu): Refactor assignment of selected_cpu.eflags. (arc_option): Remove setting of private flags and architecture. (check_cpu_feature): Refactor feature names. (autodetect_attributes): New function. (assemble_tokens): Use above function. (md_parse_option): Refactor feature names. (arc_attribute): New function. (arc_set_attribute_int): Likewise. (arc_set_attribute_string): Likewise. (arc_stralloc): Likewise. (arc_set_public_attributes): Likewise. (arc_md_end): Likewise. (arc_copy_symbol_attributes): Likewise. (rc_convert_symbolic_attribute): Likewise. * config/tc-arc.h (md_end): Define. (CONVERT_SYMBOLIC_ATTRIBUTE): Likewise. (TC_COPY_SYMBOL_ATTRIBUTES): Likewise. * doc/c-arc.texi: Document ARC object attributes. binutils/ 2017-05-10 Claudiu Zissulescu <claziss@synopsys.com> * readelf.c (decode_ARC_machine_flags): Recognize OSABI v4. (get_arc_section_type_name): New function. (get_section_type_name): Use the above function. (display_arc_attribute): New function. (process_arc_specific): Likewise. (process_arch_specific): Handle ARC specific information. * testsuite/binutils-all/strip-3.d: Consider ARC.attributes section. include/ 2017-05-10 Claudiu Zissulescu <claziss@synopsys.com> * elf/arc.h (SHT_ARC_ATTRIBUTES): Define. (Tag_ARC_*): Define. (E_ARC_OSABI_V4): Define. (E_ARC_OSABI_CURRENT): Reassign it. (TAG_CPU_*): Define. * opcode/arc-attrs.h: New file. * opcode/arc.h (insn_subclass_t): Assign enum values. (insn_subclass_t): Update enum with QUARKSE1, QUARKSE2, and LL64. (ARC_EA, ARC_CD, ARC_LLOCK, ARC_ATOMIC, ARC_MPY, ARC_MULT) (ARC_NPS400, ARC_DPFP, ARC_SPFP, ARC_FPU, ARC_FPUDA, ARC_SWAP) (ARC_NORM, ARC_BSCAN, ARC_UIX, ARC_TSTAMP, ARC_VBFDW) (ARC_BARREL, ARC_DSPA, ARC_SHIFT, ARC_INTR, ARC_DIV, ARC_XMAC) (ARC_CRC): Delete. bfd/ 2017-05-10 Claudiu Zissulescu <claziss@synopsys.com> * elf32-arc.c (FEATURE_LIST_NAME): Define. (CONFLICT_LIST): Likewise. (opcode/arc-attrs.h): Include. (arc_elf_print_private_bfd_data): Print OSABI v4 flag. (arc_extract_features): New file. (arc_stralloc): Likewise. (arc_elf_merge_attributes): Likewise. (arc_elf_merge_private_bfd_data): Use object attributes. (bfd_arc_get_mach_from_attributes): New function. (arc_elf_object_p): Use object attributes. (arc_elf_final_write_processing): Likewise. (elf32_arc_obj_attrs_arg_type): New function. (elf32_arc_obj_attrs_handle_unknown): Likewise. (elf32_arc_section_from_shdr): Likewise. (elf_backend_obj_attrs_vendor): Define. (elf_backend_obj_attrs_section): Likewise. (elf_backend_obj_attrs_arg_type): Likewise. (elf_backend_obj_attrs_section_type): Likewise. (elf_backend_obj_attrs_handle_unknown): Likewise. (elf_backend_section_from_shdr): Likewise. ld/ 2017-05-10 Claudiu Zissulescu <claziss@synopsys.com> * testsuite/ld-arc/attr-merge-0.d: New file. * testsuite/ld-arc/attr-merge-0.s: Likewise. * testsuite/ld-arc/attr-merge-0e.s: Likewise. * testsuite/ld-arc/attr-merge-1.d: Likewise. * testsuite/ld-arc/attr-merge-1.s: Likewise. * testsuite/ld-arc/attr-merge-1e.s: Likewise. * testsuite/ld-arc/attr-merge-2.d: Likewise. * testsuite/ld-arc/attr-merge-2.s: Likewise. * testsuite/ld-arc/attr-merge-3.d: Likewise. * testsuite/ld-arc/attr-merge-3.s: Likewise. * testsuite/ld-arc/attr-merge-3e.s: Likewise. * testsuite/ld-arc/attr-merge-4.s: Likewise. * testsuite/ld-arc/attr-merge-5.d: Likewise. * testsuite/ld-arc/attr-merge-5a.s: Likewise. * testsuite/ld-arc/attr-merge-5b.s: Likewise. * testsuite/ld-arc/attr-merge-conflict-isa.d: Likewise. * testsuite/ld-arc/attr-merge-err-isa.d: Likewise. * testsuite/ld-arc/attr-merge-incompatible-cpu.d: Likewise. * testsuite/ld-arc/got-01.d: Update test. * testsuite/ld-arc/attr-merge-err-quarkse.d: New file. * testsuite/ld-arc/attr-quarkse.s: Likewise. * testsuite/ld-arc/attr-quarkse2.s: Likewise. opcodes/ 2017-05-10 Claudiu Zissulescu <claziss@synopsys.com> * arc-dis.c (parse_option): Update quarkse_em option.. * arc-ext-tbl.h (dsp_fp_flt2i, dsp_fp_i2flt): Change subclass to QUARKSE1. (dsp_fp_div, dsp_fp_cmp): Change subclass to QUARKSE2.
2017-05-10Automatic date update in version.inGDB Administrator1-1/+1
2017-05-09Fix resolution of R_ARM_THM_ALU_PREL_11_0 relocation against Thumb symbols.Andrew Goedhart2-0/+11
PR ld/21458 * elf32-arm.c (elf32_arm_final_link_relocate): Set the bottom bit of the value when resolving a R_ARM_THM_ALU_PREL_11_0 relocation and the destination is a Thumb symbol.
2017-05-09Automatic date update in version.inGDB Administrator1-1/+1
2017-05-08Add missing initializer to silence GCC 4.2H.J. Lu3-2/+8
Silence GCC 4.2: elf64-x86-64.c: In function ‘elf_x86_64_get_synthetic_symtab’: elf64-x86-64.c:6490: warning: missing initializer elf64-x86-64.c:6490: warning: (near initialization for ‘plts[3].sec’) * elf32-i386.c (elf_i386_get_synthetic_symtab): Add missing initializer for GCC 4.2. * lf64-x86-64.c (elf_x86_64_get_synthetic_symtab): Likewise.
2017-05-08x86-64: Improve PLT generation and synthetic PLT symbolsH.J. Lu2-521/+953
On x86-64, the procedure linkage table (PLT) is used to 1. Call external function. 2. Call internal IFUNC function. The best implementation is selected for the target processor at run-time. 3. Act as the canonical function address. 4. Support LD_AUDIT to audit external function calls. 5. Support LD_PROFILE to profile external function calls. PLT looks like: PLT0: push GOT[1] jmp *GOT[2] nop PLT1: jmp *GOT[name1_index] push name1_reloc_index jmp PLT0 GOT is an array of addresses. Initially the GOT entry of name1 is filled with the address of the "push name1_reloc_index" instruction. The function, name1, is called via "jmp *GOT[name1]" in the PLT entry. Even when lazy binding is disabled by "-z now", the PLT0 entry may still be used with LD_AUDIT or LD_PROFILE if PLT entry is used for canonical function address. When linker is invoked with "-z bndplt", a different PLT layout in .plt is used: PLT0: push GOT[1] bnd jmp *GOT[2] nop PLT1: push name1_reloc_index bnd jmp PLT0 nop together with a second PLT section, .pl.bnd: PLT1: bnd jmp *GOT[name1_index] nop where the GOT entry of name1 is filled with the address of the push instruction of the corresponding entry in .plt. 1. With lazy binding, when the external function, name1, is called the first time, dynamic linker is called via PLT0 to update GOT[name1_index] with the actual address of name1 and transfers control to name1 afterwards. 2. PLT is also used to call a local IFUNC function, name1, run-time loader updates GOT[name1_index] when loading the module. This patch 1. Remove PLT layout configurations from x86-64 backend_data. 2. Add generic, lay and non-lazy PLT layout configurations to x86-64 link_hash_table. Generic PLT layout includes the PLT entry templates, information how to update the first instruction in PLT and PLT eh_frame informaton, which are initialized in x86-64 setup_gnu_properties, based on "-z bndplt" and target selection. PLT section alignment is also set to PLT entry size for non-NaCl target. 3. Remove elf_x86_64_create_dynamic_sections. create_dynamic_sections isn't always called, but GOT relocations need GOT relocations. Instead, create all x86-64 specific dynamic sections with alignment to their entry size in x86-64 setup_gnu_properties, which initializes elf.dynobj, so that x86-64 check_relocs can be simplified. 4. Rewrite elf_x86_64_get_synthetic_symtab to check PLT sections against all dynamic relocations to support both lazy and non-lazy PLTs. There is no change in PLT. The only externally visible change is the improvement of synthetic PLT symbols for .plt.got. bfd/ * elf64-x86-64.c (PLT_ENTRY_SIZE): Renamed to ... (LAZY_PLT_ENTRY_SIZE): This. (NON_LAZY_PLT_ENTRY_SIZE): New. (elf_x86_64_plt0_entry): Renamed to ... (elf_x86_64_lazy_plt0_entry): This. (elf_x86_64_plt_entry): Renamed to ... (elf_x86_64_lazy_plt_entry): This. (elf_x86_64_bnd_plt0_entry): Renamed to ... (elf_x86_64_lazy_bnd_plt0_entry): This. (elf_x86_64_legacy_plt_entry): Removed. (elf_x86_64_bnd_plt_entry): Renamed to ... (elf_x86_64_lazy_bnd_plt_entry): This. (elf_x86_64_legacy_plt2_entry): Renamed to ... (elf_x86_64_non_lazy_plt_entry): This. (elf_x86_64_bnd_plt2_entry): Renamed to ... (elf_x86_64_non_lazy_bnd_plt_entry): This. (elf_x86_64_eh_frame_plt): Renamed to ... (elf_x86_64_eh_frame_lazy_plt): This. (elf_x86_64_eh_frame_bnd_plt): Renamed to ... (elf_x86_64_eh_frame_lazy_bnd_plt): This. (elf_x86_64_eh_frame_plt_got): Renamed to ... (elf_x86_64_eh_frame_non_lazy_plt): This. (elf_x86_64_lazy_plt_layout): New. (elf_x86_64_non_lazy_plt_layout): Likewise. (elf_x86_64_plt_layout): Likewise. (elf_x86_64_backend_data): Remove PLT layout information. Add os for target system. (GET_PLT_ENTRY_SIZE): Removed. (elf_x86_64_lazy_plt): New. (elf_x86_64_non_lazy_plt): Likewise. (elf_x86_64_lazy_bnd_plt): Likewise. (elf_x86_64_non_lazy_bnd_plt): Likewise. (elf_x86-64_arch_bed): Updated. (elf_x86_64_link_hash_table): Add plt, lazy_plt and non_lazy_plt. (elf_x86_64_create_dynamic_sections): Removed. (elf_x86_64_check_relocs): Don't check elf.dynobj. Don't call _bfd_elf_create_ifunc_sections nor _bfd_elf_create_got_section. (elf_x86-64_adjust_dynamic_symbol): Updated. (elf_x86_64_allocate_dynrelocs): Updated. Pass 0 as PLT header size to _bfd_elf_allocate_ifunc_dyn_relocs and don't allocate size for PLT0 if there is no PLT0. Get plt_entry_size from non_lazy_plt for non-lazy PLT entries. (elf_x86_64_size_dynamic_sections): Updated. Get plt_entry_size from non_lazy_plt for non-lazy PLT entries. (elf_x86-64_relocate_section): Updated. Properly get PLT index if there is no PLT0. (elf_x86_64_finish_dynamic_symbol): Updated. Fill the first slot in the PLT entry with generic PLT layout. Fill the non-lazy PLT entries with non-lazy PLT layout. Don't fill the second and third slots in the PLT entry if there is no PLT0. (elf_x86_64_finish_dynamic_sections): Updated. Don't fill PLT0 if there is no PLT0. Set sh_entsize on the .plt.got section. (compare_relocs): New. (elf_x86_64_plt_type): Likewise. (elf_x86_64_plt): Likewise. (elf_x86_64_nacl_plt): New. Forward declaration. (elf_x86_64_get_plt_sym_val): Removed. (elf_x86_64_get_synthetic_symtab): Rewrite to check PLT sections against all dynamic relocations. (elf_x86_64_link_setup_gnu_properties): New function. (elf_backend_create_dynamic_sections): Updated. (elf_backend_setup_gnu_properties): New. (elf_x86_64_nacl_plt): New. (elf_x86_64_nacl_arch_bed): Updated. ld/ * testsuite/ld-ifunc/ifunc-16-x86-64-now.d: New file. * testsuite/ld-ifunc/ifunc-2-local-x86-64-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-x86-64-now.d: Likewise. * testsuite/ld-ifunc/pr17154-x86-64-now.d: Likewise. * testsuite/ld-x86-64/bnd-branch-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-2-now.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1-now.d: Likewise. * testsuite/ld-x86-64/mpx3n.dd: Likewise. * testsuite/ld-x86-64/mpx4n.dd: Likewise. * testsuite/ld-x86-64/plt-main-bnd-now.rd: Likewise. * testsuite/ld-x86-64/plt2.dd: Likewise. * testsuite/ld-x86-64/plt2.rd: Likewise. * testsuite/ld-x86-64/plt2.s: Likewise. * testsuite/ld-x86-64/pr20830a-now.d: Likewise. * testsuite/ld-x86-64/pr20830b-now.d: Likewise. * testsuite/ld-x86-64/pr21038a-now.d: Likewise. * testsuite/ld-x86-64/pr21038b-now.d: Likewise. * testsuite/ld-x86-64/pr21038c-now.d: Likewise. * testsuite/ld-x86-64/load1b-nacl.d: Updated. * testsuite/ld-x86-64/load1b.d: Likewise. * testsuite/ld-x86-64/plt-main-bnd.dd: Likewise. * testsuite/ld-x86-64/pr20253-1h.d: Likewise. * testsuite/ld-x86-64/pr20830a.d: Update the .plt.got section with func@plt. * testsuite/ld-x86-64/pr20830b.d: Likewise. * testsuite/ld-x86-64/pr21038a.d: Likewise. * testsuite/ld-x86-64/pr21038c.d: Likewise. * testsuite/ld-x86-64/mpx.exp: Add some -z now tests. * testsuite/ld-x86-64/x86-64.exp: Likewise.
2017-05-08S/390: Fix ifunc missing runtime relocAndreas Krebbel3-7/+6
This fixes a problem with a missing R_390_64 reloc against .data for a function pointer to an ifunc function. No regressions on s390x. Pushed to mainline. bfd/ChangeLog: 2017-05-08 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * elf-s390-common.c: Don't check non_got_ref flag. * elf32-s390.c (elf_s390_relocate_section): Likewise. * elf64-s390.c (elf_s390_relocate_section): Likewise.
2017-05-08i386: Improve PLT generation and synthetic PLT symbolsH.J. Lu2-396/+884
On i386, the procedure linkage table (PLT) is used to 1. Call external function. 2. Call internal IFUNC function. The best implementation is selected for the target processor at run-time. 3. Act as the canonical function address. 4. Support LD_AUDIT to audit external function calls. 5. Support LD_PROFILE to profile external function calls. PLT looks like: PLT0: push GOT[1] jmp *GOT[2] nop PLT1: jmp *GOT[name1_index] push name1_reloc_index jmp PLT0 GOT is an array of addresses. Initially the GOT entry of name1 is filled with the address of the "push name1_reloc_index" instruction. The function, name1, is called via "jmp *GOT[name1]" in the PLT entry. Even when lazy binding is disabled by "-z now", the PLT0 entry may still be used with LD_AUDIT or LD_PROFILE if PLT entry is used for canonical function address. 1. With lazy binding, when the external function, name1, is called the first time, dynamic linker is called via PLT0 to update GOT[name1_index] with the actual address of name1 and transfers control to name1 afterwards. 2. PLT is also used to call a local IFUNC function, name1, run-time loader updates GOT[name1_index] when loading the module. This patch 1. Remove PLT layout configurations from i386 backend_data. 2. Add generic, lay and non-lazy PLT layout configurations to i386 link_hash_table. Generic PLT layout includes the PLT entry templates, information how to update the first instruction in PLT and PLT eh_frame informaton, which are initialized in i386 setup_gnu_properties, based on PIC and target selection. PLT section alignment is also set to PLT entry size for non-NaCl/VxWorks target. 3. Remove elf_i386_create_dynamic_sections. create_dynamic_sections isn't always called, but GOT relocations need GOT relocations. Instead, create all i386 specific dynamic sections in i386 setup_gnu_properties, which initializes elf.dynobj, so that i386 check_relocs can be simplified. 4. Rewrite elf_i386_get_synthetic_symtab to check PLT sections against all dynamic relocations to support both lazy and non-lazy PLTs. bfd/ * elf32-i386.c (PLT_ENTRY_SIZE): Renamed to ... (LAZY_PLT_ENTRY_SIZE): This. (NON_LAZY_PLT_ENTRY_SIZE): New. (elf_i386_plt0_entry): Renamed to ... (elf_i386_lazy_plt0_entry): This. (elf_i386_plt_entry): Renamed to ... (elf_i386_lazy_plt_entry): This. (elf_i386_pic_plt0_entry): Renamed to ... (elf_i386_pic_lazy_plt0_entry): This. (elf_i386_pic_plt_entry): Renamed to ... (elf_i386_pic_lazy_plt_entry): This. (elf_i386_got_plt_entry): Renamed to ... (elf_i386_non_lazy_plt_entry): This. (elf_i386_pic_got_plt_entry): Renamed to ... (elf_i386_pic_non_lazy_plt_entry): This. (elf_i386_eh_frame_plt): Renamed to ... (elf_i386_eh_frame_lazy_plt): This. (elf_i386_eh_frame_plt_got): Renamed to ... (elf_i386_eh_frame_non_lazy_plt): This. (elf_i386_plt_layout): Renamed to ... (elf_i386_lazy_plt_layout): This. Remove eh_frame_plt_got and eh_frame_plt_got_size. (elf_i386_non_lazy_plt_layout): New. (elf_i386_plt_layout): Likewise. (elf_i386_non_lazy_plt): Likewise. (GET_PLT_ENTRY_SIZE): Removed. (elf_i386_plt): Renamed to ... (elf_i386_lazy_plt): This. (elf_i386_backend_data): Remove plt. Rename is_vxworks to os. (elf_i386_arch_bed): Updated. (elf_i386_link_hash_table): Add plt, lazy_plt and non_lazy_plt. (elf_i386_create_dynamic_sections): Removed. (elf_i386_check_relocs): Don't check elf.dynobj. Don't call _bfd_elf_create_ifunc_sections nor _bfd_elf_create_got_section. (elf_i386_adjust_dynamic_symbol): Updated. (elf_i386_allocate_dynrelocs): Updated. Pass 0 as PLT header size to _bfd_elf_allocate_ifunc_dyn_relocs and don't allocate size for PLT0 if there is no PLT0. (elf_i386_size_dynamic_sections): Updated. Check whether GOT output section is discarded only if GOT isn't empty. (elf_i386_relocate_section): Updated. Properly get PLT index if there is no PLT0. (elf_i386_finish_dynamic_symbol): Updated. Don't fill the second and third slots in the PLT entry if there is no PLT0. (elf_i386_finish_dynamic_sections): Updated. Don't fill PLT0 if there is no PLT0. Set sh_entsize on the .plt.got section. (elf_i386_nacl_plt): Forward declaration. (elf_i386_get_plt_sym_val): Removed. (elf_i386_get_synthetic_symtab): Rewrite to check PLT sections against all dynamic relocations. (elf_i386_link_setup_gnu_properties): New function. (elf_backend_create_dynamic_sections): Updated. (elf_backend_setup_gnu_properties): New. (elf_i386_nacl_plt): Updated. (elf_i386_nacl_arch_bed): Likewise. (elf_i386_vxworks_arch_bed): Likewise. ld/ * testsuite/ld-i386/i386.exp: Add some -z now tests. * testsuite/ld-i386/plt-pic2.dd: New file. * testsuite/ld-i386/plt2.dd: Likewise. * testsuite/ld-i386/plt2.rd: Likewise. * testsuite/ld-i386/plt2.s: Likewise. * testsuite/ld-ifunc/ifunc-16-i386-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-i386-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-i386-now.d: Likewise. * testsuite/ld-ifunc/pr17154-i386-now.d: Likewise. * testsuite/ld-i386/pr20830.d: Update the .plt.got section with func@plt.
2017-05-08Make import libraries relocatable objectsThomas Preud'homme3-1/+13
For ELF targets --out-implib currently generates an executable file (e_type is ET_EXEC) despite the file being expected to be linked against some other object file to make an executable later. It seems therefore more sensible to make the import library a relocatable object file (e_type set to ET_REL). Incidentally, as dicted by requirement 8 of "ARM v8-M Security Extensions: Requirements on Development Tools" (document ARM-ECM-0359818) version 1.0, import libraries generated when using --cmse-implib *must* be relocatable object file so this commit also adds an assert there in case the type of ELF import library is changed again in the future. 2017-05-08 Thomas Preud'homme <thomas.preudhomme@arm.com> bfd/ * elflink.c (elf_output_implib): Remove executable flag from import library bfd. * elf32-arm.c (elf32_arm_filter_implib_symbols): Assert that the import library is a relocatable object file. ld/ * testsuite/ld-arm/arm-elf.exp (Secure gateway import library generation): Check e_type field of import library and executable produced. * testsuite/ld-arm/cmse-implib.type: Expectations for e_type field.
2017-05-08Automatic date update in version.inGDB Administrator1-1/+1
2017-05-07Automatic date update in version.inGDB Administrator1-1/+1
2017-05-06Automatic date update in version.inGDB Administrator1-1/+1
2017-05-05Automatic date update in version.inGDB Administrator1-1/+1
2017-05-04Fix PR21404 - assertion fail when calculating symbol sizeSenthil Kumar Selvaraj2-31/+69
Fix a host of problems related to adjustment of symbol values and sizes when relaxing for avr. 1. Adjust symbol size first before adjusting symbol value. Otherwise, a symbol whose value just got adjusted to the relaxed address also ends up getting resized. See pr21404-1.s. 2. Reduce symbol sizes only if their span is below an alignment boundary. Otherwise, the size gets decremented once when the actual instruction is relaxed and padding bytes are added, and again when the padding bytes are deleted (if padding ends up being unnecessary). pr21404-2.s addresses that, and this bug is really the root cause of PR21404. 3. Adjust all symbol values before an alignment boundary. Previous code did not adjust symbol values if they fell in the would-be padded area, resulting in incorrect symbol values in some cases (see pr21404-3.s). 4. Increase symbol sizes if alignment directives require so. As pr21404-4.s shows .global nonzero_sym L1: jmp L1 nonzero_sym: nop nop .p2align 2 .size nonzero_sym, .-nonzero_sym The two nops satisfy the 4 byte alignment at assembly time and therefore the size of nonzero_sym is 4. Relaxation shortens the 4 byte jmp to a 2 byte rjmp, and to satisfy 4 byte alignment the code places 2 extra padding bytes after the nops, increasing nonzero_sym's size by 2. This wasn't handled before. If the assembly code does not have any align directives, then the boundary is the section size, and symbol values and sizes == boundary should also get adjusted. To handle that case, add a did_pad variable and use that to determine whether it should use < boundary or <= boundary. Also get rid of reloc_toaddr, which is now redundant. toaddr is now not adjusted to handle the above case - the newly added did_pad variable does the job. pr21404-{5,6,7,8} are the same testcases written for local symbols, as the code handles them slightly differently.
2017-05-04Automatic date update in version.inGDB Administrator1-1/+1
2017-05-03Automatic date update in version.inGDB Administrator1-1/+1
2017-05-02RISC-V: Allow 32-bit BFD to handle 64-bit objectsPalmer Dabbelt2-2/+5
We've been telling people that the riscv32-* and riscv64-* toolchains are exactly the same, but it turns out we were lying: the riscv32-* BFD doesn't handle 64-bit objects. This fixes that difference, so the ports are actually the same. bfd/ChangeLog 2017-05-01 Palmer Dabbelt <palmer@dabbelt.com> * config.bfd (riscv32-*): Enable rv64.
2017-05-03PR 21384, --dynamic-list regression with f02cb058Alan Modra2-3/+17
The commit to "Always descend into output section statements in lang_do_assignments" meant that linker script symbols were not bfd_link_hash_new when ld called bfd_elf_record_link_assignment. This patch corrects that problem by testing h->non_elf instead. PR 21384 * elflink.c (bfd_elf_link_mark_dynamic_symbol): Test h->non_elf rather than h->root.type == bfd_link_hash_new. (bfd_elf_record_link_assignment): Similarly, call bfd_elf_link_mark_dynamic_symbol when h->non_elf.
2017-05-02Automatic date update in version.inGDB Administrator1-1/+1
2017-05-01Automatic date update in version.inGDB Administrator1-1/+1
2017-04-30Automatic date update in version.inGDB Administrator1-1/+1
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