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2022-07-18Automatic date update in version.inGDB Administrator1-1/+1
2022-07-17Automatic date update in version.inGDB Administrator1-1/+1
2022-07-16Automatic date update in version.inGDB Administrator1-1/+1
2022-07-15Automatic date update in version.inGDB Administrator1-1/+1
2022-07-14Automatic date update in version.inGDB Administrator1-1/+1
2022-07-13Automatic date update in version.inGDB Administrator1-1/+1
2022-07-12PR29355, ld segfaults with -r/-q and custom-named section .rela*Alan Modra1-4/+4
The bug testcase uses an output section named .rel or .rela which has input .data sections mapped to it. The input .data section has relocations. When counting output relocations SHT_REL and SHT_RELA section reloc_count is ignored, with the justification that reloc sections themselves can't have relocations and some backends use reloc_count in reloc sections. However, the test wrongly used the output section type (which normally would match input section type). Fix that. Note that it is arguably wrong for ld to leave the output .rel/.rela section type as SHT_REL/SHT_RELA when non-empty non-reloc sections are written to it, but I'm not going to change that since it might be useful to hand-craft relocs in a data section that is then written to a SHT_REL/SHT_RELA output section. PR 29355 * elflink.c (bfd_elf_final_link): Use input section type rather than output section type to determine whether to exclude using reloc_count from that section.
2022-07-12Automatic date update in version.inGDB Administrator1-1/+1
2022-07-11Automatic date update in version.inGDB Administrator1-1/+1
2022-07-10Automatic date update in version.inGDB Administrator1-1/+1
2022-07-09Automatic date update in version.inGDB Administrator1-1/+1
2022-07-08Update version to 2.39.50 and regenerate filesNick Clifton3-1273/+1413
2022-07-08Add markers for 2.39 branchNick Clifton1-0/+4
2022-07-08Automatic date update in version.inGDB Administrator1-1/+1
2022-07-07RISC-V: Added Zfhmin and Zhinxmin.Tsukasa OI1-45/+52
This commit adds Zfhmin and Zhinxmin extensions (subsets of Zfh and Zhinx extensions, respectively). In the process supporting Zfhmin and Zhinxmin extension, this commit also changes how instructions are categorized considering Zfhmin, Zhinx and Zhinxmin extensions. Detailed changes, * From INSN_CLASS_ZFH to INSN_CLASS_ZFHMIN: flh, fsh, fmv.x.h and fmv.h.x. * From INSN_CLASS_ZFH to INSN_CLASS_ZFH_OR_ZHINX: fmv.h. * From INSN_CLASS_ZFH_OR_ZHINX to INSN_CLASS_ZFH_OR_ZHINX: fneg.h, fabs.h, fsgnj.h, fsgnjn.h, fsgnjx.h, fadd.h, fsub.h, fmul.h, fdiv.h, fsqrt.h, fmin.h, fmax.h, fmadd.h, fnmadd.h, fmsub.h, fnmsub.h, fcvt.w.h, fcvt.wu.h, fcvt.h.w, fcvt.h.wu, fcvt.l.h, fcvt.lu.h, fcvt.h.l, fcvt.h.lu, feq.h, flt.h, fle.h, fgt.h, fge.h, fclass.h. * From INSN_CLASS_ZFH_OR_ZHINX to INSN_CLASS_ZFHMIN_OR_ZHINXMIN: fcvt.s.h and fcvt.h.s. * From INSN_CLASS_D_AND_ZFH_INX to INSN_CLASS_ZFHMIN_AND_D: fcvt.d.h and fcvt.h.d. * From INSN_CLASS_Q_AND_ZFH_INX to INSN_CLASS_ZFHMIN_AND_Q: fcvt.q.h and fcvt.h.q. bfd/ChangeLog: * elfxx-riscv.c (riscv_implicit_subsets): Change implicit subsets. Zfh->Zicsr is not needed and Zfh->F is replaced with Zfh->Zfhmin and Zfhmin->F. Zhinx->Zicsr is not needed and Zhinx->Zfinx is replaced with Zhinx->Zhinxmin and Zhinxmin->Zfinx. (riscv_supported_std_z_ext): Added zfhmin and zhinxmin. (riscv_multi_subset_supports): Rewrite handling for new instruction classes. (riscv_multi_subset_supports_ext): Updated. (riscv_parse_check_conflicts): Change error message to include zfh and zfhmin extensions. gas/ChangeLog: * testsuite/gas/riscv/zfhmin-d-insn-class-fail.s: New complex error handling test. * testsuite/gas/riscv/zfhmin-d-insn-class-fail-1.d: Likewise. * testsuite/gas/riscv/zfhmin-d-insn-class-fail-1.l: Likewise. * testsuite/gas/riscv/zfhmin-d-insn-class-fail-2.d: Likewise. * testsuite/gas/riscv/zfhmin-d-insn-class-fail-2.l: Likewise. * testsuite/gas/riscv/zfhmin-d-insn-class-fail-3.d: Likewise. * testsuite/gas/riscv/zfhmin-d-insn-class-fail-3.l: Likewise. * testsuite/gas/riscv/zfhmin-d-insn-class-fail-4.d: Likewise. * testsuite/gas/riscv/zfhmin-d-insn-class-fail-4.l: Likewise. * testsuite/gas/riscv/zfhmin-d-insn-class-fail-5.d: Likewise. * testsuite/gas/riscv/zfhmin-d-insn-class-fail-5.l: Likewise. * testsuite/gas/riscv/zhinx.d: Renamed from fp-zhinx-insns.d and refactored. * testsuite/gas/riscv/zhinx.s: Likewise. include/ChangeLog: * opcode/riscv.h (enum riscv_insn_class): Removed INSN_CLASS_ZFH, INSN_CLASS_D_AND_ZFH_INX and INSN_CLASS_Q_AND_ZFH_INX. Added INSN_CLASS_ZFHMIN, INSN_CLASS_ZFHMIN_OR_ZHINXMIN, INSN_CLASS_ZFHMIN_AND_D and INSN_CLASS_ZFHMIN_AND_Q. opcodes/ChangeLog: * riscv-opc.c (riscv_opcodes): Change instruction classes for Zfh and Zfhmin instructions. Fix `fcvt.h.lu' instruction (two operand variant) mask.
2022-07-07RISC-V: Fix requirement handling on Zhinx+{D,Q}Tsukasa OI1-5/+25
This commit fixes how instructions are masked on Zhinx+Z{d,q}inx. fcvt.h.d and fcvt.d.h require ((D&&Zfh)||(Zdinx&&Zhinx)) and fcvt.h.q and fcvt.q.h require ((Q&&Zfh)||(Zqinx&&Zhinx)). bfd/ChangeLog: * elfxx-riscv.c (riscv_multi_subset_supports): Fix feature gate on INSN_CLASS_{D,Q}_AND_ZFH_INX. (riscv_multi_subset_supports_ext): Fix feature gate diagnostics on INSN_CLASS_{D,Q}_AND_ZFH_INX. gas/ChangeLog: * testsuite/gas/riscv/fp-zhinx-insns.d: Add Zqinx to -march for proper testing.
2022-07-07Automatic date update in version.inGDB Administrator1-1/+1
2022-07-06elf: Copy p_align of PT_GNU_STACK for stack alignmentH.J. Lu1-1/+3
commit 74e315dbfe5200c473b226e937935fb8ce391489 Author: H.J. Lu <hjl.tools@gmail.com> Date: Mon Dec 13 19:46:04 2021 -0800 elf: Set p_align to the minimum page size if possible may ignore p_align of PT_GNU_STACK when copying ELF program header if the maximum page size is larger than p_align of PT_LOAD segments. Copy p_align of PT_GNU_STACK since p_align of PT_GNU_STACK describes stack alignment, not page size, PR binutils/29319 * elf.c (copy_elf_program_header): Copy p_align of PT_GNU_STACK for stack alignment.
2022-07-06Automatic date update in version.inGDB Administrator1-1/+1
2022-07-05Automatic date update in version.inGDB Administrator1-1/+1
2022-07-04RISC-V: Update Zihintpause extension versionTsukasa OI1-1/+1
Because ratified Zihintpause extension has a version number of 2.0 (not 1.0), we should update the number. bfd/ChangeLog: * elfxx-riscv.c (riscv_supported_std_z_ext): Update version number of Zihintpause extension.
2022-07-04Automatic date update in version.inGDB Administrator1-1/+1
2022-07-03Automatic date update in version.inGDB Administrator1-1/+1
2022-07-02Automatic date update in version.inGDB Administrator1-1/+1
2022-07-01Automatic date update in version.inGDB Administrator1-1/+1
2022-06-30Automatic date update in version.inGDB Administrator1-1/+1
2022-06-29Automatic date update in version.inGDB Administrator1-1/+1
2022-06-28bfd: handle codepage when opening files on MinGWClément Chigot1-3/+9
Even if MS docs say that CP_UTF8 should always be used on newer applications, forcing it might produce undefined filename if the encoding isn't UTF-8. MinGW seems to call ___lc_codepage_func() in order to retrieve the current thread codepage. bfd/ChangeLog: * bfdio.c (_bfd_real_fopen): Retrieve codepage with ___lc_codepage_func() on MinGW.
2022-06-28PowerPC64: align plt_branch stubsAlan Modra1-20/+34
plt_branch stubs are similar to plt_call stubs in that they branch via bctr. Align them too. bfd/ * elf64-ppc.c (ppc_size_one_stub): Align plt_branch stubs as for plt_call stubs. ld/ * testsuite/ld-powerpc/elfv2exe.d: Adjust for plt_branch changes. * testsuite/ld-powerpc/notoc.d: Likewise. * testsuite/ld-powerpc/notoc.wf: Likewise. * testsuite/ld-powerpc/notoc3.d: Likewise. * testsuite/ld-powerpc/pr23937.d: Likewise.
2022-06-28PowerPC64: plt_stub_padAlan Modra1-32/+19
* elf64-ppc.c (plt_stub_pad): Simplify parameters and untangle from plt_stub_size. (ppc_size_one_stub): Call plt_stub_size before plt_stub_pad to provide size. Recalculate size if it might change.
2022-06-28PowerPC64: Tidy stub type changesAlan Modra1-4/+4
It made sense before I started using separate fields for main type and sub type to add a difference in main type to the type (thus keeping sub type unchanged). Not so much now. * elf64-ppc.c (ppc_merge_stub): Simplify stub type change. (ppc_size_one_stub): Likewise.
2022-06-28PR29293, elfnn-aarch64.c: def_protected member unintializedPekka Seppänen1-0/+1
PR 29293 * elfnn-aarch64.c (elfNN_aarch64_link_hash_newfunc): Init def_protected.
2022-06-28RISC-V: Add 'Sstc' extension and its CSRsTsukasa OI1-0/+1
This commit adds "stimecmp / vstimecmp" Extension (Sstc) and its CSRs. bfd/ChangeLog: * elfxx-riscv.c (riscv_supported_std_s_ext): Add 'Sstc' extension to valid 'S' extension list. gas/ChangeLog: * config/tc-riscv.c (enum riscv_csr_class): Add CSR classes for 'Sstc' extension. (riscv_csr_address): Add handling for new CSR classes. * testsuite/gas/riscv/csr-dw-regnums.s: Add new CSRs. * testsuite/gas/riscv/csr-dw-regnums.d: Likewise. * testsuite/gas/riscv/csr.s: Add new CSRs. * testsuite/gas/riscv/csr-version-1p9p1.d: Likewise. * testsuite/gas/riscv/csr-version-1p9p1.l: Likewise. * testsuite/gas/riscv/csr-version-1p10.d: Likewise. * testsuite/gas/riscv/csr-version-1p10.l: Likewise. * testsuite/gas/riscv/csr-version-1p11.d: Likewise. * testsuite/gas/riscv/csr-version-1p11.l: Likewise. * testsuite/gas/riscv/csr-version-1p12.d: Likewise. * testsuite/gas/riscv/csr-version-1p12.l: Likewise. include/ChangeLog: * opcode/riscv-opc.h (CSR_STIMECMP, CSR_STIMECMPH, CSR_VSTIMECMP, CSR_VSTIMECMPH): New CSR macros.
2022-06-28RISC-V: Add 'Sscofpmf' extension with its CSRsTsukasa OI1-0/+1
This commit adds Count Overflow and Mode-Based Filtering Extension (Sscofpmf) and its CSRs. bfd/ChangeLog: * elfxx-riscv.c (riscv_supported_std_s_ext): Add 'Sscofpmf' extension to valid 'S' extension list. gas/ChangeLog: * config/tc-riscv.c (enum riscv_csr_class): Add CSR classes for 'Sscofpmf' extension. (riscv_csr_address): Add handling for new CSR classes. * testsuite/gas/riscv/csr-dw-regnums.s: Add new CSRs. * testsuite/gas/riscv/csr-dw-regnums.d: Likewise. * testsuite/gas/riscv/csr.s: Add new CSRs. * testsuite/gas/riscv/csr-version-1p9p1.d: Likewise. * testsuite/gas/riscv/csr-version-1p9p1.l: Likewise. * testsuite/gas/riscv/csr-version-1p10.d: Likewise. * testsuite/gas/riscv/csr-version-1p10.l: Likewise. * testsuite/gas/riscv/csr-version-1p11.d: Likewise. * testsuite/gas/riscv/csr-version-1p11.l: Likewise. * testsuite/gas/riscv/csr-version-1p12.d: Likewise. * testsuite/gas/riscv/csr-version-1p12.l: Likewise. include/ChangeLog: * opcode/riscv-opc.h (CSR_SCOUNTOVF, CSR_MHPMEVENT3H, CSR_MHPMEVENT4H, CSR_MHPMEVENT5H, CSR_MHPMEVENT6H, CSR_MHPMEVENT7H, CSR_MHPMEVENT8H, CSR_MHPMEVENT9H, CSR_MHPMEVENT10H, CSR_MHPMEVENT11H, CSR_MHPMEVENT12H, CSR_MHPMEVENT13H, CSR_MHPMEVENT14H, CSR_MHPMEVENT15H, CSR_MHPMEVENT16H, CSR_MHPMEVENT17H, CSR_MHPMEVENT18H, CSR_MHPMEVENT19H, CSR_MHPMEVENT20H, CSR_MHPMEVENT21H, CSR_MHPMEVENT22H, CSR_MHPMEVENT23H, CSR_MHPMEVENT24H, CSR_MHPMEVENT25H, CSR_MHPMEVENT26H, CSR_MHPMEVENT27H, CSR_MHPMEVENT28H, CSR_MHPMEVENT29H, CSR_MHPMEVENT30H, CSR_MHPMEVENT31H): New CSR macros.
2022-06-28RISC-V: Add 'Smstateen' extension and its CSRsTsukasa OI1-0/+1
This commit adds State Enable Extension (Smstateen) and its CSRs. bfd/ChangeLog: * elfxx-riscv.c (riscv_supported_std_s_ext): Add 'Smstateen' extension to valid 'S' extension list. gas/ChangeLog: * config/tc-riscv.c (enum riscv_csr_class): Add CSR classes for 'Smstateen' extension. (riscv_csr_address): Add handling for new CSR classes. * testsuite/gas/riscv/csr-dw-regnums.s: Add new CSRs. * testsuite/gas/riscv/csr-dw-regnums.d: Likewise. * testsuite/gas/riscv/csr.s: Add new CSRs. * testsuite/gas/riscv/csr-version-1p9p1.d: Likewise. * testsuite/gas/riscv/csr-version-1p9p1.l: Likewise. * testsuite/gas/riscv/csr-version-1p10.d: Likewise. * testsuite/gas/riscv/csr-version-1p10.l: Likewise. * testsuite/gas/riscv/csr-version-1p11.d: Likewise. * testsuite/gas/riscv/csr-version-1p11.l: Likewise. * testsuite/gas/riscv/csr-version-1p12.d: Likewise. * testsuite/gas/riscv/csr-version-1p12.l: Likewise. include/ChangeLog: * opcode/riscv-opc.h (CSR_MSTATEEN0, CSR_MSTATEEN1, CSR_MSTATEEN2, CSR_MSTATEEN3, CSR_SSTATEEN0, CSR_SSTATEEN1, CSR_SSTATEEN2, CSR_SSTATEEN3, CSR_HSTATEEN0, CSR_HSTATEEN1, CSR_HSTATEEN2, CSR_HSTATEEN3, CSR_MSTATEEN0H, CSR_MSTATEEN1H, CSR_MSTATEEN2H, CSR_MSTATEEN3H, CSR_HSTATEEN0H, CSR_HSTATEEN1H, CSR_HSTATEEN2H, CSR_HSTATEEN3H): New CSR macros.
2022-06-28Automatic date update in version.inGDB Administrator1-1/+1
2022-06-27bfd: prune config.bfd's setting of targ_archsJan Beulich1-5/+1
The final "match all" case can take care of a few explicit entries: Purge those. Also move s12z* into proper position (the table is otherwise sorted, after all).
2022-06-27drop XC16x bitsJan Beulich13-592/+0
Commit 04f096fb9e25 ("Move the xc16x target to the obsolete list") moved the architecture from the "obsolete but still available" to the "obsolete / support removed" list in config.bfd, making the architecture impossible to enable (except maybe via "enable everything" options"). Note that I didn't touch */po/*.po{,t} on the assumption that these would be updated by some (half)automatic means.
2022-06-27Automatic date update in version.inGDB Administrator1-1/+1
2022-06-26Automatic date update in version.inGDB Administrator1-1/+1
2022-06-25arm: Define elf_backend_extern_protected_data to 0 [PR 18705]Fangrui Song1-1/+1
Similar to commit 4fb55bf6a9606eb7b626c30a9f4e71d6c2d4fbb2 for aarch64. Commit b68a20d6675f1360ea4db50a9835c073675b9889 changed ld to produce R_ARM_GLOB_DAT but that defeated the purpose of protected visibility as an optimization. Restore the previous behavior (which matches ld.lld) by defining elf_backend_extern_protected_data to 0.
2022-06-25Automatic date update in version.inGDB Administrator1-1/+1
2022-06-24Automatic date update in version.inGDB Administrator1-1/+1
2022-06-23PowerPC64: fix assertion in ppc_build_one_stub with -Os codeAlan Modra1-1/+2
save_res stubs aren't written in ppc_build_one_stub, their offsets (which are zero) should not be checked. * elf64-ppc.c (ppc_build_one_stub): Don't check save_res offsets.
2022-06-23Re: PowerPC64: stub debug dumpAlan Modra1-41/+61
Let's show the current stub as well as the previous one. Of interest is the current offset and a new field, id. Check that the build hash table traversal is in the same order as sizing traversal too. * elf64-ppc.c (struct ppc_stub_hash_entry): Add id. (struct ppc_link_hash_table): Add stub_id. (stub_hash_newfunc): Init id and symtype. (dump_stub): New function, extracted from.. (dump_previous_stub): ..here. Deleted. (ppc_build_one_stub): Sanity check stub id as well as offset. Show current stub as well as previous. (ppc_size_one_stub): Set stub id. (ppc64_elf_size_stubs): Init stub_id before traversal. (ppc64_elf_build_stubs): Likewise.
2022-06-23aarch64: Allow PC-relative relocations against protected STT_FUNC for -sharedFangrui Song1-1/+1
__attribute__((visibility("protected"))) void *foo() { return (void *)foo; } gcc -fpic -shared -fuse-ld=bfd fails with the confusing diagnostic: relocation R_AARCH64_ADR_PREL_PG_HI21 against symbol `foo' which may bind externally can not be used when making a shared object; recompile with -fPIC Call _bfd_elf_symbol_refs_local_p with local_protected==true to suppress the error. The new behavior matches gold and ld.lld. Note: if some code tries to use direct access relocations to take the address of foo (likely due to -fno-pic), the pointer equality will break, but the error should be reported on the executable link, not on the innocent shared object link. glibc 2.36 will give a warning at relocation resolving time.
2022-06-23aarch64: Define elf_backend_extern_protected_data to 0 [PR 18705]Fangrui Song1-1/+1
Follow-up to commit 90b7a5df152a64d2bea20beb438e8b81049a5c30 ("aarch64: Disallow copy relocations on protected data"). Commit 32f573bcb3aaa1c9defcad79dbb5851fcc02ae2d changed ld to produce R_AARCH64_GLOB_DAT but that defeated the purpose of protected visibility as an optimization. Restore the previous behavior (which matches ld.lld) by defining elf_backend_extern_protected_data to 0.
2022-06-23Automatic date update in version.inGDB Administrator1-1/+1
2022-06-22aarch64: Disallow copy relocations on protected dataFangrui Song1-1/+27
If an executable has copy relocations for extern protected data, that can only work if the shared object containing the definition is built with assumptions (a) the compiler emits GOT-generating relocations (b) the linker produces R_*_GLOB_DAT instead of R_*_RELATIVE. Otherwise the shared object uses its own definition directly and the executable accesses a stale copy. Note: the GOT relocations defeat the purpose of protected visibility as an optimization, and it turns out this never worked perfectly. glibc 2.36 will warn on copy relocations on protected data. Let's produce a warning at link time, matching ld.lld which has been used on many aarch64 OSes. Note: x86 requires GNU_PROPERTY_NO_COPY_ON_PROTECTED to have the error. This is to largely due to GCC 5's "x86-64: Optimize access to globals in PIE with copy reloc" which started to use direct access relocations for external data symbols in -fpie mode. GCC's aarch64 port does not have the change. Nowadays with most builds switching to -fpie/-fpic, aarch64 mostly doesn't need to worry about copy relocations. So for aarch64 we simply don't check GNU_PROPERTY_NO_COPY_ON_PROTECTED.
2022-06-22RISC-V: Reorder the prefixed extensions which are out of order.Nelson Chu1-23/+0
This patch has been pending for almost a year... However, I noticed that llvm can already re-order the extensions, even if they are out of orders. Not really sure if they can also re-order the single letter extensions, but at least we can do this for the multi-letter extensions in binutils. bfd/ * elfxx-riscv.c (riscv_parse_prefixed_ext): Removed the code which are used to check the prefixed extension orders. gas/ * testsuite/gas/riscv/march-fail-order-x-z.d: Removed since we will help tp reorder the prefixed extensions for now. * testsuite/gas/riscv/march-fail-order-x-z.l: Likewise. * testsuite/gas/riscv/march-fail-order-x.d: Likewise. * testsuite/gas/riscv/march-fail-order-x.l: Likewise. * testsuite/gas/riscv/march-fail-order-z.d: Likewise. * testsuite/gas/riscv/march-fail-order-z.l: Likewise.
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