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ELF linker shouldn't skip the IR object when searching the symbol table
of an archive element. If linker doesn't know if the object file is an
IR object, it should give LTO plugin a chance to get the correct symbol
table and use the IR symbol table if the input is an IR object.
bfd/
PR ld/18250
PR ld/20267
* elflink.c: Include plugin.h if BFD_SUPPORTS_PLUGINS is
defined.
(elf_link_is_defined_archive_symbol): Call
bfd_link_plugin_object_p on unknown plugin object and use the
IR symbol table if the input is an IR object.
* plugin.c (bfd_link_plugin_object_p): New function.
* plugin.h (bfd_link_plugin_object_p): New prototype.
ld/
PR ld/20267
* testsuite/ld-plugin/lto.exp (lto_link_tests): Add test for
PR ld/20267.
(lto_run_tests): Likewise.
* testsuite/ld-plugin/pr20267a.c: New file.
* testsuite/ld-plugin/pr20267b.c: Likewise.
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Also, don't check alignment on symbol from plugin dummy input.
bfd/
PR ld/20276
* elflink.c (elf_link_add_object_symbols): Don't check alignment
on symbol from plugin dummy input.
ld/
PR ld/20276
* plugin.c (plugin_notice): Set non_ir_ref on common symbols.
* testsuite/ld-plugin/lto.exp (lto_link_tests): Add test for
PR ld/20276.
(lto_run_tests): Likewise.
* testsuite/ld-plugin/pass.out: New file.
* testsuite/ld-plugin/pr20276a.c: Likewise.
* testsuite/ld-plugin/pr20276b.c: Likewise.
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bfd/
* bfd.c (bfd_plugin_format): Rename bfd_plugin_uknown to
bfd_plugin_unknown.
* bfd-in2.h: Regenerated.
* plugin.c (bfd_plugin_object_p): Replace bfd_plugin_uknown
with bfd_plugin_unknown.
ld/
* plugin.c (plugin_object_p): Replace bfd_plugin_uknown
with bfd_plugin_unknown.
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If a backend supports it, PLT entry isn't needed when all references
to a STT_GNU_IFUNC symbols are done via GOT or static function pointers.
For GOT entries, We generate dynamic R_*_GLOB_DAT relocations for
preemptable symbols and R_*_IRELATIVE relocations for non-preemptable
symbols to update them with real function address. For static pointer
pointers, we generate dynamic pointer relocations and store them in:
1. .rel[a].ifunc section in PIC object.
2. .rel[a].got section in dynamic executable.
3. .rel[a].iplt section in static executable.
We don't allocate GOT entry if it isn't used.
bfd/
PR ld/20253
* elf-bfd.h (_bfd_elf_allocate_ifunc_dyn_relocs): Add an
bfd_boolean argument.
* elf-ifunc.c (_bfd_elf_create_ifunc_sections): Replace
"shared object" with "PIC object" in comments.
(_bfd_elf_allocate_ifunc_dyn_relocs): Updated. Replace
"shared object" with "PIC object" in comments. Avoid PLT if
requested. Generate dynamic relocations for non-GOT references.
Make room for the special first entry in PLT and allocate PLT
entry only for PLT and PC-relative references. Store dynamic
GOT relocations in .rel[a].iplt section for static executables.
If PLT isn't used, always use GOT for symbol value. Don't
allocate GOT entry if it isn't used.
* elf32-i386.c (elf_i386_check_relocs): Increment PLT reference
count only in the code section. Allocate dynamic pointer
relocation against STT_GNU_IFUNC symbol in the non-code section.
(elf_i386_adjust_dynamic_symbol): Increment PLT reference count
only for PC-relative references.
(elf_i386_allocate_dynrelocs): Pass TRUE to
_bfd_elf_allocate_ifunc_dyn_relocs.
(elf_i386_relocate_section): Allow R_386_GOT32/R_386_GOT32X
relocations against STT_GNU_IFUNC symbols without PLT. Generate
dynamic pointer relocation against STT_GNU_IFUNC symbol in
the non-code section and store it in the proper REL section.
Don't allow non-pointer relocation against STT_GNU_IFUNC symbol
without PLT.
(elf_i386_finish_dynamic_symbol): Generate dynamic
R_386_IRELATIVE and R_386_GLOB_DAT GOT relocations against
STT_GNU_IFUNC symbols without PLT.
(elf_i386_finish_dynamic_sections): Don't handle local
STT_GNU_IFUNC symbols here.
(elf_i386_output_arch_local_syms): Handle local STT_GNU_IFUNC
symbols here.
(elf_backend_output_arch_local_syms): New.
* elf32-x86-64.c (elf_i386_check_relocs): Increment PLT reference
count only in the code section. Allocate dynamic pointer
relocation against STT_GNU_IFUNC symbol in the non-code section.
(elf_x86_64_adjust_dynamic_symbol): Increment PLT reference
count only for PC-relative references.
(elf_x86_64_allocate_dynrelocs): Pass TRUE to
_bfd_elf_allocate_ifunc_dyn_relocs.
(elf_x86_64_relocate_section): Allow R_X86_64_GOTPCREL,
R_X86_64_GOTPCRELX, R_X86_64_REX_GOTPCRELX and
R_X86_64_GOTPCREL64 relocations against STT_GNU_IFUNC symbols
without PLT. Generate dynamic pointer relocation against
STT_GNU_IFUNC symbol in the non-code section and store it in
the proper RELA section. Don't allow non-pointer relocation
against STT_GNU_IFUNC symbol without PLT.
(elf_x86_64_finish_dynamic_symbol): Generate dynamic
R_X86_64_IRELATIVE and R_X86_64_GLOB_DAT GOT relocations against
STT_GNU_IFUNC symbols without PLT.
(elf_x86_64_finish_dynamic_sections): Don't handle local
STT_GNU_IFUNC symbols here.
(elf_x86_64_output_arch_local_syms): Handle local STT_GNU_IFUNC
symbols here.
(elf_backend_output_arch_local_syms): New.
* elfnn-aarch64.c (elfNN_aarch64_allocate_ifunc_dynrelocs):
Pass FALSE to _bfd_elf_allocate_ifunc_dyn_relocs.
ld/
PR ld/20253
* testsuite/ld-i386/i386.exp: Run PR ld/20253 tests.
* testsuite/ld-i386/no-plt.exp: Likewise.
* testsuite/ld-x86-64/no-plt.exp: Likewise.
* testsuite/ld-i386/pr13302.d: Remove .rel.plt section.
* testsuite/ld-ifunc/ifunc-13-i386.d: Likewise.
* testsuite/ld-ifunc/ifunc-13-x86-64.d: Likewise.
* testsuite/ld-ifunc/ifunc-15-i386.d: Likewise.
* testsuite/ld-ifunc/ifunc-15-x86-64.d: Likewise.
* testsuite/ld-x86-64/pr13082-5a.d: Likewise.
* testsuite/ld-x86-64/pr13082-5b.d: Likewise.
* testsuite/ld-x86-64/pr13082-6a.d: Likewise.
* testsuite/ld-x86-64/pr13082-6b.d: Likewise.
* testsuite/ld-i386/pr20244-2a.d: Remove .plt section.
* testsuite/ld-ifunc/ifunc-21-i386.d: Likewise.
* testsuite/ld-ifunc/ifunc-21-x86-64.d: Likewise.
* testsuite/ld-ifunc/ifunc-22-i386.d: Likewise.
* testsuite/ld-ifunc/ifunc-22-x86-64.d: Likewise.
* testsuite/ld-i386/pr20244-2b.d: Updated.
* testsuite/ld-i386/pr20244-2c.d: Likewise.
* testsuite/ld-ifunc/ifunc-18a-i386.d: Likewise.
* testsuite/ld-ifunc/ifunc-18a-x86-64.d: Likewise.
* testsuite/ld-ifunc/ifunc-18b-i386.d: Likewise.
* testsuite/ld-ifunc/ifunc-18b-x86-64.d: Likewise.
* testsuite/ld-i386/pr20253-1a.c: New file.
* testsuite/ld-i386/pr20253-1b.S: Likewise.
* testsuite/ld-i386/pr20253-1c.S: Likewise.
* testsuite/ld-i386/pr20253-1d.S: Likewise.
* testsuite/ld-i386/pr20253-2a.c: Likewise.
* testsuite/ld-i386/pr20253-2b.S: Likewise.
* testsuite/ld-i386/pr20253-2c.S: Likewise.
* testsuite/ld-i386/pr20253-2d.S: Likewise.
* testsuite/ld-i386/pr20253-3.d: Likewise.
* testsuite/ld-i386/pr20253-3.s: Likewise.
* testsuite/ld-i386/pr20253-4.s: Likewise.
* testsuite/ld-i386/pr20253-4a.d: Likewise.
* testsuite/ld-i386/pr20253-4b.d: Likewise.
* testsuite/ld-i386/pr20253-4c.d: Likewise.
* testsuite/ld-i386/pr20253-5.d: Likewise.
* testsuite/ld-i386/pr20253-5.s: Likewise.
* testsuite/ld-ifunc/ifunc-23-x86.s: Likewise.
* testsuite/ld-ifunc/ifunc-23a-x86.d: Likewise.
* testsuite/ld-ifunc/ifunc-23b-x86.d: Likewise.
* testsuite/ld-ifunc/ifunc-23c-x86.d: Likewise.
* testsuite/ld-ifunc/ifunc-24-x86.s: Likewise.
* testsuite/ld-ifunc/ifunc-24a-x86.d: Likewise.
* testsuite/ld-ifunc/ifunc-24b-x86.d: Likewise.
* testsuite/ld-ifunc/ifunc-24c-x86.d: Likewise.
* testsuite/ld-ifunc/ifunc-25-x86.s: Likewise.
* testsuite/ld-ifunc/ifunc-25a-x86.d: Likewise.
* testsuite/ld-ifunc/ifunc-25b-x86.d: Likewise.
* testsuite/ld-ifunc/ifunc-25c-x86.d: Likewise.
* testsuite/ld-x86-64/pr20253-1.s: Likewise.
* testsuite/ld-x86-64/pr20253-1a.d: Likewise.
* testsuite/ld-x86-64/pr20253-1b.d: Likewise.
* testsuite/ld-x86-64/pr20253-1c.d: Likewise.
* testsuite/ld-x86-64/pr20253-1d.d: Likewise.
* testsuite/ld-x86-64/pr20253-1e.d: Likewise.
* testsuite/ld-x86-64/pr20253-1f.d: Likewise.
* testsuite/ld-x86-64/pr20253-1g.d: Likewise.
* testsuite/ld-x86-64/pr20253-1h.d: Likewise.
* testsuite/ld-x86-64/pr20253-1i.d: Likewise.
* testsuite/ld-x86-64/pr20253-1j.d: Likewise.
* testsuite/ld-x86-64/pr20253-1k.d: Likewise.
* testsuite/ld-x86-64/pr20253-1l.d: Likewise.
* testsuite/ld-x86-64/pr20253-2a.c: Likewise.
* testsuite/ld-x86-64/pr20253-2b.S: Likewise.
* testsuite/ld-x86-64/pr20253-2c.S: Likewise.
* testsuite/ld-x86-64/pr20253-2d.S: Likewise.
* testsuite/ld-x86-64/pr20253-3.d: Likewise.
* testsuite/ld-x86-64/pr20253-3.s: Likewise.
* testsuite/ld-x86-64/pr20253-4.s: Likewise.
* testsuite/ld-x86-64/pr20253-4a.d: Likewise.
* testsuite/ld-x86-64/pr20253-4b.d: Likewise.
* testsuite/ld-x86-64/pr20253-4c.d: Likewise.
* testsuite/ld-x86-64/pr20253-4d.d: Likewise.
* testsuite/ld-x86-64/pr20253-4e.d: Likewise.
* testsuite/ld-x86-64/pr20253-4f.d: Likewise.
* testsuite/ld-x86-64/pr20253-5.s: Likewise.
* testsuite/ld-x86-64/pr20253-5a.d: Likewise.
* testsuite/ld-x86-64/pr20253-5b.d: Likewise.
* testsuite/ld-ifunc/ifunc-18a-i386.d: Remove extra IRELATIVE
relocation.
* testsuite/ld-ifunc/ifunc-18a-x86-64.d: Likewise.
* testsuite/ld-ifunc/ifunc-18b-i386.d: Likewise.
* testsuite/ld-ifunc/ifunc-18b-x86-64.d: Likewise.
* testsuite/ld-ifunc/ifunc-18a.s: Fix a typo.
* testsuite/ld-x86-64/x86-64.exp: Run pr20253-1 tests.
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2016-06-17 Thomas Preud'homme <thomas.preudhomme@arm.com>
Tony Wang <tony.wang@arm.com>
bfd/
* elf32-arm.c (elf32_arm_stub_long_branch_thumb2_only): Define stub
sequence.
(stub_long_branch_thumb2_only): Define stub.
(arm_stub_is_thumb): Add case for arm_stub_long_branch_thumb2_only.
(arm_stub_long_branch_thumb2_only): Likewise.
(arm_type_of_stub): Use arm_stub_long_branch_thumb2_only for Thumb-2
capable targets.
ld/
* testsuite/ld-arm/arm-elf.exp (Thumb-Thumb farcall M profile):
Assemble for ARMv6-M.
(Thumb2-Thumb2 farcall M profile): New testcase.
* testsuite/ld-arm/farcall-thumb2-thumb2-m.d: New file.
* testsuite/ld-arm/jump-reloc-veneers-cond-long-backward.d: Update to
reflect the use of Thumb-2 veneers for Thumb-2 capable targets.
* testsuite/ld-arm/jump-reloc-veneers-cond-long.d: Likewise.
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numbers.
This patch adds support for the opcode architectures
SPARC_OPCODE_ARCH_V9{C,D,E,V,M} and its associated BFD machine numbers
bfd_mach_sparc_v9{c,d,e,v,m} and bfd_mach_sparc_v8plus{c,d,e,v,m}.
Note that for arches up to v9b (UltraSPARC III), the detection of the
BFD machine type was based on the bits in the e_machine field of the ELF
header. However, there are no more available bits in that field, so
this patch takes the approach of using the hardware capabilities stored
in the object attributes HWCAPS/HWCAPS2 in order to characterize the
machine the object was built for.
bfd/ChangeLog:
2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
* archures.c (bfd_mach_sparc_v8plusc): Define.
(bfd_mach_sparc_v9c): Likewise.
(bfd_mach_sparc_v8plusd): Likewise.
(bfd_mach_sparc_v9d): Likewise.
(bfd_mach_sparc_v8pluse): Likewise.
(bfd_mach_sparc_v9e): Likewise.
(bfd_mach_sparc_v8plusv): Likewise
(bfd_mach_sparc_v9v): Likewise.
(bfd_mach_sparc_v8plusm): Likewise.
(bfd_mach_sparc_v9m): Likewise.
(bfd_mach_sparc_v9_p): Adapt to v8plusm and v9m.
(bfd_mach_sparc_64bit_p): Likewise.
* bfd-in2.h: Regenerate.
* cpu-sparc.c (arch_info_struct): Add entries for
bfd_mach_sparc_v8plus{c,d,e,v,m} and bfd_mach_sparc_v9{c,d,e,v,m}.
* aoutx.h (machine_type): Handle bfd_mach_sparc_v8plus{c,d,e,v,m}
and bfd_mach_sparc_v9{c,d,e,v,m}.
* elf32-sparc.c (elf32_sparc_final_write_processing): Likewise.
* elfxx-sparc.c (_bfd_sparc_elf_object_p): Likewise.
include/ChangeLog:
2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
* opcode/sparc.h (enum sparc_opcode_arch_val): Add
SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
SPARC_OPCODE_ARCH_V9M.
opcodes/ChangeLog:
2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
* sparc-dis.c (MASK_V9): Add SPARC_OPCODE_ARCH_V9{C,D,E,V,M}.
(compute_arch_mask): Handle bfd_mach_sparc_v8plus{c,d,e,v,m} and
bfd_mach_sparc_v9{c,d,e,v,m}.
* sparc-opc.c (MASK_V9C): Define.
(MASK_V9D): Likewise.
(MASK_V9E): Likewise.
(MASK_V9V): Likewise.
(MASK_V9M): Likewise.
(v6): Add MASK_V9{C,D,E,V,M}.
(v6notlet): Likewise.
(v7): Likewise.
(v8): Likewise.
(v9): Likewise.
(v9andleon): Likewise.
(v9a): Likewise.
(v9b): Likewise.
(v9c): Define.
(v9d): Likewise.
(v9e): Likewise.
(v9v): Likewise.
(v9m): Likewise.
(sparc_opcode_archs): Add entry for v9{c,d,e,v,m}.
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commit bf52d7c72035679e6b3ab601133c56a4388f4dc9
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Wed Jun 15 10:35:38 2016 -0700
Don't check undefined symbol for IFUNC reloc
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Since x86 elf_*_check_relocs is called after all symbols have been
resolved, there is no need to check undefined symbols for relocations
against IFUNC symbols.
bfd/
* elf32-i386.c (elf_i386_check_relocs): Don't check undefined
symbols for relocations against IFUNC symbols.
* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
ld/
* testsuite/ld-i386/i386.exp: Run pr19636-2e-nacl.
* testsuite/ld-i386/pr19636-2e.d: Skip for NaCl targets.
Remove .rel.plt section.
* testsuite/ld-i386/pr19636-2e-nacl.d: New file.
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This was broken by 4ade44b727ee77adaa9c22719935d012e253a5e6,
which changed the calculation to use the .rela.plt linker section
instead of its output section - thus skipping .rela.iplt .
Fix the calculations to include it.
bfd/ChangeLog:
* elf32-s390.c (elf_s390_finish_dynamic_sections): Include
.rela.iplt in DT_PLTRELSZ.
* elf64-s390.c (elf_s390_finish_dynamic_sections): Likewise,
for DT_PLTRELSZ and DT_RELASZ as well.
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Don't do anything special with non-loaded, non-alloced sections.
In particular, any relocs in such sections should not affect GOT
and PLT reference counting (ie. we don't allow them to create GOT
or PLT entries), there's no possibility or desire to optimize TLS
relocs, and there's not much point in propagating relocs to shared
libs that the dynamic linker won't relocate.
* elf32-i386.c (elf_i386_check_relocs): Skip relocations in
non-loaded, non-alloced sections.
* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
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* elf32-i386.c (elf_i386_check_relocs): Check SEC_ALLOC before
allocating dynamic relocation.
* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
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This patch fixes another edge case related to alignment property
records - reloc offsets adjacent to property record offsets were not
getting adjusted during relaxation.
bfd/
PR ld/20254
* elf32-avr.c (elf32_avr_relax_delete_bytes): Adjust reloc
offsets until reloc_toaddr.
ld/
PR ld/20254
* testsuite/ld-avr/avr-prop-6.d: New test.
* testsuite/ld-avr/avr-prop-6.s: New test.
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elf_{i386|x86_64}_reloc_type_class should return reloc_class_ifunc for
R_386_IRELATIVE/R_X86_64_IRELATIVE relocations. There is no need to
check symbol type for STN_UNDEF symbol index.
* elf32-i386.c (elf_i386_reloc_type_class): Check R_386_IRELATIVE.
Don't check symbol type for STN_UNDEF symbol index.
* elf64-x86-64.c (elf_x86_64_reloc_type_class): Check
R_X86_64_IRELATIVE. Don't check symbol type for STN_UNDEF symbol
index.
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2016-06-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elf32-arm.c (using_thumb_only): Force review of arch check logic for
new architecture.
(using_thumb2): Try Tag_THUMB_ISA_use first and check
for exact arch value then. Force review of arch check logic for new
architecture.
(arch_has_arm_nop): Update and fix arch check logic. Force review of
that logic for new architecture.
(arch_has_thumb2_nop): Remove.
(elf32_arm_tls_relax): Use using_thumb2 instead of above function.
(elf32_arm_final_link_relocate): Likewise but using thumb2.
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Many more places use abfd->my_archive rather than bfd_my_archive (abfd),
so let's make the code consistently use the first idiom.
bfd/
* bfd-in.h (bfd_my_archive): Delete.
* bfd-in2.h: Regenerate.
binutils/
* ar.c: Expand uses of bfd_my_archive.
* size.c: Likewise.
ld/
* ldlang.c: Expand uses of bfd_my_archive.
* ldmain.c: Likewise.
* ldmisc.c: Likewise.
* plugin.c: Likewise.
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LTO plugin support in plugin_maybe_claim wants to close the IR bfd
after replacing it with the recompiled object, but can't do so for
archive elements due to various pointers that access the archive bfd.
Thin archives have the same problem. They too cannot have their
element bfds closed.
PR ld/20241
bfd/
* archive.c (open_nested_file): Set my_archive.
* bfd.c (_bfd_default_error_handler <%B>): Exclude archive file name
for thin archives.
* bfdio.c (bfd_tell): Don't adjust origin for thin archives.
(bfd_seek): Likewise.
* bfdwin.c (bfd_get_file_window): Likewise.
* cache.c (cache_bmmap): Likewise.
(bfd_cache_lookup_worker): Don't look in my_archive for thin archives.
* mach-o.c (bfd_mach_o_follow_dsym): Don't open my_archive for
thin archives.
* plugin.c (try_claim): Likewise.
* xcofflink.c (xcoff_link_add_dynamic_symbols): Use import path of
file within thin archive, not the archive.
binutils/
* bucomm.c (bfd_get_archive_filename): Return file name within thin
archive.
ld/
* ldmain.c (add_archive_element): Just print file name of file within
thin archives.
* ldmisc.c (vfinfo): Likewise.
* plugin.c (plugin_object_p): Open file within thin archives.
(plugin_maybe_claim): Expand comment.
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Add the GOT base for R_386_GOT32/R_386_GOT32X relocations against IFUNC
symbols if there is no base register and disallow them for PIC.
bfd/
PR ld/20244
* elf32-i386.c (elf_i386_relocate_section): Add the .got.plt
section address for R_386_GOT32/R_386_GOT32X relocations against
IFUNC symbols if there is no base register and return error for
PIC.
ld/
PR ld/20244
* testsuite/ld-i386/i386.exp: Run pr20244-2a, pr20244-2b,
pr20244-2c and pr20244-2d.
* testsuite/ld-i386/no-plt.exp: Run pr20244-3a and pr20244-3b.
* testsuite/ld-i386/pr20244-2.s: New file.
* testsuite/ld-i386/pr20244-2a.d: Likewise.
* testsuite/ld-i386/pr20244-2b.d: Likewise.
* testsuite/ld-i386/pr20244-2c.d: Likewise.
* testsuite/ld-i386/pr20244-2d.d: Likewise.
* testsuite/ld-i386/pr20244-3a.c: Likewise.
* testsuite/ld-i386/pr20244-3b.S: Likewise.
* testsuite/ld-i386/pr20244-3c.S: Likewise.
* testsuite/ld-i386/pr20244-3d.S: Likewise.
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bfd/
* elf32-i386.c (elf_i386_relocate_section): Simplify IFUNC
GOT32 adjustment for static executables.
ld/
2016-06-13 H.J. Lu <hongjiu.lu@intel.com>
* testsuite/ld-i386/i386.exp: Run ifunc-1a and ifunc-1b.
* testsuite/ld-i386/ifunc-1a.c: New file.
* testsuite/ld-i386/ifunc-1b.S: Likewise.
* testsuite/ld-i386/ifunc-1c.S: Likewise.
* testsuite/ld-i386/ifunc-1d.S: Likewise.
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Complement:
commit b47468a6dbd1b54c44c2edc0f7db64a073d894ea
Author: Catherine Moore <clm@redhat.com>
Date: Mon May 6 15:25:45 2013 +0000
and the return of support for R_MIPS_PC32 there.
bfd/
* elf32-mips.c (elf_mips_gnu_pcrel32): Update comment.
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bfd/
2016-06-13 Cupertino Miranda <cmiranda@synospsy.com>
* elf32-arc.c (elf_arc_relocate_section): Fixed condition.
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- Correctly solved relocations on the .got header.
- This bug arrised from enabling RELRO (-z combreloc).
Because the .got and .got.plt sections were split in new linker
scripts the header is no longer part of sgotplt contents.
Changed the patch to sgot contents instead.
- Latest fix to .got header relocs.
bfd/
2016-06-13 Cupertino Miranda <cmiranda@synospsy.com>
* elf32-arc.c (elf_arc_finish_dynamic_sections): Changed.
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Fail safe for trying to reloc GOT and PLT on non dynamic linker. Fix
issue with dynamic relocs not being generated with -pie. Removed some
structures that were not being used. Fixed typo changing RELENT to
RELAENT. Fix for all SECTOFF relocations.
bfd/
2016-06-13 Cupertino Miranda <cmiranda@synospsy.com>
* elf32-arc.c (arc_local_data, arc_local_data): Removed.
(SECTSTART): Changed.
(elf_arc_relocate_section): Fixed mistake in PIE related
condition.
(elf_arc_size_dynamic_sections): Changed DT_RELENT to DT_RELAENT.
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bfd/
2016-06-13 Cupertino Miranda <cmiranda@synospsy.com>
* elf32-arc.c (elf32_arc_reloc_type_class): Defined function to
enable support for "-z combreloc" and DT_RELACOUNT.
(elf_backend_reloc_type_class): Likewise
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When relocating R_386_GOT32 in "op $0, bar@GOT", we shouldn't subtract
GOT base without a base register and we should disallow it without a
base register for PIC.
bfd/
PR ld/20244
* elf32-i386.c (elf_i386_relocate_section): When relocating
R_386_GOT32, return error without a base register for PIC and
subtract the .got.plt section address only with a base register.
ld/
PR ld/20244
* testsuite/ld-i386/i386.exp: Run pr20244-1a and pr20244-1b.
* testsuite/ld-i386/pr20244-1.s: New file.
* testsuite/ld-i386/pr20244-1a.d: Likewise.
* testsuite/ld-i386/pr20244-1b.d: Likewise.
* testsuite/ld-i386/pr20244-1c.d: Likewise.
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I noticed when writing _bfd_elf_strtab_save/restore that size_t would
be better than bfd_size_type for a number of things in elf-strtab.c.
Using a 64-bit bfd_size_type on a 32-bit host doesn't make much sense
for array sizes and indices.
* elf-strtab.c (struct strtab_save): Use size_t for "size".
(struct elf_strtab_hash): Likewise for "size" and "alloced".
(_bfd_elf_strtab_init): Formatting.
(_bfd_elf_strtab_add): Return size_t rather than bfd_size_type.
(_bfd_elf_strtab_addref): Take size_t idx param.
(_bfd_elf_strtab_delref, _bfd_elf_strtab_refcount): Likewise.
(_bfd_elf_strtab_offset): Likewise.
(_bfd_elf_strtab_clear_all_refs): Use size_t idx.
(_bfd_elf_strtab_save): Use size_t "idx" and "size" vars.
(_bfd_elf_strtab_restore, _bfd_elf_strtab_emit): Similarly.
(_bfd_elf_strtab_finalize): Similarly.
* elf-bfd.h (_bfd_elf_strtab_add): Update prototypes.
(_bfd_elf_strtab_addref, _bfd_elf_strtab_delref): Likewise.
(_bfd_elf_strtab_refcount, _bfd_elf_strtab_offset): Likewise.
* elf.c (bfd_elf_get_elf_syms): Calculate symbol buffer size
using bfd_size_type.
(bfd_section_from_shdr): Delete amt.
(_bfd_elf_init_reloc_shdr): Likewise.
(_bfd_elf_link_assign_sym_version): Likewise.
(assign_section_numbers): Use size_t reloc_count.
* elflink.c (struct elf_symbuf_head): Use size_t "count".
(bfd_elf_link_record_dynamic_symbol): Use size_t for some vars.
(elf_link_is_defined_archive_symbol): Likewise.
(elf_add_dt_needed_tag): Likewise.
(elf_finalize_dynstr): Likewise.
(elf_link_add_object_symbols): Likewise.
(bfd_elf_size_dynamic_sections): Likewise.
(elf_create_symbuf): Similarly.
(bfd_elf_match_symbols_in_sections): Likewise.
(elf_link_swap_symbols_out): Likewise.
(elf_link_check_versioned_symbol): Likewise.
(bfd_elf_gc_record_vtinherit): Likewise.
(bfd_elf_gc_common_finalize_got_offsets): Likewise.
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This patch fixes an edge case in linker relaxation that causes symbol
values to be computed incorrectly in the presence of align directives
in input source code.
bfd/
* elf32-avr.c (elf32_avr_relax_delete_bytes): Adjust syms
and relocs only if shrinking occurred.
ld/
* testsuite/ld-avr/avr-prop-5.d: New.
* testsuite/ld-avr/avr-prop-5.s: New.
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We can generate i386 TLS code sequences for general and local dynamic
models without PLT, which uses indirect call via GOT:
call *___tls_get_addr@GOT(%reg)
where EBX register isn't required as GOT base, instead of direct call:
call ___tls_get_addr[@PLT]
which requires EBX register as GOT base.
Since direct call is 4-byte long and indirect call, is 5-byte long, the
extra one byte must be handled properly.
For general dynamic model, 7-byte lea instruction before call instruction
is replaced by 6-byte one to make room for indirect call. For local
dynamic model, we simply use 5-byte indirect call.
TLS linker optimization is updated to recognize new instruction patterns.
For local dynamic model to local exec model transition, we generate
a 6-byte lea instruction as nop, instead of a 1-byte nop plus a 4-byte
lea instruction. Since linker may convert
call ___tls_get_addr[@PLT]
to
addr32 call ____tls_get_addr
when producing static executable, both patterns are recognized.
bfd/
* elf64-i386.c (elf_i386_link_hash_entry): Add tls_get_addr.
(elf_i386_link_hash_newfunc): Initialize tls_get_addr to 2.
(elf_i386_check_tls_transition): Check indirect call and direct
call with the addr32 prefix for general and local dynamic models.
Set the tls_get_addr feild.
(elf_i386_convert_load_reloc): Always use addr32 prefix for
indirect ___tls_get_addr call via GOT.
(elf_i386_relocate_section): Handle GD->LE, GD->IE and LD->LE
transitions with indirect call and direct call with the addr32
prefix.
ld/
* testsuite/ld-i386/i386.exp: Run libtlspic2.so, tlsbin2,
tlsgd3, tlsld2, tlsgd4, tlspie3a, tlspie3b and tlspie3c.
* testsuite/ld-i386/pass.out: New file.
* testsuite/ld-i386/tls-def1.c: Likewise.
* testsuite/ld-i386/tls-gd1.S: Likewise.
* testsuite/ld-i386/tls-ld1.S: Likewise.
* testsuite/ld-i386/tls-main1.c: Likewise.
* testsuite/ld-i386/tls.exp: Likewise.
* testsuite/ld-i386/tlsbin2-nacl.rd: Likewise.
* testsuite/ld-i386/tlsbin2.dd: Likewise.
* testsuite/ld-i386/tlsbin2.rd: Likewise.
* testsuite/ld-i386/tlsbin2.sd: Likewise.
* testsuite/ld-i386/tlsbin2.td: Likewise.
* testsuite/ld-i386/tlsbinpic2.s: Likewise.
* testsuite/ld-i386/tlsgd3.dd: Likewise.
* testsuite/ld-i386/tlsgd3.s: Likewise.
* testsuite/ld-i386/tlsgd4.d: Likewise.
* testsuite/ld-i386/tlsgd4.s: Likewise.
* testsuite/ld-i386/tlsld2.s: Likewise.
* testsuite/ld-i386/tlspic2-nacl.rd: Likewise.
* testsuite/ld-i386/tlspic2.dd: Likewise.
* testsuite/ld-i386/tlspic2.rd: Likewise.
* testsuite/ld-i386/tlspic2.sd: Likewise.
* testsuite/ld-i386/tlspic2.td: Likewise.
* testsuite/ld-i386/tlspic3.s: Likewise.
* testsuite/ld-i386/tlspie3.s: Likewise.
* testsuite/ld-i386/tlspie3a.d: Likewise.
* testsuite/ld-i386/tlspie3b.d: Likewise.
* testsuite/ld-i386/tlspie3c.d: Likewise.
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The only non-comment fix here is in the code writing out the 3 fixed
.got.plt entries - it mistakenly put a 64-bit 0 at offsets 8 and 12
instead of 8 and 16.
bfd/ChangeLog:
* elf32-s390.c (elf_s390_finish_dynamic_symbol): Fix comment.
* elf64-s390.c (elf_s390x_plt_entry): Fix comment.
(elf_s390_relocate_section): Fix comment.
(elf_s390_finish_dynamic_sections): Fix initialization of fixed
.got.plt entries.
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Embedding the .plt section in another revealed a bug in the way the
larl operand of the first magic plt entry is being calculated. Fixed
with the attached patch.
bfd/ChangeLog:
* elf64-s390.c (elf_s390_finish_dynamic_sections): Subtract plt
section offset when calculation the larl operand in the first PLT
entry.
ld/ChangeLog:
* testsuite/ld-s390/pltoffset-1.dd: New test.
* testsuite/ld-s390/pltoffset-1.ld: New test.
* testsuite/ld-s390/pltoffset-1.s: New test.
* testsuite/ld-s390/s390.exp: Run new test.
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VLE is an encoding, not a particular processor architecture, so it
isn't really proper to select insns based on PPC_OPCODE_VLE. For
example
{"evaddw", VX (4, 512), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
{"vaddubs", VX (4, 512), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
shows two insns that have the same encoding, both available with VLE.
Enabling both with VLE means we can't disassemble the second variant
even if -Maltivec is given rather than -Mspe. Also, we don't check
user assembly against the processor type as well as we could.
Another problem is that when using the VLE encoding, insns from the
main ppc opcode table are not available, except those using opcode 4
and 31. Correcting this revealed two errors in the ld testsuite,
use of "nop" and "rfmci" when -mvle.
This patch fixes those problems in the opcode table, and removes
PPCNONE. I find a plain 0 distracts less from other values.
In addition, I've implemented code to recognize some machine values
from the apuinfo note present in ppc32 objects. It's not a complete
disambiguation since we're lacking info to detect newer chips, but
what we have should help with disassembly.
include/
* elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
PPC_APUINFO_VLE: Define.
opcodes/
* ppc-dis.c (ppc_opts): Delete extraneous parentheses. Default
cpu for "vle" to e500.
* ppc-opc.c (ALLOW8_SPRG): Remove PPC_OPCODE_VLE.
(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW, DCBT_EO): Likewise.
(PPCNONE): Delete, substitute throughout.
(powerpc_opcodes): Remove PPCVLE from "flags". Add to "deprecated"
except for major opcode 4 and 31.
(vle_opcodes <se_rfmci>): Add PPCRFMCI to flags.
bfd/
* cpu-powerpc.c (powerpc_compatible): Allow bfd_mach_ppc_vle entry
to match other 32-bit archs.
* elf32-ppc.c (_bfd_elf_ppc_set_arch): New function.
(ppc_elf_object_p): Call it.
(ppc_elf_special_sections): Use APUINFO_SECTION_NAME. Fix
overlong line.
(APUINFO_SECTION_NAME, APUINFO_LABEL): Don't define here.
* elf64-ppc.c (ppc64_elf_object_p): Call _bfd_elf_ppc_set_arch.
* bfd-in.h (_bfd_elf_ppc_at_tls_transform,
_bfd_elf_ppc_at_tprel_transform): Move to..
* elf-bfd.h: ..here.
(_bfd_elf_ppc_set_arch): Declare.
* bfd-in2.h: Regenerate.
gas/
* config/tc-ppc.c (PPC_APUINFO_ISEL, PPC_APUINFO_PMR,
PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE,
PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK, PPC_APUINFO_VLE): Don't define.
(ppc_setup_opcodes): Check vle disables powerpc_opcodes overridden
by vle_opcodes, and that vle flag doesn't enable opcodes. Don't
add vle_opcodes twice.
(ppc_cleanup): Use APUINFO_SECTION_NAME and APUINFO_LABEL.
ld/
* testsuite/ld-powerpc/apuinfo1.s: Delete nop.
* testsuite/ld-powerpc/apuinfo-vle2.s: New.
* testsuite/ld-powerpc/powerpc.exp: Use apuinfo-vle2.s.
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We can generate x86-64 TLS code sequences for general and local dynamic
models without PLT, which uses indirect call via GOT:
call *__tls_get_addr@GOTPCREL(%rip)
instead of direct call:
call __tls_get_addr[@PLT]
Since direct call is 4-byte long and indirect call, is 5-byte long, the
extra one byte must be handled properly.
For general dynamic model, one 0x66 prefix before call instruction is
removed to make room for indirect call. For local dynamic model, we
simply use 5-byte indirect call.
TLS linker optimization is updated to recognize new instruction patterns.
For local dynamic model to local exec model transition, we generate
4 0x66 prefixes, instead of 3, before mov instruction in 64-bit and
generate a 5-byte nop, instead of 4-byte, before mov instruction in
32-bit. Since linker may convert
call *__tls_get_addr@GOTPCREL(%rip)
to
addr32 call __tls_get_addr
when producing static executable, both patterns are recognized.
bfd/
* elf64-x86-64.c (elf_x86_64_link_hash_entry): Add tls_get_addr.
(elf_x86_64_link_hash_newfunc): Initialize tls_get_addr to 2.
(elf_x86_64_check_tls_transition): Check indirect call and
direct call with the addr32 prefix for general and local dynamic
models. Set the tls_get_addr feild.
(elf_x86_64_convert_load_reloc): Always use addr32 prefix for
indirect __tls_get_addr call via GOT.
(elf_x86_64_relocate_section): Handle GD->LE, GD->IE and LD->LE
transitions with indirect call and direct call with the addr32
prefix.
ld/
* testsuite/ld-x86-64/pass.out: New file.
* testsuite/ld-x86-64/tls-def1.c: Likewise.
* testsuite/ld-x86-64/tls-gd1.S: Likewise.
* testsuite/ld-x86-64/tls-ld1.S: Likewise.
* testsuite/ld-x86-64/tls-main1.c: Likewise.
* testsuite/ld-x86-64/tls.exp: Likewise.
* testsuite/ld-x86-64/tlsbin2-nacl.rd: Likewise.
* testsuite/ld-x86-64/tlsbin2.dd: Likewise.
* testsuite/ld-x86-64/tlsbin2.rd: Likewise.
* testsuite/ld-x86-64/tlsbin2.sd: Likewise.
* testsuite/ld-x86-64/tlsbin2.td: Likewise.
* testsuite/ld-x86-64/tlsbinpic2.s: Likewise.
* testsuite/ld-x86-64/tlsgd10.dd: Likewise.
* testsuite/ld-x86-64/tlsgd10.s: Likewise.
* testsuite/ld-x86-64/tlsgd11.dd: Likewise.
* testsuite/ld-x86-64/tlsgd11.s: Likewise.
* testsuite/ld-x86-64/tlsgd12.d: Likewise.
* testsuite/ld-x86-64/tlsgd12.s: Likewise.
* testsuite/ld-x86-64/tlsgd13.d: Likewise.
* testsuite/ld-x86-64/tlsgd13.s: Likewise.
* testsuite/ld-x86-64/tlsgd14.dd: Likewise.
* testsuite/ld-x86-64/tlsgd14.s: Likewise.
* testsuite/ld-x86-64/tlsgd5c.s: Likewise.
* testsuite/ld-x86-64/tlsgd6c.s: Likewise.
* testsuite/ld-x86-64/tlsgd9.dd: Likewise.
* testsuite/ld-x86-64/tlsgd9.s: Likewise.
* testsuite/ld-x86-64/tlsld4.dd: Likewise.
* testsuite/ld-x86-64/tlsld4.s: Likewise.
* testsuite/ld-x86-64/tlsld5.dd: Likewise.
* testsuite/ld-x86-64/tlsld5.s: Likewise.
* testsuite/ld-x86-64/tlsld6.dd: Likewise.
* testsuite/ld-x86-64/tlsld6.s: Likewise.
* testsuite/ld-x86-64/tlspic2-nacl.rd: Likewise.
* testsuite/ld-x86-64/tlspic2.dd: Likewise.
* testsuite/ld-x86-64/tlspic2.rd: Likewise.
* testsuite/ld-x86-64/tlspic2.sd: Likewise.
* testsuite/ld-x86-64/tlspic2.td: Likewise.
* testsuite/ld-x86-64/tlspic3.s: Likewise.
* testsuite/ld-x86-64/tlspie2.s: Likewise.
* testsuite/ld-x86-64/tlspie2a.d: Likewise.
* testsuite/ld-x86-64/tlspie2b.d: Likewise.
* testsuite/ld-x86-64/tlspie2c.d: Likewise.
* testsuite/ld-x86-64/tlsgd5.dd: Updated.
* testsuite/ld-x86-64/tlsgd6.dd: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run libtlspic2.so, tlsbin2,
tlsgd5b, tlsgd6b, tlsld4, tlsld5, tlsld6, tlsgd9, tlsgd10,
tlsgd11, tlsgd14, tlsgd12, tlsgd13, tlspie2a, tlspie2b and
tlspie2c.
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bfd/
* coff-z8k.c (extra_case): Fix range check for R_JR relocation.
ld/
* ld/testsuite/ld-z8k/0filler.s: New file.
* ld/testsuite/ld-z8k/branch-target.s: New file.
* ld/testsuite/ld-z8k/branch-target2.s: New file.
* ld/testsuite/ld-z8k/calr-back-8001.d: New file.
* ld/testsuite/ld-z8k/calr-back-8002.d: New file.
* ld/testsuite/ld-z8k/calr-back-fail-8001.d: New file.
* ld/testsuite/ld-z8k/calr-back-fail-8002.d: New file.
* ld/testsuite/ld-z8k/calr-forw-8001.d: New file.
* ld/testsuite/ld-z8k/calr-forw-8002.d: New file.
* ld/testsuite/ld-z8k/calr-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/calr-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/calr-opcode.s: New file.
* ld/testsuite/ld-z8k/dbjnz-forw-8001.d: New file.
* ld/testsuite/ld-z8k/dbjnz-forw-8002.d: New file.
* ld/testsuite/ld-z8k/dbjnz-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/dbjnz-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/dbjnz-opcode.s: New file.
* ld/testsuite/ld-z8k/djnz-back-8001.d: New file.
* ld/testsuite/ld-z8k/djnz-back-8002.d: New file.
* ld/testsuite/ld-z8k/djnz-back-fail-8001.d: New file.
* ld/testsuite/ld-z8k/djnz-back-fail-8002.d: New file.
* ld/testsuite/ld-z8k/djnz-forw-8001.d: New file.
* ld/testsuite/ld-z8k/djnz-forw-8002.d: New file.
* ld/testsuite/ld-z8k/djnz-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/djnz-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/djnz-opcode.s: New file.
* ld/testsuite/ld-z8k/filler.s: New file.
* ld/testsuite/ld-z8k/jr-back-8001.d: New file.
* ld/testsuite/ld-z8k/jr-back-8002.d: New file.
* ld/testsuite/ld-z8k/jr-back-fail-8001.d: New file.
* ld/testsuite/ld-z8k/jr-back-fail-8002.d: New file.
* ld/testsuite/ld-z8k/jr-forw-8001.d: New file.
* ld/testsuite/ld-z8k/jr-forw-8002.d: New file.
* ld/testsuite/ld-z8k/jr-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/jr-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/jr-opcode.s: New file.
* ld/testsuite/ld-z8k/ldr-back-8001.d: New file.
* ld/testsuite/ld-z8k/ldr-back-8002.d: New file.
* ld/testsuite/ld-z8k/ldr-back-fail-8001.d: New file.
* ld/testsuite/ld-z8k/ldr-back-fail-8002.d: New file.
* ld/testsuite/ld-z8k/ldr-forw-8001.d: New file.
* ld/testsuite/ld-z8k/ldr-forw-8002.d: New file.
* ld/testsuite/ld-z8k/ldr-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/ldr-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/ldr-opcode.s: New file.
* ld/testsuite/ld-z8k/ldrb-forw-8001.d: New file.
* ld/testsuite/ld-z8k/ldrb-forw-8002.d: New file.
* ld/testsuite/ld-z8k/ldrb-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/ldrb-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/ldrb-opcode.s: New file.
* ld/testsuite/ld-z8k/ldrb-opcode2.s: New file.
* ld/testsuite/ld-z8k/other-file.s: New file.
* ld/testsuite/ld-z8k/reloc.dd: New file.
* ld/testsuite/ld-z8k/reloc.ld: New file.
* ld/testsuite/ld-z8k/relocseg.dd: New file.
* ld/testsuite/ld-z8k/relocseg.ld: New file.
* ld/testsuite/ld-z8k/relocseg1.dd: New file.
* ld/testsuite/ld-z8k/test-ld.sh: New file.
* ld/testsuite/ld-z8k/this-file.s: New file.
* ld/testsuite/ld-z8k/z8k.exp: New file.
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