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2014-09-30daily updateAlan Modra1-1/+1
2014-09-29Fix build for OLD_FREEBSD_ABI_LABELH.J. Lu2-2/+11
PR ld/17440 * elf32-i386.c (elf_i386_fbsd_post_process_headers): Fix build for OLD_FREEBSD_ABI_LABEL.
2014-09-29daily updateAlan Modra1-1/+1
2014-09-28daily updateAlan Modra1-1/+1
2014-09-27daily updateAlan Modra1-1/+1
2014-09-26daily updateAlan Modra1-1/+1
2014-09-25daily updateAlan Modra1-1/+1
2014-09-24BFD: Add support for more than one plugin in lib/bfd-pluginsMarkus Trippelsdorf2-52/+63
ar, nm and ranlib currently lack the ability to handle more than one plugin in lib/bfd-plugins. This patch reshuffles the logic in plugin.c to add this functionality. One can now place both llvm and gcc plugins in this directory and have them loaded automatically. Mixed gcc/llvm archives are also supported (but not very useful until ld.bfd and ld.gold also would load multiple plugins and use them to claim different object files). PR 17422 * plugin.c (try_claim): New function. Moved from bfd_plugin_object_p. (try_load_plugin): Pass through bfd. Add test. (load_plugin): Pass through bfd. (bfd_plugin_object_p): Move logic to try_claim.
2014-09-24daily updateAlan Modra1-1/+1
2014-09-23daily updateAlan Modra1-1/+1
2014-09-23Fix 'call8: call target out of range' xtensa ld relaxation bugSterling Augustine2-4/+44
During link-time relaxation distance between cross-section call site and its target may grow, producing 'call target out of range' error for relaxed calls. Be more conservative when calculating whether or not a callx can be converted to a straight call. 2014-09-23 Sterling Augustine <augustine.sterling@gmail.com> bfd/ * elf32-xtensa.c (is_resolvable_asm_expansion): for cross-section call relaxation use furthermost addresses where call source and destination can be to check whether it's in the range of a direct call.
2014-09-22Produce output file with -noinhibit-exec after overlapping FDE errorAlan Modra2-17/+17
* elf-eh-frame (_bfd_elf_write_section_eh_frame_hdr): Don't return false for overflow or overlapping FDEs. Give more detail in error messages.
2014-09-22MIPS: Don't sign extend the addend for RELA relocationsMatthew Fortune2-7/+30
bfd/ * elfxx-mips.c (mips_elf_calculate_relocation): Don't sign extend the addend if relocations are RELA.
2014-09-22NDS32/bfd: Synchronize the argument type.Kuan-Lin Chen2-4/+8
2014-09-22daily updateAlan Modra1-1/+1
2014-09-21daily updateAlan Modra1-1/+1
2014-09-20daily updateAlan Modra1-1/+1
2014-09-19S/390: Don't replace R_390_TLS_LE32/64 with R_390_TLS_TPOFF for PIE.Andreas Krebbel3-2/+21
bfd: 2014-09-19 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * elf32-s390.c: Don't replace R_390_TLS_LE32 with R_390_TLS_TPOFF for PIE. * elf64-s390.c: Don't replace R_390_TLS_LE64 with R_390_TLS_TPOFF for PIE.
2014-09-19daily updateAlan Modra1-1/+1
2014-09-18Fix regression for Linux vDSO in GDB (PR gdb/17407).Jan Kratochvil2-1/+6
since 5979d6b69b20a8355ea94b75fad97415fce4788c https://sourceware.org/git/?p=binutils-gdb.git;a=commitdiff;h=5979d6b69b20a8355ea94b75fad97415fce4788c vdso handling https://sourceware.org/ml/binutils/2014-03/msg00082.html https://sourceware.org/ml/binutils/2014-04/msg00003.html Message-ID: <A78C989F6D9628469189715575E55B230AA884EB@IRSMSX104.ger.corp.intel.com> I get on kernel-3.16.2-200.fc20.x86_64 https://koji.fedoraproject.org/koji/buildinfo?buildID=575860 attaching its vdso.bin.gz GDB (FSF HEAD 5e43d46791c4c66fd83947a12d4f716b561a9103) regression: reproducer: ./gdb -ex start ./gdb actual result / FAIL: Got object file from memory but can't read symbols: File truncated. expected result / PASS: <nothing> or / PASS: warning: Could not load shared library symbols for linux-vdso.so.1. Do you need "set solib-search-path" or "set sysroot"? That "warning: Could not load shared library..." is mostly harmless (it is a bug in GDB), in the FAIL case it is not printed just because bfd_check_format() fails there. It seems logical to me this way when the 'size' parameter has been already added. Alan Modra: I was wrongly thinking that the section headers were always last when I wrote that code. (They are now! If you relink that vdso with current binutils master you won't hit this problem, but that of course doesn't help existing kernels.) I do not see a regression for add-symbol-file-from-memory for libncurses.so.5 from the original thread above. Start of section headers: 1080 (bytes into file) Size of section headers: 64 (bytes) Number of section headers: 13 Section header string table index: 8 Section Headers: [Nr] Name Type Address Off Size ES Flg Lk Inf Al [ 8] .fake_shstrtab STRTAB 0000000000000780 000780 000076 00 A 0 0 32 Program Headers: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align LOAD 0x000000 0x0000000000000000 0x0000000000000000 0x0012fe 0x0012fe R E 0x1000 size == 0x2000 shdr_end == 0x778 == 1080 + 13 * 64 high_offset == 0x12fe else if (size >= shdr_end) - high_offset = shdr_end; + high_offset = size; But then 0x778 < 0x780 for "Section header string table index" so whole bfd_check_format() fails because section headers were not cleared here: /* If the segments visible in memory didn't include the section headers, then clear them from the file header. */ if (high_offset < shdr_end) bfd/ChangeLog 2014-09-18 Jan Kratochvil <jan.kratochvil@redhat.com> PR gdb/17407 * elfcode.h (bfd_from_remote_memory): Use SIZE for HIGH_OFFSET.
2014-09-18daily updateAlan Modra1-1/+1
2014-09-17daily updateAlan Modra1-1/+1
2014-09-16Make the linker return an error status if it fails to merge ARM binaries withTerry Guo2-5/+19
different architecture tags. Add a test case to make sure that this works, and update readelf so that it will not seg-fault when trying to display the attributes of binaries with invalid architecture tags. * elf32-arm.c (elf32_arm_merge_eabi_attributes): Return false if failed to merge. * ld-arm/attr-merge-arch-2.d: New test case. * ld-arm/attr-merge-arch-2a.s: New test case source file. * ld-arm/attr-merge-arch-2b.s: Likewise. * ld-arm/arm-elf.exp: Run new test case. * readelf.c (display_arm_attribute): Use unsigned int type for tag, val and type variables.
2014-09-16NDS32: Code refactoring of relaxation.Kuan-Lin Chen6-2675/+4263
Refactor each relaxation pattern to raise the maintainability. In origin, all patterns is analysed in nds32_elf_relax_section, so it is hard to debug and maintain. Therefore, we classify all patterns into different functions in this patch. Moreover, we adjust all optimizations into nds32_elf_relax_section to take these optimizations in turn. This can promise all relaxation being done after calling gld${EMULATION_NAME}_after_allocation.
2014-09-16daily updateAlan Modra1-1/+1
2014-09-15This fixes a typo in a previous commit.Chen Gang2-1/+7
(find_abstract_instance_name): Use 'form' instead of 'name' for the typo issue, which related with commit 60d77146a249ae9b51d7ce98930cdbedb2cfa352.
2014-09-15Add support for MIPS R6.Andrew Bennett11-7/+704
bfd/ * aoutx.h (NAME (aout, machine_type)): Add mips32r6 and mips64r6. * archures.c (bfd_architecture): Likewise. * bfd-in2.h (bfd_architecture): Likewise. (bfd_reloc_code_real): Add relocs BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and BFD_RELOC_MIPS_19_PCREL_S2. * cpu-mips.c (arch_info_struct): Add mips32r6 and mips64r6. * elf32-mips.c: Define relocs R_MIPS_PC21_S2, R_MIPS_PC26_S2 R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16. (mips_reloc_map): Add entries for BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. * elf64-mips.c: Define REL, and RELA relocations R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16. (mips_reloc_map): Add entries for BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. * elfn32-mips.c: Likewise. * elfxx-mips.c (MIPSR6_P): New define. (mipsr6_exec_plt_entry): New array. (hi16_reloc_p): Add support for R_MIPS_PCHI16. (lo16_reloc_p): Add support for R_MIPS_PCLO16. (aligned_pcrel_reloc_p): New function. (mips_elf_relocation_needs_la25_stub): Add support for relocs: R_MIPS_PC21_S2 and R_MIPS_PC26_S2. (mips_elf_calculate_relocation): Add support for relocs: R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16. (_bfd_elf_mips_mach): Add support for mips32r6 and mips64r6. (mips_elf_add_lo16_rel_addend): Add support for R_MIPS_PCHI16. (_bfd_mips_elf_check_relocs): Add support for relocs: R_MIPS_PC21_S2 and R_MIPS_PC26_S2. (_bfd_mips_elf_relocate_section): Add a check for unaligned pc relative relocs. (_bfd_mips_elf_finish_dynamic_symbol): Add support for MIPS r6 plt entry. (mips_set_isa_flags): Add support for mips32r6 and mips64r6. (_bfd_mips_elf_print_private_bfd_data): Likewise. (mips_32bit_flags_p): Add support for mips32r6. * libbfd.h (bfd_reloc_code_real_names): Add entries for BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and BFD_RELOC_MIPS_19_PCREL_S2. * reloc.c: Document relocs BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and BFD_RELOC_MIPS_19_PCREL_S2. binutils/ * readelf.c (get_machine_flags): Add support for mips32r6 and mips64r6. elfcpp/ * mips.h (E_MIPS_ARCH_32R6, E_MIPS_ARCH_64R6): New enum constants. gas/ * config/tc-mips.c (mips_nan2008): New static global. (mips_flag_nan2008): Removed. (LL_SC_FMT): New define. (COP12_FMT): Updated. (ISA_IS_R6): New define. (ISA_HAS_64BIT_REGS): Add mips64r6. (ISA_HAS_DROR): Likewise. (ISA_HAS_64BIT_FPRS): Add mips32r6 and mips64r6. (ISA_HAS_ROR): Likewise. (ISA_HAS_ODD_SINGLE_FPR): Likewise. (ISA_HAS_MXHC1): Likewise. (hilo_interlocks): Likewise. (md_longopts): Likewise. (ISA_HAS_LEGACY_NAN): New define. (options): Add OPTION_MIPS32R6 and OPTION_MIPS64R6. (mips_ase): Add field rem_rev. (mips_ases): Updated to add which ISA an ASE was removed in. (mips_isa_rev): Add support for mips32r6 and mips64r6. (mips_check_isa_supports_ase): Add support to check if an ASE has been removed in the specified MIPS ISA revision. (validate_mips_insn): Skip '-' character. (macro_build): Likewise. (mips_check_options): Prevent R6 working with fp32, mips16, micromips, or branch relaxation. (file_mips_check_options): Set R6 floating point registers to 64 bit. Also deal with the nan2008 option. (limited_pcrel_reloc_p): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. (operand_reg_mask): Add support for OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. (match_check_prev_operand): New static function. (match_same_rs_rt_operand): New static function. (match_non_zero_reg_operand): New static function. (match_operand): Added entries for: OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. (insns_between): Added case to deal with forbidden slots. (append_insn): Added support for relocs: BFD_RELOC_MIPS_21_PCREL_S2 and BFD_RELOC_MIPS_26_PCREL_S2. (match_insn): Add support for operands -A, -B, +' and +". Also skip '-' character. (mips_percent_op): Add entries for %pcrel_hi and %pcrel_lo. (md_parse_option): Add support for mips32r6 and mips64r6. Also update the nan option handling. (md_pcrel_from): Add cases for relocs: BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2. (mips_force_relocation): Prevent forced relaxation for MIPS r6. (md_apply_fix): Add support for relocs: BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. (s_mipsset): Add support for mips32r6 and mips64r6. (s_nan): Update to support the new nan2008 framework. (tc_gen_reloc): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. (mips_elf_final_processing): Updated to use the mips_nan2008. (mips_cpu_info_table): Add entries for mips32r6 and mips64r6. (macro): Enable ldc2, sdc2, ll, lld, swc2, sc, scd, cache, pref macros for R6. (mips_fix_adjustable): Make PC relative R6 relocations relative to the symbol and not the section. * configure.ac: Add support for mips32r6 and mips64r6. * configure: Regenerate. * doc/c-mips.texi: Document the -mips32r6 and -mips64r6 command line options. * doc/as.texinfo: Likewise. gas/testsuite/ * gas/mips/24k-triple-stores-1.s: If testing for r6 prevent non-supported instructions from being tested. * gas/mips/24k-triple-stores-2.s: Likewise. * gas/mips/24k-triple-stores-3.s: Likewise. * gas/mips/24k-triple-stores-6.s: Likewise. * gas/mips/beq.s: Likewise. * gas/mips/eva.s: Likewise. * gas/mips/ld-zero-3.s: Likewise. * gas/mips/mips32-cp2.s: Likewise. * gas/mips/mips32.s: Likewise. * gas/mips/mips4.s: Likewise. * gas/mips/add.s: Don't test the add instructions if r6, and add padding. * gas/mips/add.d: Check for a triple dot not a nop at the end of the disassembly output. * gas/mips/micromips@add.d: Likewise. * gas/mips/mipsr6@24k-branch-delay-1.d: New file. * gas/mips/mipsr6@24k-triple-stores-1.d: New file. * gas/mips/mipsr6@24k-triple-stores-2-llsc.d: New file. * gas/mips/mipsr6@24k-triple-stores-2.d: New file. * gas/mips/mipsr6@24k-triple-stores-3.d: New file. * gas/mips/mipsr6@24k-triple-stores-6.d: New file. * gas/mips/mipsr6@add.d: New file. * gas/mips/mipsr6@attr-gnu-4-1-msingle-float.l: New file. * gas/mips/mipsr6@attr-gnu-4-1-msingle-float.s: New file. * gas/mips/mipsr6@attr-gnu-4-1-msoft-float.l: New file. * gas/mips/mipsr6@attr-gnu-4-1-msoft-float.s: New file. * gas/mips/mipsr6@attr-gnu-4-2-mdouble-float.l: New file. * gas/mips/mipsr6@attr-gnu-4-2-mdouble-float.s: New file. * gas/mips/mipsr6@beq.d: New file. * gas/mips/mipsr6@bge.d: New file. * gas/mips/mipsr6@bgeu.d: New file. * gas/mips/mipsr6@blt.d: New file. * gas/mips/mipsr6@bltu.d: New file. * gas/mips/mipsr6@branch-misc-1.d: New file. * gas/mips/mipsr6@branch-misc-2-64.d: New file. * gas/mips/mipsr6@branch-misc-2pic-64.d: New file. * gas/mips/mipsr6@branch-misc-4-64.d: New file. * gas/mips/mipsr6@cache.d: New file. * gas/mips/mipsr6@eva.d: New file. * gas/mips/mipsr6@jal-svr4pic-noreorder.d: New file. * gas/mips/mipsr6@jal-svr4pic.d: New file. * gas/mips/mipsr6@ld-zero-2.d: New file. * gas/mips/mipsr6@ld-zero-3.d: New file. * gas/mips/mipsr6@loc-swap-dis.d: New file. * gas/mips/mipsr6@mips32-cp2.d: New file. * gas/mips/mipsr6@mips32-imm.d: New file. * gas/mips/mipsr6@mips32.d: New file. * gas/mips/mipsr6@mips32r2.d: New file. * gas/mips/mipsr6@mips4-fp.d: New file. * gas/mips/mipsr6@mips4-fp.l: New file. * gas/mips/mipsr6@mips4-fp.s: New file. * gas/mips/mipsr6@mips4.d: New file. * gas/mips/mipsr6@mips5-fp.d: New file. * gas/mips/mipsr6@mips5-fp.l: New file. * gas/mips/mipsr6@mips5-fp.s: New file. * gas/mips/mipsr6@mips64.d: New file. * gas/mips/mipsr6@msa-branch.d: New file. * gas/mips/mipsr6@msa.d: New file. * gas/mips/mipsr6@pref.d: New file. * gas/mips/mipsr6@relax-swap3.d: New file. * gas/mips/r6-64-n32.d: New file. * gas/mips/r6-64-n64.d: New file. * gas/mips/r6-64-removed.l: New file. * gas/mips/r6-64-removed.s: New file. * gas/mips/r6-64.s: New file. * gas/mips/r6-attr-none-double.d: New file. * gas/mips/r6-n32.d: New file. * gas/mips/r6-n64.d: New file. * gas/mips/r6-removed.l: New file. * gas/mips/r6-removed.s: New file. * gas/mips/r6.d: New file. * gas/mips/r6.s: New file. * gas/mips/mipsr6@mips32-dsp.d: New file. * gas/mips/mipsr6@mips32-dspr2.d: New file. * gas/mips/mipsr6@mips32r2-ill.l: New file. * gas/mips/mipsr6@mips32r2-ill.s: New file. * gas/mips/cache.s: Add r6 instruction varients. * gas/mips/mips.exp: Add support for the mips32r6 and mips64r6 architectures. Also prevent non r6 supported tests from running. Finally, add in support for running the new r6 tests. (run_dump_test_arch): Add support for mipsr6 tests. (run_list_test_arch): Add support for using files of the form arch@testname.l . include/elf/ * mips.h: Add relocs: R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16. (E_MIPS_ARCH_32R6): New define. (E_MIPS_ARCH_64R6): New define. include/opcode/ * mips.h (mips_operand_type): Add new entries: OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. Add descriptions for the MIPS R6 instruction arguments: -a, -b, -d, -s, -t, -u, -v, -w, -x, -y, -A, -B, +I, +O, +R, +:, +\, +", +; (mips_check_prev_operand): New struct. (INSN2_FORBIDDEN_SLOT): New define. (INSN_ISA32R6): New define. (INSN_ISA64R6): New define. (INSN_UPTO32R6): New define. (INSN_UPTO64R6): New define. (mips_isa_table): Add INSN_UPTO32R6 and INSN_UPTO64R6. (ISA_MIPS32R6): New define. (ISA_MIPS64R6): New define. (CPU_MIPS32R6): New define. (CPU_MIPS64R6): New define. (cpu_is_member): Add cases for CPU_MIPS32R6, and CPU_MIPS64R6. ld/ * ldmain.c (get_emulation): Add support for -mips32r6 and -mips64r6. opcodes/ * mips-dis.c (mips_arch_choices): Add entries for mips32r6 and mips64r6. (parse_mips_dis_option): Allow MSA and virtualization support for mips64r6. (mips_print_arg_state): Add fields dest_regno and seen_dest. (mips_seen_register): New function. (print_insn_arg): Refactored code to use mips_seen_register function. Add support for OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. Changed OP_REPEAT_DEST_REG case to print out the register rather than aborting. (print_insn_args): Add length argument. Add code to correctly calculate the instruction address for pc relative instructions. (validate_insn_args): New static function. (print_insn_mips): Prevent jalx disassembling for r6. Use validate_insn_args. (print_insn_micromips): Use validate_insn_args. all the arguments are valid. * mips-formats.h (PREV_CHECK): New define. * mips-opc.c (decode_mips_operand): Add support for -a, -b, -d, -s, -t, -u, -v, -w, -x, -y, -A, -B, +I, +O, +R, +:, +\, +", +; (RD_pc): New define. (FS): New define. (I37): New define. (I69): New define. (mips_builtin_opcodes): Add MIPS R6 instructions. Exclude recoded MIPS R6 instructions from MIPS R2 instructions.
2014-09-15daily updateAlan Modra1-1/+1
2014-09-14daily updateAlan Modra1-1/+1
2014-09-13Fix some ChangeLog typosAlan Modra1-4/+4
2014-09-13daily updateAlan Modra1-1/+1
2014-09-12Add mips*-img-elf* target triple.Andrew Bennett2-1/+5
/ * configure.ac: Add mips*-img-elf* target triple. * configure: Regenerate. bfd/ * config.bfd: Add mips*-img-elf* target triple. gas/ * configure.tgt: Add mips*-img-elf* target triple. gas/testsuite/ * gas/mips/mips.exp: Add mips*-img-elf* target triple. binutils/testsuite/ * binutils-all/objcopy.exp: Add mips*-img-elf* target triple. * binutils-all/readelf.exp: Likewise. ld/ * configure.tgt: Add mips*-img-elf* target triple. ld/testsuite/ * ld-mips-elf/mips-elf.exp: Add support for mips*-img-elf* target triple.
2014-09-12Test for overflow in eh_frame_hdr entries and for overlapping FDEsAlan Modra3-10/+50
With larger binaries on 64-bit systems, or indeed just binaries that have a large gap between text and data, it is possible for the .eh_frame_hdr lookup table entry values to overflow a signed 32-bit relative offset. It is also a requirement for the glibc FDE lookup code that only one FDE claim to cover any given address. * elf-bfd.h (struct eh_frame_array_ent): Add "range". * elf-eh-frame.c (_bfd_elf_write_section_eh_frame): Stash address range of FDEs to hdr_info->array. (_bfd_elf_write_section_eh_frame_hdr): Report overflow in .eh_frame_hdr entries, and overlapping FDEs.
2014-09-12daily updateAlan Modra1-1/+1
2014-09-11daily updateAlan Modra1-1/+1
2014-09-11Move ELF section headers to end of object fileAlan Modra4-19/+24
Currently, section ordering differs a little for non-loaded reloc sections output by ld -emit-relocs or ld -r and that after passing such objects through objcopy. Not that it really matters, but it would be better for a simple objcopy to produce an unchanged output object file. Also, section headers are put somewhere in the middle of the non-loaded sections, again slightly differently for ld and objcopy. This patch fixes these discrepancies and puts section headers last, which is where gold puts them, and is where bfd_from_remote_memory wrongly assumed they will be found. bfd/ * elf.c (assign_file_positions_except_relocs): Move section header placement to.. (_bfd_elf_assign_file_positions_for_relocs): ..here. Make static. * elf-bfd.h (_bfd_elf_assign_file_positions_for_relocs): Delete. * elflink.c (bfd_elf_final_link): Don't call above function. gas/testsuite/ * gas/arm/got_prel.d: Adjust for changed section header placement. * gas/i386/ilp32/x86-64-size-1.d: Likewise. * gas/i386/ilp32/x86-64-size-3.d: Likewise. * gas/i386/ilp32/x86-64-size-5.d: Likewise. * gas/i386/ilp32/x86-64-unwind.d: Likewise. * gas/i386/size-1.d: Likewise. * gas/i386/size-3.d: Likewise. * gas/i386/x86-64-size-1.d: Likewise. * gas/i386/x86-64-size-3.d: Likewise. * gas/i386/x86-64-size-5.d: Likewise. * gas/i386/x86-64-unwind.d: Likewise. * gas/ia64/alias-ilp32.d: Likewise. * gas/ia64/alias.d: Likewise. * gas/ia64/group-1.d: Likewise. * gas/ia64/group-2.d: Likewise. * gas/ia64/secname-ilp32.d: Likewise. * gas/ia64/secname.d: Likewise. * gas/ia64/unwind-ilp32.d: Likewise. * gas/ia64/unwind.d: Likewise. * gas/mmix/bspec-1.d: Likewise. * gas/mmix/bspec-2.d: Likewise. * gas/mmix/byte-1.d: Likewise. * gas/mmix/loc-1.d: Likewise. * gas/mmix/loc-2.d: Likewise. * gas/mmix/loc-3.d: Likewise. * gas/mmix/loc-4.d: Likewise. * gas/mmix/loc-5.d: Likewise. * gas/tic6x/scomm-directive-4.d: Likewise. ld/testsuite/ * ld-aarch64/emit-relocs-local-addend.d: Adjust for changed section header placement. * ld-aarch64/local-addend-r.d: Likewise. * ld-mmix/bspec1.d: Likewise. * ld-mmix/bspec2.d: Likewise. * ld-mmix/local1.d: Likewise. * ld-mmix/local3.d: Likewise. * ld-mmix/local5.d: Likewise. * ld-mmix/local7.d: Likewise. * ld-mmix/undef-3.d: Likewise. * ld-sh/sh64/crange3-cmpct.rd: Likewise. * ld-sh/sh64/crange3-media.rd: Likewise. * ld-sh/sh64/crangerel1.rd: Likewise. * ld-sh/sh64/crangerel2.rd: Likewise. * ld-tic6x/common.d: Likewise. * ld-tic6x/shlib-1.rd: Likewise. * ld-tic6x/shlib-1b.rd: Likewise. * ld-tic6x/shlib-1r.rd: Likewise. * ld-tic6x/shlib-1rb.rd: Likewise. * ld-tic6x/shlib-app-1.rd: Likewise. * ld-tic6x/shlib-app-1b.rd: Likewise. * ld-tic6x/shlib-app-1r.rd: Likewise. * ld-tic6x/shlib-app-1rb.rd: Likewise. * ld-tic6x/shlib-noindex.rd: Likewise. * ld-tic6x/static-app-1.rd: Likewise. * ld-tic6x/static-app-1b.rd: Likewise. * ld-tic6x/static-app-1r.rd: Likewise. * ld-tic6x/static-app-1rb.rd: Likewise. * ld-x86-64/ilp32-4.d: Likewise. * ld-x86-64/split-by-file-nacl.rd: Likewise. * ld-x86-64/split-by-file.rd: Likewise.
2014-09-10daily updateAlan Modra1-1/+1
2014-09-09daily updateAlan Modra1-1/+1
2014-09-08daily updateAlan Modra1-1/+1
2014-09-07daily updateAlan Modra1-1/+1
2014-09-06daily updateAlan Modra1-1/+1
2014-09-05daily updateAlan Modra1-1/+1
2014-09-04daily updateAlan Modra1-1/+1
2014-09-03daily updateAlan Modra1-1/+1
2014-09-02daily updateAlan Modra1-1/+1
2014-09-01daily updateAlan Modra1-1/+1
2014-08-31daily updateAlan Modra1-1/+1
2014-08-30ppc476 patch area size miscalculationAlan Modra2-1/+5
ppc476 sections that end exactly on a page boundary need the workaround applied when a function ends in "bctr", or when pasting together code from multiple sections. The space allocated for the patch area didn't allow for this case, while the code in relocate_section performing the patches did, leading to an assertion failure. * elf32-ppc.c (ppc_elf_relax_section): Fix off by one error.
2014-08-30daily updateAlan Modra1-1/+1
2014-08-29PowerPC64 call lacks nop errorAlan Modra2-4/+16
* elf64-ppc.c (ppc64_elf_relocate_section): Report a different error for calls via a toc adjusting stub without a nop.
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