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2015-11-14Bump version to 2.26.51Tristan Gingold3-13/+18
bfd/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * version.m4: Bump version to 2.26.51 * configure: Regenerate. binutils/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. gas/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. gprof/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. ld/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. opcodes/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * configure: Regenerate.
2015-11-15Automatic date update in version.inGDB Administrator1-1/+1
2015-11-14Automatic date update in version.inGDB Administrator1-1/+1
2015-11-13Automatic date update in version.inGDB Administrator1-1/+1
2015-11-12Revert "[LD][AARCH64]Add TLSIE relaxation support under large memory model."Marcus Shawcroft2-63/+2
This reverts commit 3ebe65c0ff9f8f76c9971b1cc078273298f0c693. Reverted due to PR19188
2015-11-11Add assembler, disassembler and linker support for power9.Peter Bergner6-32/+182
include/opcode/ * ppc.h (PPC_OPCODE_POWER9): New define. (PPC_OPCODE_VSX3): Likewise. opcodes/ * ppc-dis.c (ppc_opts): Add "power9" and "pwr9" entries. Add PPC_OPCODE_VSX3 to the vsx entry. (powerpc_init_dialect): Set default dialect to power9. * ppc-opc.c (insert_dcmxs, extract_dcmxs, insert_dxd, extract_dxd, insert_dxdn, extract_dxdn, insert_l0, extract_l0, insert_l1, extract_l1 insert_xtq6, extract_xtq6): New static functions. (insert_esync): Test for illegal L operand value. (DCMX, DCMXS, DXD, NDXD, L0, L1, RC, FC, UIM6, X_R, RIC, PRS, XSQ6, XTQ6, LRAND, IMM8, DQX, DQX_MASK, DX, DX_MASK, VXVAPS_MASK, VXVA,XVA, XX2VA, XVARC, XBF_MASK, XX2UIM4_MASK, XX2BFD_MASK, XX2DCMXS_MASK, XVA_MASK, XRLA_MASK, XBFRARB_MASK, XLRAND_MASK, POWER9, PPCVEC3, PPCVSX3): New defines. (powerpc_opcodes) <ps_cmpu0, ps_cmpo0, ps_cmpu1, ps_cmpo1, fcmpu, fcmpo, ftdiv, ftsqrt>: Use XBF_MASK. <mcrxr>: Use XBFRARB_MASK. <addpcis, bcdcfn., bcdcfsq., bcdcfz., bcdcpsgn., bcdctn., bcdctsq., bcdctz., bcds., bcdsetsgn., bcdsr., bcdtrunc., bcdus., bcdutrunc., cmpeqb, cmprb, cnttzd, cnttzd., cnttzw, cnttzw., copy, copy_first, cp_abort, darn, dtstsfi, dtstsfiq, extswsli, extswsli., ldat, ldmx, lwat, lxsd, lxsibzx, lxsihzx, lxssp, lxv, lxvb16x, lxvh8x, lxvl, lxvll, lxvwsx, lxvx, maddhd, maddhdu, maddld, mcrxrx, mfvsrld, modsd, modsw, modud, moduw, msgsync, mtvsrdd, mtvsrws, paste, paste., paste_last, rmieg, setb, slbieg, slbsync, stdat, stop, stwat, stxsd, stxsibx, stxsihx, stxssp, stxv, stxvb16x, stxvh8x, stxvl, stxvll, stxvx, subpcis, urfid, vbpermd, vclzlsbb, vcmpneb, vcmpneb., vcmpneh, vcmpneh., vcmpnew, vcmpnew., vcmpnezb, vcmpnezb., vcmpnezh, vcmpnezh., vcmpnezw, vcmpnezw., vctzb, vctzd, vctzh, vctzlsbb, vctzw, vextractd, vextractub, vextractuh, vextractuw, vextsb2d, vextsb2w, vextsh2d, vextsh2w, vextsw2d, vextublx, vextubrx, vextuhlx, vextuhrx, vextuwlx, vextuwrx, vinsertb, vinsertd, vinserth, vinsertw, vmul10cuq, vmul10ecuq, vmul10euq, vmul10uq, vnegd, vnegw, vpermr, vprtybd, vprtybq, vprtybw, vrldmi, vrldnm, vrlwmi, vrlwnm, vslv, vsrv, wait, xsabsqp, xsaddqp, xsaddqpo, xscmpeqdp, xscmpexpdp, xscmpexpqp, xscmpgedp, xscmpgtdp, xscmpnedp, xscmpoqp, xscmpuqp, xscpsgnqp, xscvdphp, xscvdpqp, xscvhpdp, xscvqpdp, xscvqpdpo, xscvqpsdz, xscvqpswz, xscvqpudz, xscvqpuwz, xscvsdqp, xscvudqp, xsdivqp, xsdivqpo, xsiexpdp, xsiexpqp, xsmaddqp, xsmaddqpo, xsmaxcdp, xsmaxjdp, xsmincdp, xsminjdp, xsmsubqp, xsmsubqpo, xsmulqp, xsmulqpo, xsnabsqp, xsnegqp, xsnmaddqp, xsnmaddqpo, xsnmsubqp, xsnmsubqpo, xsrqpi, xsrqpix, xsrqpxp, xssqrtqp, xssqrtqpo, xssubqp, xssubqpo, xststdcdp, xststdcqp, xststdcsp, xsxexpdp, xsxexpqp, xsxsigdp, xsxsigqp, xvcmpnedp, xvcmpnedp., xvcmpnesp, xvcmpnesp., xvcvhpsp, xvcvsphp, xviexpdp, xviexpsp, xvtstdcdp, xvtstdcsp, xvxexpdp, xvxexpsp, xvxsigdp, xvxsigsp, xxbrd, xxbrh, xxbrq, xxbrw, xxextractuw, xxinsertw, xxperm, xxpermr, xxspltib>: New instructions. <doze, nap, sleep, rvwinkle, waitasec, lxvx, stxvx>: Disable on POWER9. <tlbiel, tlbie, sync, slbmfev, slbmfee>: Add additional operands. include/elf/ * ppc.h (R_PPC_REL16DX_HA): New reloction. * ppc64.h (R_PPC64_REL16DX_HA): Likewise. bfd/ * elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_REL16DX_HA. (ppc_elf_reloc_type_lookup): Handle R_PPC_REL16DX_HA. (ppc_elf_addr16_ha_reloc): Likewise. (ppc_elf_check_relocs): Likewise. (ppc_elf_relocate_section): Likewise. (is_insn_dq_form): Handle lxv and stxv instructions. * elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_REL16DX_HA. (ppc64_elf_reloc_type_lookup): Handle R_PPC64_REL16DX_HA. (ppc64_elf_ha_reloc): Likewise. (ppc64_elf_check_relocs): Likewise. (ppc64_elf_relocate_section): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Likewise. * reloc.c (BFD_RELOC_PPC_REL16DX_HA): New. elfcpp/ * powerpc.h (R_POWERPC_REL16DX_HA): Define. gas/ * doc/as.texinfo (Target PowerPC): Document -mpower9 and -mpwr9. * doc/c-ppc.texi (PowerPC-Opts): Likewise. * config/tc-ppc.c (md_show_usage): Likewise. (md_assemble): Handle BFD_RELOC_PPC_REL16DX_HA. (md_apply_fix): Likewise. (ppc_handle_align): Handle power9's group ending nop. gas/testsuite/ * gas/ppc/altivec3.s: New test. * gas/ppc/altivec3.d: Likewise. * gas/ppc/vsx3.s: Likewise. * gas/ppc/vsx3.d: Likewise. * gas/ppc/power9.s: Likewise. * gas/ppc/power9.d: Likewise. * gas/ppc/ppc.exp: Run them. * gas/ppc/power8.s <lxvx, lxvd2x, stxvx, stxvd2x>: Add new tests. * gas/ppc/power8.d: Likewise. * gas/ppc/vsx.s: <lxvx, stxvx>: Rename invalid mnemonics ... <lxvd2x, stxvd2x>: ...to this. * gas/ppc/vsx.d: Likewise. gold/ * gold/powerpc.cc (Powerpc_relocate_functions::addr16_dq): New function. (Powerpc_relocate_functions::addr16dx_ha): Likewise. (Target_powerpc::Scan::local): Handle R_POWERPC_REL16DX_HA. (Target_powerpc::Scan::global): Likewise. (Target_powerpc::Relocate::relocate): Likewise. ld/testsuite/ * ld-powerpc/addpcis.d: New test. * ld-powerpc/addpcis.s: New test. * ld-powerpc/powerpc.exp: Run it.
2015-11-12Automatic date update in version.inGDB Administrator1-1/+1
2015-11-11Automatic date update in version.inGDB Administrator1-1/+1
2015-11-10Handle x86 VTINHERIT/VTENTRY relocs when deleting relocationsH.J. Lu3-2/+16
* elf32-i386.c (elf_i386_relocate_section): Handle VTINHERIT and VTENTRY relocations when deleting relocations. * elf64-x86-64.c (elf_x86_64_relocate_section): Likewise.
2015-11-10Properly move kept relocations when deleting relocationsH.J. Lu3-2/+16
* elf32-i386.c (elf_i386_relocate_section): Properly move kept relocations when deleting relocations. * elf64-x86-64.c (elf_x86_64_relocate_section): Likewise.
2015-11-10Fix performance regression on x86 with ld -rH.J. Lu3-8/+98
Similar fix to "commit c316a17c40e44e8798b34ff84130904f2e7a53de". * elf32-i386.c (elf_i386_relocate_section): Use read and write pointers to reloc array, rather than memmove when deleting a reloc. Don't use RELOC_AGAINST_DISCARDED_SECTION. Adjust reloc counts at end of loop. * elf64-x86-64.c (elf_x86_64_relocate_section): Likewise.
2015-11-10Fix performance regression due to ld -r memmoveAlan Modra3-69/+157
The idea here is that instead of using memmove to shuffle the relocs array every time one is deleted, to add a "wrel" pointer and copy from rel[0] to wrel[0] as we go. * elf64-ppc.c (ppc64_elf_relocate_section): Use read and write pointers to reloc array, rather than memmove when deleting a reloc. Don't use RELOC_AGAINST_DISCARDED_SECTION. Adjust reloc counts at end of loop. * elf32-ppc.c (ppc_elf_relocate_section): Likewise.
2015-11-10Automatic date update in version.inGDB Administrator1-1/+1
2015-11-09bfd: Fix left shift of negative value.Dominik Vogt6-7/+16
This patch fixes all occurences of left-shifting negative constants in C code which is undefined by the C standard. bfd/ChangeLog: * elf64-ppc.c (ppc64_elf_size_stubs, ppc64_elf_build_stubs): Fix left shift of negative value. * libbfd.c (safe_read_leb128): Likewise. * dwarf2.c (place_sections): Likewise. * bfd-in.h (align_power): Likewise. * bfd-in2.h (align_power): Likewise.
2015-11-09Automatic date update in version.inGDB Administrator1-1/+1
2015-11-08Automatic date update in version.inGDB Administrator1-1/+1
2015-11-07Automatic date update in version.inGDB Administrator1-1/+1
2015-11-06Automatic date update in version.inGDB Administrator1-1/+1
2015-11-05Automatic date update in version.inGDB Administrator1-1/+1
2015-11-04Automatic date update in version.inGDB Administrator1-1/+1
2015-11-03Automatic date update in version.inGDB Administrator1-1/+1
2015-11-02Automatic date update in version.inGDB Administrator1-1/+1
2015-11-01Automatic date update in version.inGDB Administrator1-1/+1
2015-10-31Automatic date update in version.inGDB Administrator1-1/+1
2015-10-30Updated (simplified) Chinese translations for ld, bfd, binutils and gold.Nick Clifton2-1374/+5538
* po/zh_CN.po: Updated (simplified) Chinese translation.
2015-10-30Automatic date update in version.inGDB Administrator1-1/+1
2015-10-292015-10-29 Catherine Moore <clm@codesourcery.com>Catherine Moore2-0/+8
bfd/ * elfxx-mips.c (mips_elf_check_mips16_stubs): Set a stub's output section to bfd_abs_section_ptr if the stub is discarded. ld/testsuite/ * ld-mips-elf/mips16-fp-stub-1.s: New. * ld-mips-elf/mips16-fp-stub-2.s: New. * ld-mips-elf/mips16-fp-stub.d: New. * ld-mips-elf/mips-elf.exp: Run new tests. * ld-mips-elf/mips16-intermix.d: Update expected output. https://sourceware.org/ml/binutils/2015-10/msg00137.html
2015-10-29Add support for AArch64 CloudABI binaries.Ed Schouten6-2/+44
ld * Makefile.am (ALL_64_EMULATION_SOURCES): Add support for CloudABI on aarch64. For this target we have to make sure we use ELFOSABI_CLOUDABI instead of ELFOSABI_NONE. * configure.tgt (targ_emul): Likewise. * emulparams/aarch64cloudabi.sh: New file. * emulparams/aarch64cloudabib.sh: New file. * Makefile.in: Regenerate. bfd * config.bfd (targ_defvec): Add support for CloudABI on aarch64. For this target we have to make sure we use ELFOSABI_CLOUDABI instead of ELFOSABI_NONE. * configure.ac (tb): Likewise. * elfnn-aarch64.c: Likewise. * targets.c (_bfd_target_vector): Likewise. * configure: Regenerate. gas * config/tc-aarch64.c (elf64_aarch64_target_format): Select the cloudabi format if the TARGET_OS is cloudabi.
2015-10-29bfd/libhppa.h: Make C++ compatiblePedro Alves2-1/+5
Fixes this when GDB is built in C++ mode: In file included from /home/pedro/gdb/mygit/src/gdb/../bfd/som.h:27:0, from /home/pedro/gdb/mygit/src/gdb/somread.c:31: /home/pedro/gdb/mygit/src/gdb/../bfd/libhppa.h: In function ‘int bfd_hppa_insn2fmt(bfd*, int)’: /home/pedro/gdb/mygit/src/gdb/../bfd/libhppa.h:380:42: error: invalid conversion from ‘int’ to ‘hppa_opcode_type’ [-fpermissive] #define get_opcode(insn) (((insn) >> 26) & 0x3f) ^ /home/pedro/gdb/mygit/src/gdb/../bfd/libhppa.h:465:30: note: in expansion of macro ‘get_opcode’ enum hppa_opcode_type op = get_opcode (insn); ^ bfd/ChangeLog: 2015-10-29 Pedro Alves <palves@redhat.com> * libhppa.h (bfd_hppa_insn2fmt): Add cast.
2015-10-29Automatic date update in version.inGDB Administrator1-1/+1
2015-10-28Fix a typo in comment in elf32-i386.cH.J. Lu2-1/+6
* elf32-i386.c (elf_i386_relocate_section): Fix a typo in comment.
2015-10-28Fix recent STM324LXX patch to compile on 32-bit hosts.Nick Clifton2-28/+28
* elf32-arm.c (create_instruction_branch_absolute): Replace pointer parameters with a simple integer parameter. (stm32l4xx_create_replacing_stub_ldmia): Update calls to create_instruction_branch_absolute. (stm32l4xx_create_replacing_stub_ldmdb): Likewise. (stm32l4xx_create_replacing_stub_vldm): Likewise. (elf32_arm_write_section): Use pointer type for veneer addresses.
2015-10-28Fix errors in the gas testsuite for the ARC target.Cupertino Miranda5-1/+31
bfd * reloc.c (BFD_RELOC_ARC_32_PCREL): New entry. (ARC_TLS_DTPOFF): Arrange it in order. * elf32-arc.c (arc_elf_howto_ini): Update formula. (get_middle_endian_relocation): New function. (PDATA): Define. * bfd-in2.h: Regenerate. * libbfd.h: Likewise. elf * arc-reloc.def (ARC_32_PCREL): New definition. gas * config/tc-arc.c (tokenize_arguments): Avoid creating unused symbols when parsing relocation types. (md_apply_fix): Handle TLS relocations. Fix BFD_RELOC_ARC_32_PCREL relocation. (arc_check_reloc): Emit BFD_RELOC_ARC_32_PCREL relocation.
2015-10-28Orphan output section with multiple input sectionsAlan Modra5-26/+34
If given input sections with differing flags, we'd like to place the section according to the final output section flags. bfd/ PR ld/19162 * elflink.c (_bfd_elf_gc_mark_reloc): Move code iterating over linker input bfds.. * section.c (bfd_get_next_section_by_name): ..to here. Add ibfd param. (bfd_get_linker_section): Adjust bfd_get_next_section_by_name call. * tekhex.c (first_phase): Likewise. * elflink.c (bfd_elf_gc_sections): Likewise. * bfd-in2.h: Regenerate. ld/ PR ld/19162 * emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Check flags before calling _bfd_elf_match_sections_by_type. Merge flags for any other input sections that might match a new output section to decide placement.
2015-10-28Automatic date update in version.inGDB Administrator1-1/+1
2015-10-27Add --fix-stm32l4xx-629360 to the ARM linker to enable a link-time ↵Laurent Alfonsi4-6/+1537
workaround for a bug in the bus matrix / memory controller for some of the STM32 Cortex-M4 based products (STM32L4xx). bfd * bfd-in2.h: Regenerate. * bfd-in.h (bfd_arm_stm32l4xx_fix): New enum. Specify how STM32L4XX instruction scanning should be done. (bfd_elf32_arm_set_stm32l4xx_fix) (bfd_elf32_arm_stm32l4xx_erratum_scan) (bfd_elf32_arm_stm32l4xx_fix_veneer_locations): Add prototypes. (bfd_elf32_arm_set_target_relocs): Add stm32l4xx fix type argument to prototype. * elf32-arm.c (STM32L4XX_ERRATUM_VENEER_SECTION_NAME) (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME): Define macros. (elf32_stm32l4xx_erratum_type): New enum. (elf32_stm32l4xx_erratum_list): New struct. List of veneers or jumps to veneers. (_arm_elf_section_data): Add stm32l4xx_erratumcount, stm32l4xx_erratumlist. (elf32_arm_link_hash_table): Add stm32l4xx_erratum_glue_size, stm32l4xx_fix and num_stm32l4xx_fixes fields. (ctz): New function. (popcount): New function. (elf32_arm_link_hash_table_create): Initialize stm32l4xx_fix. (put_thumb2_insn): New function. (STM32L4XX_ERRATUM_LDM_VENEER_SIZE): Define. Size of a veneer for LDM instructions. (STM32L4XX_ERRATUM_VLDM_VENEER_SIZE): Define. Size of a veneer for VLDM instructions. (bfd_elf32_arm_allocate_interworking_sections): Initialise erratum glue section. (record_stm32l4xx_erratum_veneer) : New function. Create a single veneer, and its associated symbols. (bfd_elf32_arm_add_glue_sections_to_bfd): Add STM32L4XX erratum glue. (bfd_elf32_arm_set_stm32l4xx_fix): New function. Set the type of erratum workaround required. (bfd_elf32_arm_stm32l4xx_fix_veneer_locations): New function. Find out where veneers and branches to veneers have been placed in virtual memory after layout. (is_thumb2_ldmia): New function. (is_thumb2_ldmdb): Likewise. (is_thumb2_vldm ): Likewise. (stm32l4xx_need_create_replacing_stub): New function. Decide if a veneer must be emitted. (bfd_elf32_arm_stm32l4xx_erratum_scan): Scan the sections of an input BFD for potential erratum-triggering insns. Record results. (bfd_elf32_arm_set_target_relocs): Set stm32l4xx_fix field in global hash table. (elf32_arm_size_dynamic_sections): Collect glue information. (create_instruction_branch_absolute): New function. (create_instruction_ldmia): Likewise. (create_instruction_ldmdb): Likewise. (create_instruction_mov): Likewise. (create_instruction_sub): Likewise. (create_instruction_vldmia): Likewise. (create_instruction_vldmdb): Likewise. (create_instruction_udf_w): Likewise. (create_instruction_udf): Likewise. (push_thumb2_insn32): Likewise. (push_thumb2_insn16): Likewise. (stm32l4xx_fill_stub_udf): Likewise. (stm32l4xx_create_replacing_stub_ldmia): New function. Expands the replacing stub for ldmia instructions. (stm32l4xx_create_replacing_stub_ldmdb): Likewise for ldmdb. (stm32l4xx_create_replacing_stub_vldm): Likewise for vldm. (stm32l4xx_create_replacing_stub): New function. Dispatches the stub emission to the appropriate functions. (elf32_arm_write_section): Output veneers, and branches to veneers. ld * ld.texinfo: Description of the STM32L4xx erratum workaround. * emultempl/armelf.em (stm32l4xx_fix): New. (arm_elf_before_allocation): Choose the type of fix, scan for erratum. (gld${EMULATION_NAME}_finish): Fix veneer locations. (arm_elf_create_output_section_statements): Propagate stm32l4xx_fix value. (PARSE_AND_LIST_PROLOGUE): Define OPTION_STM32L4XX_FIX. (PARSE_AND_LIST_LONGOPTS): Add entry for handling --fix-stm32l4xx-629360. (PARSE_AND_LIST_OPTION): Add entry for helping on --fix-stm32l4xx-629360. (PARSE_AND_LIST_ARGS_CASES): Treat OPTION_STM32L4XX_FIX. tests * ld-arm/arm-elf.exp (armelftests_common): Add STM32L4XX tests. * ld-arm/stm32l4xx-cannot-fix-far-ldm.d: New. * ld-arm/stm32l4xx-cannot-fix-far-ldm.s: Likewise. * ld-arm/stm32l4xx-cannot-fix-it-block.d: Likewise. * ld-arm/stm32l4xx-cannot-fix-it-block.s: Likewise. * ld-arm/stm32l4xx-fix-all.d: Likewise. * ld-arm/stm32l4xx-fix-all.s: Likewise. * ld-arm/stm32l4xx-fix-it-block.d: Likewise. * ld-arm/stm32l4xx-fix-it-block.s: Likewise. * ld-arm/stm32l4xx-fix-ldm.d: Likewise. * ld-arm/stm32l4xx-fix-ldm.s: Likewise. * ld-arm/stm32l4xx-fix-vldm.d: Likewise. * ld-arm/stm32l4xx-fix-vldm.s: Likewise.
2015-10-27Add support for 32-bit and 64-bit PowerPC AIX core files.Sangamesh Mallayya4-23/+101
* configure.ac (powerpc64-*-aix[5-9].*): Match powerpc64 running aix for core file support. * configure: Regenerate. * rs6000-core.c: Check for __ld_info64 if compiling 64-bit gdb. Added BFD64 check if we are using old core file format for 32-bit gdb. Set sizeof CORE_COMMONSZ appropriately in case of either new or old core file format. (read_hdr): Added BFD64 check for 64-bit support. (rs6000coff_core_p): Likewise. (rs6000coff_core_file_matches_executable_p): Likewise. (rs6000coff_core_file_failing_command): Likewise. (rs6000coff_core_file_failing_signal): Likewise. Add support for debugging core files generated by binaries in Large Memory model. (rs6000coff_core_p): If Large Memory Model is used, then the .data segment should start from BDATAORG which has been defined in the system header files.
2015-10-27Automatic date update in version.inGDB Administrator1-1/+1
2015-10-26Check symbol defined by assignment in linker scriptH.J. Lu5-102/+30
Symbol symbol defined by an assignment in a linker script has type bfd_link_hash_new. elf_i386_convert_load and elf_x86_64_convert_load should check bfd_link_hash_new to see if a symbol is defined by a linker script. bfd/ PR ld/19175 * elf32-i386.c (elf_i386_convert_load): Check bfd_link_hash_new instead of calling bfd_link_get_defined_symbol. * elf64-x86-64.c (elf_x86_64_convert_load): Likewise. Skip relocation overflow for bfd_link_hash_new. * linker.c (bfd_link_get_defined_symbol): Removed. * bfd-in2.h: Regenerated. ld/testsuite/ PR ld/19175 * ld-i386/i386.exp: Run pr19175. * ld-x86-64/x86-64.exp: Likewise. * ld-i386/pr19175.d: New file. * ld-i386/pr19175.s: Likewise. * ld-i386/pr19175.t: Likewise. * ld-x86-64/pr19175.d: Likewise. * ld-x86-64/pr19175.s: Likewise. * ld-x86-64/pr19175.t: Likewise.
2015-10-26Properly convert address load of __start_XXX/__stop_XXXH.J. Lu5-10/+114
Since __start_XXX and __stop_XXX symbols aren't defined when address load is being converted, we need to check if there is an XXX output section to get their section and value. This patch adds a new function, bfd_link_get_defined_symbol, to search for the XXX output section to check if __start_XXX and __stop_XXX symbols are defined. bfd/ PR ld/19171 * elf32-i386.c (elf_i386_convert_load): Call bfd_link_get_defined_symbol to check if a symbol is defined. * elf64-x86-64.c (elf_x86_64_convert_load): Call bfd_link_get_defined_symbol to get defined symbol section and value. * linker.c (bfd_link_get_defined_symbol): New function. * bfd-in2.h: Regenerated. ld/testsuite/ PR ld/19171 * ld-i386/lea1.s: Add tests for address load of __start_XXX and __stop_XXX. * ld-i386/mov1.s: Likewise. * ld-x86-64/lea1.s: Likewise. * ld-x86-64/mov1.s: Likewise. * ld-i386/lea1a.d: Updated. * ld-i386/lea1b.d: Likewise. * ld-i386/lea1c.d: Likewise. * ld-i386/mov1a.d: Likewise. * ld-i386/mov1b.d: Likewise. * ld-x86-64/lea1a.d: Likewise. * ld-x86-64/lea1b.d: Likewise. * ld-x86-64/lea1c.d: Likewise. * ld-x86-64/lea1d.d: Likewise. * ld-x86-64/lea1e.d: Likewise. * ld-x86-64/lea1f.d: Likewise. * ld-x86-64/mov1a.d: Likewise. * ld-x86-64/mov1b.d: Likewise. * ld-x86-64/mov1c.d: Likewise. * ld-x86-64/mov1d.d: Likewise.
2015-10-26Automatic date update in version.inGDB Administrator1-1/+1
2015-10-25Automatic date update in version.inGDB Administrator1-1/+1
2015-10-24Automatic date update in version.inGDB Administrator1-1/+1
2015-10-23Handle __start_* and __stop_* symbols in --gc-sectionsAlan Modra4-39/+82
PR ld/11133 PR ld/19161 PR ld/19167 * elflink.c (_bfd_elf_gc_mark_hook): Delete code handling __start_* and __stop_* symbol refs. (_bfd_elf_gc_mark_rsec): Add start_stop parameter. Handle __start_* and __stop_* symbol refs here.. (_bfd_elf_gc_mark_reloc): ..and here. * elf-bfd.h (_bfd_elf_gc_mark_hook): Update prototype. * elf-eh-frame.c (_bfd_elf_parse_eh_frame): Update _bfd_elf_gc_mark_rsec call.
2015-10-23Automatic date update in version.inGDB Administrator1-1/+1
2015-10-23Re: Always keep sections marked with SEC_KEEPAlan Modra2-3/+9
Revert bba037e0, it breaks the gc-sections model. Instead fix the underlying problem which is that _bfd_elf_gc_mark_hook is too late to be setting SEC_KEEP. PR ld/11133 PR ld/19161 * elflink.c (elf_gc_sweep): Revert last patch. (_bfd_elf_gc_mark_hook): Don't set SEC_KEEP here.
2015-10-22Always keep sections marked with SEC_KEEPH.J. Lu2-1/+8
SEC_KEEP check in elf_gc_sweep was missing in commit: commit bde6f3eb6dff94cea1d471e15c6154d55d49820f Author: H.J. Lu <hjl.tools@gmail.com> Date: Fri Jan 8 01:43:23 2010 +0000 Set SEC_KEEP on section XXX for undefined __start_XXX/__stop_XXX bfd/ 2010-01-07 H.J. Lu <hongjiu.lu@intel.com> PR ld/11133 * elflink.c (_bfd_elf_gc_mark_hook): Check section XXX for undefined __start_XXX/__stop_XXX in all input files and set SEC_KEEP. This patch adds SEC_KEEP check to elf_gc_sweep. bfd/ PR ld/19161 * elflink.c (elf_gc_sweep): Always keep sections marked with SEC_KEEP. ld/testsuite/ PR ld/19161 * ld-gc/gc.exp: Run pr19161 test. * ld-gc/pr19161-1.c: New file. * ld-gc/pr19161-2.c: Likewise. * ld-gc/pr19161.d: Likewise.
2015-10-22bfd/mmo.c: handle "objcopy --extract-symbols" generating and reading back.Hans-Peter Nilsson2-3/+51
bfd: * mmo.c (struct mmo_data_struct): New members symbol_consistency_override_calculated and ignore_symbol_consistency. (mmo_section_has_contents, mmo_ignore_symbol_consistency): New functions. (mmo_create_symbol): Check with mmo_ignore_symbol_consistency if to report an error for unexpected value of Main. (mmo_write_symbols_and_terminator): Similar.
2015-10-22Add "-z call-nop=PADDING" option to ldH.J. Lu3-5/+25
The ld linker can transform indirect call to a locally defined function, foo, via its GOT slot, to either "NOP call foo" or "call foo NOP" where NOP is a 1-byte NOP padding. This patch adds a "-z call-nop=PADDING" option to x86 ld to control 1-byte NOP padding for x86 call instruction. PADDING is one of prefix-addr, prefix-nop, suffix-nop, prefix-NUMBER or suffix-NUMBER. bfd/ * elf32-i386.c (elf_i386_convert_load): Use call_nop_byte and check call_nop_as_suffix for 1-byte NOP padding to pad call. * elf64-x86-64.c (elf_x86_64_convert_load): Likewise. include/ * bfdlink.h (bfd_link_info): Add call_nop_as_suffix and call_nop_byte. ld/ * ld/ld.texinfo: Document "-z call-nop=PADDING" option. * emulparams/call_nop.sh: New file. * emulparams/elf_i386_be.sh: Source ${srcdir}/emulparams/call_nop.sh. * emulparams/elf_i386_chaos.sh: Likewise. * emulparams/elf_i386_ldso.sh: Likewise. * emulparams/elf_i386_vxworks.sh: Likewise. * emulparams/elf_iamcu.sh: Likewise. * emulparams/elf_k1om.sh: Likewise. * emulparams/elf_l1om.sh: Likewise. * emulparams/elf_x86_64.sh: Likewise. * emultempl/elf32.em (gld${EMULATION_NAME}_before_parse): Set link_info.call_nop_byte if $CALL_NOP_BYTE isn't empty. ld/testsuite/ * ld-i386/call3.s: New file. * ld-i386/call3a.d: Likewise. * ld-i386/call3b.d: Likewise. * ld-i386/call3c.d: Likewise. * ld-i386/call3d.d: Likewise. * ld-i386/call3e.d: Likewise. * ld-i386/call3f.d: Likewise. * ld-i386/call3g.d: Likewise. * ld-i386/call3h.d: Likewise. * ld-i386/load1-nacl.d: Likewise. * ld-x86-64/call1.s: Likewise. * ld-x86-64/call1a.d: Likewise. * ld-x86-64/call1b.d: Likewise. * ld-x86-64/call1c.d: Likewise. * ld-x86-64/call1d.d: Likewise. * ld-x86-64/call1e.d: Likewise. * ld-x86-64/call1f.d: Likewise. * ld-x86-64/call1g.d: Likewise. * ld-x86-64/call1h.d: Likewise. * ld-x86-64/call1i.d: Likewise. * ld-x86-64/load1a-nacl.d: Likewise. * ld-x86-64/load1b-nacl.d: Likewise. * ld-x86-64/load1c-nacl.d: Likewise. * ld-x86-64/load1d-nacl.d: Likewise.
2015-10-22Add R_X86_64_[REX_]GOTPCRELX support to gas and ldH.J. Lu5-30/+199
This patch adds support for the R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX relocations proposed in https://groups.google.com/forum/#!topic/x86-64-abi/n9AWHogmVY0 to gas and ld. It updates gas to generate R_X86_64_GOTPCRELX, R_X86_64_REX_GOTPCRELX if there is a REX prefix, relocation for memory operand, foo@GOTPCREL(%rip). With the locally defined symbol, foo, we convert mov foo@GOTPCREL(%rip), %reg to lea foo(%rip), %reg and convert call/jmp *foo@GOTPCREL(%rip) to nop call foo/jmp foo nop When PIC is false, convert test %reg, foo@GOTPCREL(%rip) to test $foo, %reg and convert binop foo@GOTPCREL(%rip), %reg to binop $foo, %reg where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions. bfd/ * elf64-x86-64.c: Include opcode/i386.h. (x86_64_elf_howto_table): Add R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX. (R_X86_64_standard): Replace R_X86_64_PLT32_BND with R_X86_64_REX_GOTPCRELX. (x86_64_reloc_map): Add BFD_RELOC_X86_64_GOTPCRELX and BFD_RELOC_X86_64_REX_GOTPCRELX. (need_convert_mov_to_lea): Renamed to ... (need_convert_load): This. (elf_x86_64_check_relocs): Handle R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX. Replace need_convert_mov_to_lea with need_convert_load. (elf_x86_64_gc_sweep_hook): Handle R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX. (elf_x86_64_size_dynamic_sections): Likewise. (elf_x86_64_relocate_section): Likewise. (elf_x86_64_convert_mov_to_lea): Renamed to ... (elf_x86_64_convert_load): This. Replace need_convert_mov_to_lea with need_convert_load. Support R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX transformations. * reloc.c (BFD_RELOC_X86_64_GOTPCRELX): New. (BFD_RELOC_X86_64_REX_GOTPCRELX): Likewise. * bfd-in2.h: Regenerated. * libbfd.h: Likewise. gas/ * config/tc-i386.c (tc_i386_fix_adjustable): Handle BFD_RELOC_X86_64_GOTPCRELX and BFD_RELOC_X86_64_REX_GOTPCRELX. (tc_gen_reloc): Likewise. (i386_validate_fix): Generate BFD_RELOC_X86_64_GOTPCRELX or BFD_RELOC_X86_64_REX_GOTPCRELX if fx_tcbit2 is set. * config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Also return true for BFD_RELOC_X86_64_GOTPCRELX and BFD_RELOC_X86_64_REX_GOTPCRELX. gas/testsuite/ * gas/i386/i386.exp: Run x86-64-gotpcrel. * gas/i386/x86-64-gotpcrel.d: New file. * gas/i386/x86-64-gotpcrel.s: Likewise. * gas/i386/ilp32/x86-64-gotpcrel.d: Likewise. * gas/i386/x86-64-localpic.d: Replace R_X86_64_GOTPCREL with R_X86_64_REX_GOTPCRELX. * gas/i386/ilp32/x86-64-localpic.d: Likewise. include/elf/ * x86-64.h (R_X86_64_GOTPCRELX): New. (R_X86_64_REX_GOTPCRELX): Likewise. ld/testsuite/ * ld-ifunc/ifunc-5r-local-x86-64.d: Replace R_X86_64_GOTPCREL with R_X86_64_REX_GOTPCRELX. * ld-x86-64/plt-main1.rd: Likewise. * ld-x86-64/plt-main3.rd: Likewise. * ld-x86-64/plt-main4.rd: Likewise. * ld-x86-64/gotpcrel1.dd: New file. * ld-x86-64/gotpcrel1.out: Likewise. * ld-x86-64/gotpcrel1a.S: Likewise. * ld-x86-64/gotpcrel1b.c: Likewise. * ld-x86-64/gotpcrel1c.c: Likewise. * ld-x86-64/gotpcrel1d.S: Likewise. * ld-x86-64/load1.s: Likewise. * ld-x86-64/load1a.d: Likewise. * ld-x86-64/load1b.d: Likewise. * ld-x86-64/load1c.d: Likewise. * ld-x86-64/load1d.d: Likewise. * ld-x86-64/x86-64.exp: Run load1a, load1b, load1c and load1d tests. Run gotpcrel1 test.