Age | Commit message (Collapse) | Author | Files | Lines |
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non-SEC_ALLOC sections break before GOT and PLT accounting.
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R_CRIS_8, R_CRIS_16, and R_CRIS_32>: Move early break for
non-SEC_ALLOC sections before GOT and PLT accounting.
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2011-11-29 Andrew Pinski <apinski@cavium.com>
* mips-dis.c (mips_arch_choices): Add Octeon+.
* mips-opc.c (IOCT): Include Octeon+.
(IOCTP): New macro.
(mips_builtin_opcodes): Add "saa" and "saad".
bfd/
2011-11-29 Andrew Pinski <apinski@cavium.com>
* archures.c (bfd_mach_mips_octeonp): New macro.
* bfd-in2.h: Regenerate.
* bfd/cpu-mips.c (I_mipsocteonp): New enum value.
(arch_info_struct): Add bfd_mach_mips_octeonp.
* elfxx-mips.c (mips_set_isa_flags): Add bfd_mach_mips_octeonp.
(mips_mach_extensions): Add bfd_mach_mips_octeonp.
include/opcodes/
2011-11-29 Andrew Pinski <apinski@cavium.com>
* mips.h (INSN_CHIP_MASK): Update according to INSN_OCTEONP.
(INSN_OCTEONP): New macro.
(CPU_OCTEONP): New macro.
(OPCODE_IS_MEMBER): Add Octeon+.
(M_SAA_AB, M_SAAD_AB, M_SAA_OB, M_SAAD_OB): New enum values.
gas/
2011-11-29 Andrew Pinski <apinski@cavium.com>
* config/tc-mips.c (CPU_IS_OCTEON): New macro function.
(CPU_HAS_SEQ): Change to use CPU_IS_OCTEON.
(NO_ISA_COP): Likewise.
(macro) <ld_st>: Add support when off0 is true.
Add support for M_SAA_AB, M_SAA_OB, M_SAAD_OB and M_SAAD_AB.
(mips_cpu_info_table): Add octeon+.
* doc/c-mips.texi: Document octeon+ as an acceptable value for -march=.
gas/testsuite/
2011-11-29 Andrew Pinski <apinski@cavium.com>
* gas/mips/mips.exp: Add octeon+ for an architecture.
Run octeon-saa-saad test.
(run_dump_test_arch): For Octeon architectures, also try octeon@.
* gas/mips/octeon-pref.d: Remove -march=octeon from command line.
* gas/mips/octeon.d: Likewise.
* gas/mips/octeon-saa-saad.d: New file.
* gas/mips/octeon-saa-saad.s: New file
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* vms-lib.c (get_idxlen): Add comments. Fix type in sizeof.
(vms_write_index): Add comments.
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avoid using the special non-swapping target when not explicitly
requested.
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* mach-o.c (bfd_mach_o_print_symbol): Display COM for common
symbols. Print section name in brackets.
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* configure.in (TDEFINES): Add rules for powerpc*-freebsd.
* configure: Regenerate.
* elf32-ppc.c: Add powerpc-freebsd definitions.
* elf64-ppc.c: Add powerpc64-freebsd definitions.
* targets.c: Add bits for powerpc and powerpc64-freebsd.
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needs to be translated only once.
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zero throughout.
(mips16_elf64_howto_table_rela): Likewise.
(micromips_elf64_howto_table_rela): Likewise.
* elfn32-mips.c (elf_mips_howto_table_rela): Likewise.
(elf_mips16_howto_table_rela): Likewise.
(elf_micromips_howto_table_rela): Likewise.
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bfd_make_section_with_flags with bfd_make_section_anyway_with_flags.
(_bfd_elf_link_create_dynamic_sections): Likewise.
* elf32-ppc.c (ppc_elf_create_glink): Likewise.
(ppc_elf_create_dynamic_sections): Likewise.
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immediate move into an address register.
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executables when export_dynamic.
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* elf64-ppc.c (struct ppc64_elf_obj_tdata): Rename
ha_relocs_not_using_r2 to unexpected_toc_insn.
(ok_lo_toc_insn): New function.
(ppc64_elf_edit_toc): Check insn on lo toc reloc. Emit warning.
(ppc64_elf_relocate_section): Don't check insn on lo toc reloc here.
Handle addic on lo toc reloc.
ld/testsuite/
* ld-powerpc/powerpc.exp: Expect ld warnings for tocopt test.
* ld-powerpc/tocopt.out: New file.
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* elf32-hppa.c (elf32_hppa_hide_symbol): Make STT_GNU_IFUNC symbol
go through PLT. Reset plt field with init_plt_offset.
(elf32_hppa_adjust_dynamic_symbol): Ensure that a PLT slot is
allocated for symbols referenced by a plabel.
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* elf32-rl78.c (rl78_elf_merge_private_bfd_data): Delete unused
variable.
[gas]
* config/tc-rl78.c (tc_gen_reloc): Remove unused variable.
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(where relocatable objects are in ELF format) so far led to all local (aka
static) symbols to be discarded, making debugging quite a bit more difficult
(like Linux, Xen builds an internal symbol lookup table from nm output
generated on the binary produced by an earlier linking pass). Therefore, this
patch arranges to insert all (relevant) local symbols from non-COFF objects
into the final executable's symbol table between those coming from COFF input
files and the global ones.
bfd/
2011-11-02 Jan Beulich <jbeulich@suse.com>
* coffgen.c (coff_write_alien_symbol): Make public. Add 'struct
internal_syment *' parameter. Extend 'dummy' to an array with two
elements. Set n_numaux early. Handle BSF_FILE.
(coff_write_symbols): Pass NULL as new third argument to
coff_write_alien_symbol().
* cofflink.c (_bfd_coff_final_link): Don't use COFF-specific
obj_raw_syment_count() on non-COFF input BFD. Insert local symbols
from non-COFF input BFDs.
* libcoff-in.h (coff_write_alien_symbol): Declare.
* libcoff.h (coff_write_alien_symbol): Re-generate.
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* configure.ac (rl78-*-*) New case.
* configure: Regenerate.
[bfd]
* Makefile.am (ALL_MACHINES): Add cpu-rl78.lo.
(ALL_MACHINES_CFILES): Add cpu-rl78.c.
(BFD32_BACKENDS): Add elf32-rl78.lo.
(BFD32_BACKENDS_CFILES): Add elf32-rl78.c.
(Makefile.in): Regenerate.
* archures.c (bfd_architecture): Define bfd_arch_rl78.
(bfd_archures_list): Add bfd_rl78_arch.
* config.bfd: Add rl78-*-elf.
* configure.in: Add bfd_elf32_rl78_vec.
* reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations.
* targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* libbfd.h: Regenerate.
* cpu-rl78.c: New file.
* elf32-rl78.c: New file.
[binutils]
* readelf.c: Include elf/rl78.h
(guess_is_rela): Handle EM_RL78.
(dump_relocations): Likewise.
(get_machine_name): Likewise.
(is_32bit_abs_reloc): Likewise.
* NEWS: Mention addition of RL78 support.
* MAINTAINERS: Add myself as RL78 port maintainer.
[gas]
* Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c.
(TARGET_CPU_HFILES): Add rc-rl78.h.
(EXTRA_DIST): Add rl78-parse.c and rl78-parse.y.
(rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules.
* Makefile.in: Regenerate.
* configure.in: Add rl78 case.
* configure: Regenerate.
* configure.tgt: Add rl78 case.
* config/rl78-defs.h: New file.
* config/rl78-parse.y: New file.
* config/tc-rl78.c: New file.
* config/tc-rl78.h: New file.
* NEWS: Add Renesas RL78.
* doc/Makefile.am (c-rl78.texi): New.
* doc/Makefile.in: Likewise.
* doc/all.texi: Enable it.
* doc/as.texi: Add it.
[include]
* dis-asm.h (print_insn_rl78): Declare.
[include/elf]
* common.h (EM_RL78, EM_78K0R): New.
* rl78.h: New.
[include/opcode]
* rl78.h: New file.
[ld]
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c.
(+eelf32rl78.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Add rl78-*-* case.
* emulparams/elf32rl78.sh: New file.
* NEWS: Mention addition of Renesas RL78 support.
[opcodes]
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and
rl78-dis.c.
(MAINTAINERCLEANFILES): Add rl78-decode.c.
(rl78-decode.c): New rule, built from rl78-decode.opc and opc2c.
* Makefile.in: Regenerate.
* configure.in: Add bfd_rl78_arch case.
* configure: Regenerate.
* disassemble.c: Define ARCH_rl78.
(disassembler): Add ARCH_rl78 case.
* rl78-decode.c: New file.
* rl78-decode.opc: New file.
* rl78-dis.c: New file.
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