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include/mach-o:
* external.h (mach_o_prebound_dylib_command_external)
(mach_o_prebind_cksum_command_external)
(mach_o_twolevel_hints_command_external): New types.
bfd/
* mach-o.h (bfd_mach_o_twolevel_hints_command)
(bfd_mach_o_prebind_cksum_command): New types.
(bfd_mach_o_prebound_dylib_command): Rewrite.
(bfd_mach_o_load_command): Add prebind_cksum and twolevel_hints
fields.
* mach-o.c (bfd_mach_o_read_prebound_dylib): Read and decode the
command.
(bfd_mach_o_read_prebind_cksum): New function.
(bfd_mach_o_read_twolevel_hints): Ditto.
(bfd_mach_o_read_command): Handle prebind cksum and twolevel hints
commands.
binutils/
* od-macho.c (OPT_TWOLEVEL_HINTS): New macro.
(options): Add entry for twolevel_hints.
(dump_data_in_code): Fix error message.
(dump_twolevel_hints): New function.
(dump_load_command): Handle prebound dylib, prebind cksum
and twolevel hints.
(mach_o_dump): Handle twolevel hints.
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When a VDSO gets large enough that it doesn't entirely fit in one page,
but not so large that the part described by the program header exceeds
one page, then gdb/BFD doesn't read the section headers and symbol
table information. This patch cures that by passing the size of the
vdso to BFD, and fixes a number of other issues in the BFD code.
bfd/
* elfcode.h (bfd_from_remote_memory): Add "size" parameter.
Consolidate code handling possible section headers past end of
segment. Don't use p_align for page size guess, instead use
minpagesize. Take note of ld.so clearing section headers when
p_memsz > p_filesz. Handle file header specifying no section
headers. Handle zero p_align throughout. Default loadbase to
zero. Add comments. Rename contents_size to high_offset, and
make it a bfd_vma. Delete unnecessary bfd_set_error calls.
* bfd-in.h (bfd_elf_bfd_from_remote_memory): Update prototpe.
* elf-bfd.h (struct elf_backend_data <elf_backend_from_remote_memory>):
Likewise.
(_bfd_elf32_bfd_from_remote_memory): Likewise.
(_bfd_elf64_bfd_from_remote_memory): Likewise.
* elf.c (bfd_elf_bfd_from_remote_memory): Adjust.
* bfd-in2.h: Regnerate.
gdb/
* symfile-mem.c (symbol_file_add_from_memory): Add size parameter.
Pass to bfd_elf_bfd_from_remote_memory. Adjust all callers.
(struct symbol_file_add_from_memory_args): Add size field.
(find_vdso_size): New function.
(add_vsyscall_page): Attempt to find vdso size.
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bfd/
* mach-o.c (bfd_mach_o_canonicalize_one_reloc): Avoid to crash
when num == 0.
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targets.
* elf32-arm.c (elf32_arm_get_synthetic_symtab): Add new callback.
(elf32_arm_nacl_plt_sym_val): Likewise.
(elf32_arm_plt0_size): Add helper function.
(elf32_arm_plt_size): Likewise.
* ld-arm/arm-app-abs32.d: Updated test.
* ld-arm/arm-app.d: Likewise.
* ld-arm/arm-lib-plt32.d: Likewise.
* ld-arm/arm-lib.d: Likewise.
* ld-arm/armthumb-lib.d: Likewise.
* ld-arm/cortex-a8-fix-b-plt.d: Likewise.
* ld-arm/cortex-a8-fix-bcc-plt.d: Likewise.
* ld-arm/cortex-a8-fix-bl-plt.d: Likewise.
* ld-arm/cortex-a8-fix-bl-rel-plt.d: Likewise.
* ld-arm/cortex-a8-fix-blx-plt.d: Likewise.
* ld-arm/farcall-mixed-app-v5.d: Likewise.
* ld-arm/farcall-mixed-app.d: Likewise.
* ld-arm/farcall-mixed-lib-v4t.d: Likewise.
* ld-arm/farcall-mixed-lib.d: Likewise.
* ld-arm/ifunc-10.dd: Likewise.
* ld-arm/ifunc-14.dd: Likewise.
* ld-arm/ifunc-15.dd: Likewise.
* ld-arm/ifunc-3.dd: Likewise.
* ld-arm/ifunc-4.dd: Likewise.
* ld-arm/ifunc-7.dd: Likewise.
* ld-arm/ifunc-8.dd: Likewise.
* ld-arm/ifunc-9.dd: Likewise.
* ld-arm/long-plt-format.d: Likewise.
* ld-arm/mixed-app-v5.d: Likewise.
* ld-arm/mixed-app.d: Likewise.
* ld-arm/mixed-lib.d: Likewise.
* ld-arm/thumb2-bl-undefweak.d: Likewise.
* ld-arm/thumb2-bl-undefweak1.d: Likewise.
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bfd/
* mach-o.c (bfd_mach_o_read_dylinker): Remove assert.
(bfd_mach_o_read_command): Handle BFD_MACH_O_LC_DYLD_ENVIRONMENT.
binutils/
* od-macho.c (dump_load_command): Display value for
BFD_MACH_O_LC_DYLD_ENVIRONMENT. Handle BFD_MACH_O_LC_DATA_IN_CODE
and BFD_MACH_O_LC_DYLIB_CODE_SIGN_DRS.
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bfd/
* mach-o.h (bfd_mach_o_get_base_address): New prototype.
* mach-o.c (bfd_mach_o_write_symtab)
(bfd_mach_o_write_contents)
(bfd_mach_o_set_section_flags_from_bfd)
(bfd_mach_o_build_seg_command): Fix indentation.
(bfd_mach_o_get_base_address): New function.
binutils/
* od-macho.c (OPT_FUNCTION_STARTS): New macro.
(options): Add entry for function_starts.
(mach_o_help): Ditto.
(disp_segment_prot): New function.
(dump_section_map): Call disp_segment_prot.
(dump_function_starts): New function.
(dump_obj_compact_unwind): Fix ouput indentation.
(dump_exe_compact_unwind): Fix ouput indentation.
(mach_o_dump): Handle function_starts.
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produce spurious errors about truncated relocations. The relocations are
only truncated because they are being made against sections which are going
to be discarded so that base address is zero instead of the expected 64-bit
base value.
* cofflink.c (_bfd_coff_generic_relocate_section): Skip
relocations in discarded sections.
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include/mach-o/
* loader.h (bfd_mach_o_cpu_type): Add BFD_MACH_O_CPU_TYPE_ARM64.
bfd/
* mach-o.c (bfd_mach_o_convert_architecture): Add
BFD_MACH_O_CPU_TYPE_ARM64.
binutils/
* od-macho.c (bfd_mach_o_cpu_name): Add BFD_MACH_O_CPU_TYPE_ARM64.
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ELFv2 needs to create plt entries in a non-PIC executable for an
address reference to a function defined in a shared object. It's
possible that an object file has no features that distinguish it as
ELFv1 or ELFv2, eg. an object only containing data. Such files need
to be handled like those that are known to be ELFv2.
However, this unnecessarily creates plt entries for the analogous
ELFv1 case, so arrange to set output abi version earlier, and use the
output abi version to further distinguish ambiguous input files.
bfd/
* elf64-ppc.c (ppc64_elf_check_relocs): Account for possibly
needed plt entries when taking the address of functions for
abiversion == 0 (ie. unknown) as well as abiversion == 2.
Move opd setup and abiversion checks to..
(ppc64_elf_before_check_relocs): ..here. Renamed from
ppc64_elf_process_dot_syms. Set output abiversion from input and
input abiversion from output, if either is not set.
(ppc64_elf_merge_private_bfd_data): Don't merge flags here.
(elf_backend_check_directives): Update.
ld/testsuite/
* ld-powerpc/startv1.s, * ld-powerpc/startv2.s, * ld-powerpc/funref.s,
* ld-powerpc/funv1.s, * ld-powerpc/funv2.s,
* ld-powerpc/ambiguousv1.d, * ld-powerpc/ambiguousv2.d: New test files.
* ld-powerpc/powerpc.exp: Run new tests.
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The current code subtracts the size of the output section containing
relplt from RELASZ. In some cases this will be the same output
section as the dynamic relocs causing a value of zero to be output.
Calculating the size from input sections seems to make more sense.
bfd/ChangeLog:
2014-03-25 Will Newton <will.newton@linaro.org>
* elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_sections):
Set value of DT_PLTRELSZ and DT_RELASZ based on the size
of input sections rather than output sections.
ld/testsuite/ChangeLog:
2014-03-25 Will Newton <will.newton@linaro.org>
* ld-aarch64/aarch64-elf.exp: Add relasz dump test.
* ld-aarch64/relasz.d: New file.
* ld-aarch64/relasz.s: Likewise.
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Unless pointer_equality_needed is set then set st_value to be zero
for undefined symbols.
bfd/ChangeLog:
2014-03-20 Will Newton <will.newton@linaro.org>
PR ld/16715
* elf32-arm.c (elf32_arm_check_relocs): Set
pointer_equality_needed for absolute references within
executable links.
(elf32_arm_finish_dynamic_symbol): Set st_value to zero
unless pointer_equality_needed is set.
ld/testsuite/ChangeLog:
2014-03-20 Will Newton <will.newton@linaro.org>
* ld-arm/ifunc-14.rd: Update symbol values.
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should work for all types of input .rsrc section.
* peXXigen.c (rsrc_process_section): Add code to scan input
sections and record their lengths. Use these lengths to find the
start of each merged .rsrc section.
* scripttempl/pe.sc (R_RSRC): Fix default-manifest exclusion.
(.rsrc): Add SUBALIGN(4). Remove SORT.
* scripttempl/pep.sc: Likewise.
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made between merged .rsrc sections.
* peXXigen.c (rsrc_align): New function. Attempts to cope with
alignment variances when .rsrc sections are merged.
(rsrc_process_section): Use rsrc_align.
* Makefile.am (default-manifest.o): Use WINDRES_FOR_TARGET.
* Makefile.in: Regenerate.
* emultempl/default-manifest.rc: Fix typo.
* scripttempl/pe.sc (R_RSRC): Fix default-manifest exclusion.
(.rsrc): Add SUBALIGN(4).
* scripttempl/pep.sc: Likewise.
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bfd/
* mach-o.c (bfd_mach_o_read_dylib): Handle lazy load dylib.
(bfd_mach_o_read_command): Ditto.
binutils/
* od-macho.c (dump_load_command): Handle lazy load dylib.
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function.
2014-03-13 Meador Inge <meadori@codesourcery.com>
* configure.in: Add strnlen to AC_CHECK_DECLS.
* config.in: Regenerate.
* configure: Regenerate.
* sysdep.h (strnlen): Add prototype.
* dwarf.c (strnlen): Move prototype ...
* sysdep.h (strnlen): ... to here.
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bfd/
* elf32-ppc.c (ppc_elf_relocate_section): Correct overflow
handling for VLE_SDA21 relocs.
ld/testsuite/
* ld-powerpc/vle.ld: Place .PPC.EMB.sdata0 within 32k of 0.
* ld-powerpc/vle-reloc-3.d: Update.
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bfd/
* peicode.h (pe_ILF_object_p): Adjust, as the version number
has been read.
(pe_bfd_object_p): Also read version number to detect ILF.
* pe-x86_64.c (COFF_WITH_PE_BIGOBJ): Define.
(x86_64pe_bigobj_vec): Define
* coffcode.h (bfd_coff_backend_data): Add _bfd_coff_max_nscns field.
(bfd_coff_max_nscns): New macro.
(coff_compute_section_file_positions): Use unsigned int for
target_index. Compare with bfd_coff_max_nscns.
(bfd_coff_std_swap_table, ticoff0_swap_table, ticoff1_swap_table):
Set a value for _bfd_coff_max_nscns.
(header_bigobj_classid): New constant.
(coff_bigobj_swap_filehdr_in, coff_bigobj_swap_filehdr_out)
(coff_bigobj_swap_sym_in, coff_bigobj_swap_sym_out)
(coff_bigobj_swap_aux_in, coff_bigobj_swap_aux_out): New
functions.
(bigobj_swap_table): New table.
* libcoff.h: Regenerate.
* coff-sh.c (bfd_coff_small_swap_table): Likewise.
* coff-alpha.c (alpha_ecoff_backend_data): Add value for
_bfd_coff_max_nscns.
* coff-mips.c (mips_ecoff_backend_data): Likewise.
* coff-rs6000.c (bfd_xcoff_backend_data)
(bfd_pmac_xcoff_backend_data): Likewise.
* coff64-rs6000.c (bfd_xcoff_backend_data)
(bfd_xcoff_aix5_backend_data): Likewise.
* targets.c (x86_64pe_bigobj_vec): Declare.
* configure.in (x86_64pe_bigobj_vec): New vector.
* configure: Regenerate.
* config.bfd: Add bigobj object format for Windows targets.
gas/
* config/tc-i386.c (use_big_obj): Declare.
(OPTION_MBIG_OBJ): Define.
(md_longopts): Add -mbig-obj option.
(md_parse_option): Handle it.
(md_show_usage): Display help for this option.
(i386_target_format): Use bigobj for x86-64 if -mbig-obj.
* doc/c-i386.texi: Document the option.
gas/testsuite/
* gas/pe/big-obj.d, gas/pe/big-obj.s: Add test.
* gas/pe/pe.exp: Add test.
include/coff/
* pe.h (struct external_ANON_OBJECT_HEADER_BIGOBJ): Declare.
(FILHSZ_BIGOBJ): Define.
(struct external_SYMBOL_EX): Declare.
(SYMENT_BIGOBJ, SYMESZ_BIGOBJ): Define.
(union external_AUX_SYMBOL_EX): Declare.
(AUXENT_BIGOBJ, AUXESZ_BIGOBJ): Define.
* internal.h (struct internal_filehdr): Change type
of f_nscns.
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an ARM ELF binary into an AARCH64 ELF executable.
PR ld/16671
* elf32-arm.c (elf32_arm_add_symbol_hook): Check for ARM format
before testing for vxworks.
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Regenerate Makefile.in in bfd, binutils, gas, gold, gprof, ld, opcodes.
Regenerate gas/config.in.
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copy_elf_program_header has logic to reject non-alloc sections when
calculating p_vaddr offset for padding, but blithely assumed the
first section in a segment was allocated.
PR 16690
* elf.c (copy_elf_program_header): Ignore first section lma if
non-alloc.
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coffcode.h uses an intptr_t cast inside an #ifdef RS6000COFF_C, so
ensure that intptr_t is defined. We don't see this when
cross-compiling from linux due to intptr_t being provided by
unistd.h.
PR 16686
* coff-rs6000.c: Include stdint.h.
* coff64-rs6000.c: Likewise.
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2013-12-03 Tristan Gingold <gingold@adacore.com>
* ticoff.h: Remove.
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Similar to the powerpc64 patch, this improves overflow checking in
elf32-ppc.c. Many reloc "howto" entries needed fixes, some just
cosmetic.
The patch also fixes the R_PPC_VLE_SDA21 reloc application code, which
was horribly broken. In fact, it may still be broken since Power ISA
2.07 says e_li behaves as
RT <- EXTS(li20 1:4 || li20 5:8 || li20 0 || li20 9:19)
where li20 is a field taken from bits 17..20, 11..15, 21..31 of the
instruction. Freescale VLEPEM says differently, and I assume
correctly, that
RT <- EXTS(li20 0:3 || li20 4:8 || li20 9:19)
The VLE_SDA21 relocation description matches this too.
Now the VLE_SDA21 relocation specifies in the case where e_addi16 is
converted to e_li for symbols in .PPC.EMB.sdata0 or .PPC.EMB.sbss0
(no base register), that the field is restricted to 16 bits, with the
sign bit being propagated to the top 4 bits. I don't see the sense in
restricting the value like this, so have allowed the full 20 bit
signed value. This of course is compatible with the reloc description
in that values in the 16 bit signed range will result in exactly the
same insn field as when the reloc description is followed to the
letter.
* elf32-ppc.c (ppc_elf_howto_raw): Correct overflow check for
many relocations. Correct bitsize and rightshift too for a number
of VLE relocs. Describe R_PPC_VLE_SDA21 and R_PPC_VLE_SDA21_LO.
Correct dst_mask on R_PPC_VLE_SDA21_LO.
(ppc_elf_vle_split16): Tidy, delete unnecessary prototype.
(ppc_elf_relocate_section): Modify overflow test for 16-bit
fields in instructions to signed/unsigned according to whether
the field takes a signed or unsigned value. Tidy vle split16 code.
Correct R_PPC_VLE_SDA21 and R_PPC_VLE_SDA21_LO handling.
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