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2016-05-28Return void from linker callbacksAlan Modra1-15/+11
The ldmain.c implementation of these linker callback functions always return true, so any code handling a false return is dead. What's more, some of the bfd backends abort if ever a false return is seen, and there seems to be some confusion in gdb's compile-object-load.c. The return value was never meant to be "oh yes, a multiple_definition error occurred", but rather "out of memory or other catastrophic failure". This patch removes the status return on the callbacks that always return true. I kept the return status for "notice" because that one does happen to need to return "out of memory". include/ * bfdlink.h (struct bfd_link_callbacks): Update comments. Return void from multiple_definition, multiple_common, add_to_set, constructor, warning, undefined_symbol, reloc_overflow, reloc_dangerous and unattached_reloc. bfd/ * aoutx.h: Adjust linker callback calls throughout file, removing dead code. * bout.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-h8300.c: Likewise. * coff-h8500.c: Likewise. * coff-i960.c: Likewise. * coff-mcore.c: Likewise. * coff-mips.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic80.c: Likewise. * coff-w65.c: Likewise. * coff-z80.c: Likewise. * coff-z8k.c: Likewise. * coff64-rs6000.c: Likewise. * cofflink.c: Likewise. * ecoff.c: Likewise. * elf-bfd.h: Likewise. * elf-m10200.c: Likewise. * elf-m10300.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-ft32.c: Likewise. * elf32-h8300.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i860.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-ppc.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xstormy16.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-x86-64.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * linker.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * reloc.c: Likewise. * reloc16.c: Likewise. * simple.c: Likewise. * vms-alpha.c: Likewise. * xcofflink.c: Likewise. * elf32-rl78.c (get_symbol_value, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. * elf32-rx.c: (get_symbol_value, get_gp, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. ld/ * ldmain.c (multiple_definition, multiple_common, add_to_set, constructor_callback, warning_callback, undefined_symbol, reloc_overflow, reloc_dangerous, unattached_reloc): Return void. * emultempl/elf32.em: Adjust callback calls. gdb/ * compile/compile-object-load.c (link_callbacks_multiple_definition, link_callbacks_warning, link_callbacks_undefined_symbol, link_callbacks_undefined_symbol, link_callbacks_reloc_overflow, link_callbacks_reloc_dangerous, link_callbacks_unattached_reloc): Return void.
2016-05-23Enable R_AARCH64_NONE for 64-bit code.Jim Wilson1-0/+4
* elfnn-aarch64.c: Unconditionally enable R_AARCH64_NULL and R_AARCH64_NONE. Use HOWTO64 for R_AARCH64_NULL. * relocs.c: Add BFD_RELOC_AARCH64_NULL. * bfd-in2.h: Regenerate. * libbfd.h: Likewise.
2016-04-14arc/nps400 : New cmem instructions and associated relocationAndrew Burgess1-0/+2
Add support for arc/nps400 cmem instructions, these load and store instructions are hard-wired to access "0x57f00000 + 16-bit-offset". Supporting this relocation required some additions to the arc relocation handling in the bfd library, as well as the standard changes required to add a new relocation type. There's a test of the new instructions in the assembler, and a test of the relocation in the linker. bfd/ChangeLog: * reloc.c: Add BFD_RELOC_ARC_NPS_CMEM16 entry. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elf32-arc.c: Add 'opcode/arc.h' include. (struct arc_relocation_data): Add symbol_name. (arc_special_overflow_checks): New function. (arc_do_relocation): Use arc_special_overflow_checks, reindent as required, add an extra comment. (elf_arc_relocate_section): Setup symbol_name in reloc_data. gas/ChangeLog: * testsuite/gas/arc/nps400-3.d: New file. * testsuite/gas/arc/nps400-3.s: New file. include/ChangeLog: * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc. * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define. ld/ChangeLog: * testsuite/ld-arc/arc.exp: New file. * testsuite/ld-arc/nps-1.s: New file. * testsuite/ld-arc/nps-1a.d: New file. * testsuite/ld-arc/nps-1b.d: New file. * testsuite/ld-arc/nps-1b.err: New file. opcodes/ChangeLog: * arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst instructions. * arc-opc.c (insert_nps_cmem_uimm16): New function. (extract_nps_cmem_uimm16): New function. (arc_operands): Add NPS_XLDST_UIMM16 operand.
2016-03-11Fix some places where octet to byte conversions are needed.Dan Gissel1-1/+2
PR 19713 * elf.c (_bfd_elf_section_offset): Ensure that the returned offset uses bytes not octets. * elflink.c (resolve_section): Likewise. Add a bfd parameter. (eval_section): Pass the input_bfd to resolve_section. (bfd_elf_perform_complex_relocation): Convert byte offset to octets before read and writing values. (elf_link_input_bfd): Add byte to octet conversions. (elf_reloc_link_order): Likewise. (elf_fixup_link_order): Likewise. (bfd_elf_final_link): Likewise. * reloc.c (_bfd_final_link_relocate): Likewise. * syms.c (_bfd_stab_section_find_nearest_line): Likewise.
2016-02-19Fix a seg-fault in the linker when it encounters a corrupt binary containing ↵Nick Clifton1-0/+11
a reloc with no associated symbol. PR ld/19628 * reloc.c (bfd_generic_get_relocated_section_contents): Stop processing if we encounter a reloc without an associated symbol.
2016-01-01Copyright update for binutilsAlan Modra1-1/+1
2015-12-16[ARM] Add support for thumb1 pcrop relocations.Mickael Guene1-0/+11
To support thumb1 execute-only code we need to support four new relocations (R_ARM_THM_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G2_NC and R_ARM_THM_ALU_ABS_G3_NC). These relocations allow the static linker to finalize construction of symbol address. Typical sequence of code to get address of the symbol foo is then the following : movs r3, #:upper8_15:#foo lsls r3, #8 adds r3, #:upper0_7:#foo lsls r3, #8 adds r3, #:lower8_15:#foo lsls r3, #8 adds r3, #:lower0_7:#foo This will give following sequence of text and relocations after assembly : 4: 2300 movs r3, #0 4: R_ARM_THM_ALU_ABS_G3_NC foo 6: 021b lsls r3, r3, #8 8: 3300 adds r3, #0 8: R_ARM_THM_ALU_ABS_G2_NC foo a: 021b lsls r3, r3, #8 c: 3300 adds r3, #0 c: R_ARM_THM_ALU_ABS_G1_NC foo e: 021b lsls r3, r3, #8 10: 3300 adds r3, #0 10: R_ARM_THM_ALU_ABS_G0_NC foo
2015-12-07R_PPC64_ENTRYAlan Modra1-0/+2
Add a new relocation that marks large-model entry code, for edit back to medium-model. include/elf/ * ppc64.h (R_PPC64_ENTRY): Define. bfd/ * reloc.c (BFD_RELOC_PPC64_ENTRY): New. * elf64-ppc.c (reloc_howto_type ppc64_elf_howto_raw): Add entry for R_PPC64_ENTRY. (LD_R2_0R12, ADD_R2_R2_R12, LIS_R2, ADDIS_R2_R12): Define. (ppc64_elf_reloc_type_lookup): Handle R_PPC64_ENTRY. (ppc64_elf_relocate_section): Edit code at R_PPC64_ENTTY. Use new insn defines. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate.
2015-11-20binutils: add support for arm-*-darwin and aarch64-*-darwin.Tristan Gingold1-8/+26
Currently only in bfd and binutils. ChangeLog/ * configure.ac: Add aarch64-*-darwin* and arm-*-darwin*. * configure: Regenerate. bfd/ChangeLog/ * targets.c (aarch64_mach_o_vec, arm_mach_o_vec): Declare. (_bfd_target_vector): Add new vectors. * reloc.c (BFD_RELOC_MACH_O_SUBTRACTOR32) (BFD_RELOC_MACH_O_SUBTRACTOR64, BFD_RELOC_MACH_O_ARM64_ADDEND) (BFD_RELOC_MACH_O_ARM64_GOT_LOAD_PAGE21) (BFD_RELOC_MACH_O_ARM64_GOT_LOAD_PAGEOFF12) (BFD_RELOC_MACH_O_ARM64_POINTER_TO_GOT): New relocations. (BFD_RELOC_MACH_O_X86_64_SUBTRACTOR32) (BFD_RELOC_MACH_O_X86_64_SUBTRACTOR64): Remove. * mach-o-x86-64.c (bfd_mach_o_x86_64_swap_reloc_out): Change name of subtractor relocations. * config.bfd: Handle aarch64-*-darwin*, arm-*-darwin*. * Makefile.am (BFD32_BACKENDS): Add mach-o-arm.lo. (BFD32_BACKENDS_CFILES): Add mach-o-arm.c. (BFD64_BACKENDS): Add mach-o-aarch64.lo. (BFD64_BACKENDS_CFILES): Add mach-o-aarch64.c. * configure.ac: Handle aarch64_mach_o_vec and arm_mach_o_vec. * mach-o-aarch64.c: New file. * mach-o-arm.c: New file. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate.
2015-11-11Add assembler, disassembler and linker support for power9.Peter Bergner1-0/+2
include/opcode/ * ppc.h (PPC_OPCODE_POWER9): New define. (PPC_OPCODE_VSX3): Likewise. opcodes/ * ppc-dis.c (ppc_opts): Add "power9" and "pwr9" entries. Add PPC_OPCODE_VSX3 to the vsx entry. (powerpc_init_dialect): Set default dialect to power9. * ppc-opc.c (insert_dcmxs, extract_dcmxs, insert_dxd, extract_dxd, insert_dxdn, extract_dxdn, insert_l0, extract_l0, insert_l1, extract_l1 insert_xtq6, extract_xtq6): New static functions. (insert_esync): Test for illegal L operand value. (DCMX, DCMXS, DXD, NDXD, L0, L1, RC, FC, UIM6, X_R, RIC, PRS, XSQ6, XTQ6, LRAND, IMM8, DQX, DQX_MASK, DX, DX_MASK, VXVAPS_MASK, VXVA,XVA, XX2VA, XVARC, XBF_MASK, XX2UIM4_MASK, XX2BFD_MASK, XX2DCMXS_MASK, XVA_MASK, XRLA_MASK, XBFRARB_MASK, XLRAND_MASK, POWER9, PPCVEC3, PPCVSX3): New defines. (powerpc_opcodes) <ps_cmpu0, ps_cmpo0, ps_cmpu1, ps_cmpo1, fcmpu, fcmpo, ftdiv, ftsqrt>: Use XBF_MASK. <mcrxr>: Use XBFRARB_MASK. <addpcis, bcdcfn., bcdcfsq., bcdcfz., bcdcpsgn., bcdctn., bcdctsq., bcdctz., bcds., bcdsetsgn., bcdsr., bcdtrunc., bcdus., bcdutrunc., cmpeqb, cmprb, cnttzd, cnttzd., cnttzw, cnttzw., copy, copy_first, cp_abort, darn, dtstsfi, dtstsfiq, extswsli, extswsli., ldat, ldmx, lwat, lxsd, lxsibzx, lxsihzx, lxssp, lxv, lxvb16x, lxvh8x, lxvl, lxvll, lxvwsx, lxvx, maddhd, maddhdu, maddld, mcrxrx, mfvsrld, modsd, modsw, modud, moduw, msgsync, mtvsrdd, mtvsrws, paste, paste., paste_last, rmieg, setb, slbieg, slbsync, stdat, stop, stwat, stxsd, stxsibx, stxsihx, stxssp, stxv, stxvb16x, stxvh8x, stxvl, stxvll, stxvx, subpcis, urfid, vbpermd, vclzlsbb, vcmpneb, vcmpneb., vcmpneh, vcmpneh., vcmpnew, vcmpnew., vcmpnezb, vcmpnezb., vcmpnezh, vcmpnezh., vcmpnezw, vcmpnezw., vctzb, vctzd, vctzh, vctzlsbb, vctzw, vextractd, vextractub, vextractuh, vextractuw, vextsb2d, vextsb2w, vextsh2d, vextsh2w, vextsw2d, vextublx, vextubrx, vextuhlx, vextuhrx, vextuwlx, vextuwrx, vinsertb, vinsertd, vinserth, vinsertw, vmul10cuq, vmul10ecuq, vmul10euq, vmul10uq, vnegd, vnegw, vpermr, vprtybd, vprtybq, vprtybw, vrldmi, vrldnm, vrlwmi, vrlwnm, vslv, vsrv, wait, xsabsqp, xsaddqp, xsaddqpo, xscmpeqdp, xscmpexpdp, xscmpexpqp, xscmpgedp, xscmpgtdp, xscmpnedp, xscmpoqp, xscmpuqp, xscpsgnqp, xscvdphp, xscvdpqp, xscvhpdp, xscvqpdp, xscvqpdpo, xscvqpsdz, xscvqpswz, xscvqpudz, xscvqpuwz, xscvsdqp, xscvudqp, xsdivqp, xsdivqpo, xsiexpdp, xsiexpqp, xsmaddqp, xsmaddqpo, xsmaxcdp, xsmaxjdp, xsmincdp, xsminjdp, xsmsubqp, xsmsubqpo, xsmulqp, xsmulqpo, xsnabsqp, xsnegqp, xsnmaddqp, xsnmaddqpo, xsnmsubqp, xsnmsubqpo, xsrqpi, xsrqpix, xsrqpxp, xssqrtqp, xssqrtqpo, xssubqp, xssubqpo, xststdcdp, xststdcqp, xststdcsp, xsxexpdp, xsxexpqp, xsxsigdp, xsxsigqp, xvcmpnedp, xvcmpnedp., xvcmpnesp, xvcmpnesp., xvcvhpsp, xvcvsphp, xviexpdp, xviexpsp, xvtstdcdp, xvtstdcsp, xvxexpdp, xvxexpsp, xvxsigdp, xvxsigsp, xxbrd, xxbrh, xxbrq, xxbrw, xxextractuw, xxinsertw, xxperm, xxpermr, xxspltib>: New instructions. <doze, nap, sleep, rvwinkle, waitasec, lxvx, stxvx>: Disable on POWER9. <tlbiel, tlbie, sync, slbmfev, slbmfee>: Add additional operands. include/elf/ * ppc.h (R_PPC_REL16DX_HA): New reloction. * ppc64.h (R_PPC64_REL16DX_HA): Likewise. bfd/ * elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_REL16DX_HA. (ppc_elf_reloc_type_lookup): Handle R_PPC_REL16DX_HA. (ppc_elf_addr16_ha_reloc): Likewise. (ppc_elf_check_relocs): Likewise. (ppc_elf_relocate_section): Likewise. (is_insn_dq_form): Handle lxv and stxv instructions. * elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_REL16DX_HA. (ppc64_elf_reloc_type_lookup): Handle R_PPC64_REL16DX_HA. (ppc64_elf_ha_reloc): Likewise. (ppc64_elf_check_relocs): Likewise. (ppc64_elf_relocate_section): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Likewise. * reloc.c (BFD_RELOC_PPC_REL16DX_HA): New. elfcpp/ * powerpc.h (R_POWERPC_REL16DX_HA): Define. gas/ * doc/as.texinfo (Target PowerPC): Document -mpower9 and -mpwr9. * doc/c-ppc.texi (PowerPC-Opts): Likewise. * config/tc-ppc.c (md_show_usage): Likewise. (md_assemble): Handle BFD_RELOC_PPC_REL16DX_HA. (md_apply_fix): Likewise. (ppc_handle_align): Handle power9's group ending nop. gas/testsuite/ * gas/ppc/altivec3.s: New test. * gas/ppc/altivec3.d: Likewise. * gas/ppc/vsx3.s: Likewise. * gas/ppc/vsx3.d: Likewise. * gas/ppc/power9.s: Likewise. * gas/ppc/power9.d: Likewise. * gas/ppc/ppc.exp: Run them. * gas/ppc/power8.s <lxvx, lxvd2x, stxvx, stxvd2x>: Add new tests. * gas/ppc/power8.d: Likewise. * gas/ppc/vsx.s: <lxvx, stxvx>: Rename invalid mnemonics ... <lxvd2x, stxvd2x>: ...to this. * gas/ppc/vsx.d: Likewise. gold/ * gold/powerpc.cc (Powerpc_relocate_functions::addr16_dq): New function. (Powerpc_relocate_functions::addr16dx_ha): Likewise. (Target_powerpc::Scan::local): Handle R_POWERPC_REL16DX_HA. (Target_powerpc::Scan::global): Likewise. (Target_powerpc::Relocate::relocate): Likewise. ld/testsuite/ * ld-powerpc/addpcis.d: New test. * ld-powerpc/addpcis.s: New test. * ld-powerpc/powerpc.exp: Run it.
2015-10-28Fix errors in the gas testsuite for the ARC target.Cupertino Miranda1-0/+2
bfd * reloc.c (BFD_RELOC_ARC_32_PCREL): New entry. (ARC_TLS_DTPOFF): Arrange it in order. * elf32-arc.c (arc_elf_howto_ini): Update formula. (get_middle_endian_relocation): New function. (PDATA): Define. * bfd-in2.h: Regenerate. * libbfd.h: Likewise. elf * arc-reloc.def (ARC_32_PCREL): New definition. gas * config/tc-arc.c (tokenize_arguments): Avoid creating unused symbols when parsing relocation types. (md_apply_fix): Handle TLS relocations. Fix BFD_RELOC_ARC_32_PCREL relocation. (arc_check_reloc): Emit BFD_RELOC_ARC_32_PCREL relocation.
2015-10-22Add R_X86_64_[REX_]GOTPCRELX support to gas and ldH.J. Lu1-0/+4
This patch adds support for the R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX relocations proposed in https://groups.google.com/forum/#!topic/x86-64-abi/n9AWHogmVY0 to gas and ld. It updates gas to generate R_X86_64_GOTPCRELX, R_X86_64_REX_GOTPCRELX if there is a REX prefix, relocation for memory operand, foo@GOTPCREL(%rip). With the locally defined symbol, foo, we convert mov foo@GOTPCREL(%rip), %reg to lea foo(%rip), %reg and convert call/jmp *foo@GOTPCREL(%rip) to nop call foo/jmp foo nop When PIC is false, convert test %reg, foo@GOTPCREL(%rip) to test $foo, %reg and convert binop foo@GOTPCREL(%rip), %reg to binop $foo, %reg where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions. bfd/ * elf64-x86-64.c: Include opcode/i386.h. (x86_64_elf_howto_table): Add R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX. (R_X86_64_standard): Replace R_X86_64_PLT32_BND with R_X86_64_REX_GOTPCRELX. (x86_64_reloc_map): Add BFD_RELOC_X86_64_GOTPCRELX and BFD_RELOC_X86_64_REX_GOTPCRELX. (need_convert_mov_to_lea): Renamed to ... (need_convert_load): This. (elf_x86_64_check_relocs): Handle R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX. Replace need_convert_mov_to_lea with need_convert_load. (elf_x86_64_gc_sweep_hook): Handle R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX. (elf_x86_64_size_dynamic_sections): Likewise. (elf_x86_64_relocate_section): Likewise. (elf_x86_64_convert_mov_to_lea): Renamed to ... (elf_x86_64_convert_load): This. Replace need_convert_mov_to_lea with need_convert_load. Support R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX transformations. * reloc.c (BFD_RELOC_X86_64_GOTPCRELX): New. (BFD_RELOC_X86_64_REX_GOTPCRELX): Likewise. * bfd-in2.h: Regenerated. * libbfd.h: Likewise. gas/ * config/tc-i386.c (tc_i386_fix_adjustable): Handle BFD_RELOC_X86_64_GOTPCRELX and BFD_RELOC_X86_64_REX_GOTPCRELX. (tc_gen_reloc): Likewise. (i386_validate_fix): Generate BFD_RELOC_X86_64_GOTPCRELX or BFD_RELOC_X86_64_REX_GOTPCRELX if fx_tcbit2 is set. * config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Also return true for BFD_RELOC_X86_64_GOTPCRELX and BFD_RELOC_X86_64_REX_GOTPCRELX. gas/testsuite/ * gas/i386/i386.exp: Run x86-64-gotpcrel. * gas/i386/x86-64-gotpcrel.d: New file. * gas/i386/x86-64-gotpcrel.s: Likewise. * gas/i386/ilp32/x86-64-gotpcrel.d: Likewise. * gas/i386/x86-64-localpic.d: Replace R_X86_64_GOTPCREL with R_X86_64_REX_GOTPCRELX. * gas/i386/ilp32/x86-64-localpic.d: Likewise. include/elf/ * x86-64.h (R_X86_64_GOTPCRELX): New. (R_X86_64_REX_GOTPCRELX): Likewise. ld/testsuite/ * ld-ifunc/ifunc-5r-local-x86-64.d: Replace R_X86_64_GOTPCREL with R_X86_64_REX_GOTPCRELX. * ld-x86-64/plt-main1.rd: Likewise. * ld-x86-64/plt-main3.rd: Likewise. * ld-x86-64/plt-main4.rd: Likewise. * ld-x86-64/gotpcrel1.dd: New file. * ld-x86-64/gotpcrel1.out: Likewise. * ld-x86-64/gotpcrel1a.S: Likewise. * ld-x86-64/gotpcrel1b.c: Likewise. * ld-x86-64/gotpcrel1c.c: Likewise. * ld-x86-64/gotpcrel1d.S: Likewise. * ld-x86-64/load1.s: Likewise. * ld-x86-64/load1a.d: Likewise. * ld-x86-64/load1b.d: Likewise. * ld-x86-64/load1c.d: Likewise. * ld-x86-64/load1d.d: Likewise. * ld-x86-64/x86-64.exp: Run load1a, load1b, load1c and load1d tests. Run gotpcrel1 test.
2015-10-22Add R_386_GOT32X support to gas and ldH.J. Lu1-0/+2
This patch adds support for the R_386_GOT32X relocation proposed in https://groups.google.com/forum/#!topic/ia32-abi/GbJJskkid4I to gas and ld. It updates gas to generate R_386_GOT32X relocation for memory operand, foo@GOT[(%reg)]. We must encode "mov foo@GOT, %eax" with the 0x8b opcode, instead of the 0xb8 opcode, so that it can be transformed to "lea foo, %eax". With the locally defined symbol, foo, we convert mov foo@GOT[(%reg1)], %reg2 to lea foo[@GOTOFF(%reg1)], %reg2 and convert call/jmp *foo@GOT[(%reg)] to nop call foo/jmp foo nop When PIC is false, convert test %reg1, foo@GOT[(%reg2)] to test $foo, %reg1 and convert binop foo@GOT[(%reg1)], %reg2 to binop $foo, %reg2 where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions. bfd/ * elf32-i386.c: Include opcode/i386.h. (elf_howto_table): Add R_386_GOT32X. (R_386_ext2): Replace R_386_IRELATIVE with R_386_GOT32X. (elf_i386_reloc_type_lookup): Handle BFD_RELOC_386_GOT32X. (need_convert_mov_to_lea): Renamed to ... (need_convert_load): This. (elf_i386_check_relocs): Handle R_386_GOT32X. Replace need_convert_mov_to_lea with need_convert_load. (elf_i386_gc_sweep_hook): Handle R_386_GOT32X. (elf_i386_size_dynamic_sections): Likewise. (elf_i386_relocate_section): Likewise. (elf_i386_convert_mov_to_lea): Renamed to ... (elf_i386_convert_load): This. Replace need_convert_mov_to_lea with need_convert_load. Support R_386_GOT32X transformations. * reloc.c (BFD_RELOC_386_GOT32X): New. * bfd-in2.h: Regenerated. * libbfd.h: Likewise. gas/ * config/tc-i386.c (tc_i386_fix_adjustable): Handle BFD_RELOC_386_GOT32X. (tc_gen_reloc): Likewise. (match_template): Force 0x8b encoding for "mov foo@GOT, %eax". (output_disp): Check for "call/jmp *mem", "mov mem, %reg", "test %reg, mem" and "binop mem, %reg" where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions. Set fx_tcbit if the REX prefix is generated. Set fx_tcbit2 if BFD_RELOC_386_GOT32X should be generated. (i386_validate_fix): Generate BFD_RELOC_386_GOT32X if fx_tcbit2 is set. gas/testsuite/ * gas/i386/got.d: New file. * gas/i386/got.s: Likewise. * gas/i386/i386.exp: Run got. * gas/i386/localpic.d: Replace R_386_GOT32 with R_386_GOT32X. * gas/i386/mixed-mode-reloc32.d: Likewise. * gas/i386/reloc32.d: Likewise. include/elf/ * i386.h (R_386_GOT32X): New relocation. ld/testsuite/ * ld-i386/branch1.d: New file. * ld-i386/branch1.s: Likewise. * ld-i386/call1.d: Likewise. * ld-i386/call1.s: Likewise. * ld-i386/call2.d: Likewise. * ld-i386/call2.s: Likewise. * ld-i386/got1.dd: Likewise. * ld-i386/got1.out: Likewise. * ld-i386/got1a.S: Likewise. * ld-i386/got1b.c: Likewise. * ld-i386/got1c.c: Likewise. * ld-i386/got1d.S: Likewise. * ld-i386/jmp1.d: Likewise. * ld-i386/jmp1.s: Likewise. * ld-i386/jmp2.d: Likewise. * ld-i386/jmp2.s: Likewise. * ld-i386/load1.d: Likewise. * ld-i386/load1.s: Likewise. * ld-i386/load2.d: Likewise. * ld-i386/load2.s: Likewise. * ld-i386/load3.d: Likewise. * ld-i386/load3.s: Likewise. * ld-i386/load4.s: Likewise. * ld-i386/load4a.d: Likewise. * ld-i386/load4b.d: Likewise. * ld-i386/load5.s: Likewise. * ld-i386/load5a.d: Likewise. * ld-i386/load5b.d: Likewise. * ld-i386/load6.d: Likewise. * ld-i386/load6.s: Likewise. * ld-i386/i386.exp: Run branch1, call1, call2, jmp1, jmp2, load1, load2, load3, load4a, load4b, load5a, load5b and load6 tests. Run got1 test.
2015-10-07New ARC implementation.Nick Clifton1-11/+130
bfd * archures.c: Remove support for older ARC. Added support for new ARC cpus (ARC600, ARC601, ARC700, ARCV2). * bfd-in2.h: Likewise. * config.bfd: Likewise. * cpu-arc.c: Likewise. * elf32-arc.c: Totally changed file with a refactored inplementation of the ARC port. * libbfd.h: Added ARC specific relocation types. * reloc.c: Likewise. gas * config/tc-arc.c: Revamped file for ARC support. * config/tc-arc.h: Likewise. * doc/as.texinfo: Add new ARC options. * doc/c-arc.texi: Likewise. ld * configure.tgt: Added target arc-*-elf* and arc*-*-linux-uclibc*. * emulparams/arcebelf_prof.sh: New file * emulparams/arcebelf.sh: Likewise. * emulparams/arceblinux_prof.sh: Likewise. * emulparams/arceblinux.sh: Likewise. * emulparams/arcelf_prof.sh: Likewise. * emulparams/arcelf.sh: Likewise. * emulparams/arclinux_prof.sh: Likewise. * emulparams/arclinux.sh: Likewise. * emulparams/arcv2elfx.sh: Likewise. * emulparams/arcv2elf.sh: Likewise. * emultempl/arclinux.em: Likewise. * scripttempl/arclinux.sc: Likewise. * scripttempl/elfarc.sc: Likewise. * scripttempl/elfarcv2.sc: Likewise * Makefile.am: Add new ARC emulations. * Makefile.in: Regenerate. * NEWS: Mention the new feature. opcodes * arc-dis.c: Revamped file for ARC support * arc-dis.h: Likewise. * arc-ext.c: Likewise. * arc-ext.h: Likewise. * arc-opc.c: Likewise. * arc-fxi.h: New file. * arc-regs.h: Likewise. * arc-tbl.h: Likewise. binutils * readelf.c (get_machine_name): Remove A5 reference. Add ARCompact and ARCv2. (get_machine_flags): Handle EM_ARCV2 and EM_ARCOMPACT. (guess_is_rela): Likewise. (dump_relocations): Likewise. (is_32bit_abs_reloc): Likewise. (is_16bit_abs_reloc): Likewise. (is_none_reloc): Likewise. * NEWS: Mention the new feature. include * dis-asm.h (arc_get_disassembler): Correct declaration. * arc-reloc.def: Macro file with definition of all relocation types. * arc.h: Changed macros for the newly supported ARC cpus. Altered enum defining the supported relocations. * common.h: Changed EM_ARC_A5 definition to EM_ARC_COMPACT. Added macro for EM_ARC_COMPACT2. * arc-func.h: New file. * arc.h: Likewise.
2015-10-02[Binutils][AARCH64]Add TLS IE large memory support.Renlin Li1-6/+6
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * reloc.c: Make AARCH64_TLSIE_MOVW_GOTTPREL_G1 and AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC defined in alphabetical order. * libbfd.h: Regenerate. * bfd-in2.h: Likewise. * elfnn-aarch64.c (elfNN_aarch64_howto_table): Make TLSIE_MOVW_GOTTPREL_G1 check overflow. (aarch64_reloc_got_type): Add support for TLSIE_MOVW_GOTTPREL_G1 and TLSIE_MOVW_GOTTPREL_G0_NC. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. gas/ 2015-10-02 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (reloc_table): Add two entries for gottprel_g0_nc and gottprel_g1. (process_movw_reloc_info): Add support. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. gas/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * gas/aarch64/reloc-gottprel_g0_nc.d: New. * gas/aarch64/reloc-gottprel_g0_nc.s: New. * gas/aarch64/reloc-gottprel_g1.d: New. * gas/aarch64/reloc-gottprel_g1.s: New. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/tls-large-ie.d: New. * ld-aarch64/tls-large-ie.s: New. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02[GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support.Renlin Li1-0/+4
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * reloc.c (BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC): New entry. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC. * libbfd.h: Regenerate. * bfd-in2.h: Likewise gas/ 2015-10-02 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (reloc_table): New relocation modifier tlsgd_g0_nc. (process_movw_reloc_info): Support BFD_RELOC_AARCH64_TLSGD_MOVW_G1. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. gas/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * gas/aarch64/reloc-tlsgd_g0_nc.d: New. * gas/aarch64/reloc-tlsgd_g0_nc.s: New.
2015-10-02[GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support.Renlin Li1-0/+4
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * reloc.c (BFD_RELOC_AARCH64_TLSGD_MOVW_G1): New entry. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_TLSGD_MOVW_G1. * bfd-in2.h: Regenerate. * libbfd.h: Likewise. gas/ 2015-10-02 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (reloc_table): New relocation modifier tlsgd_g1. (process_movw_reloc_info): Support BFD_RELOC_AARCH64_TLSGD_MOVW_G1. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. gas/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * gas/aarch64/reloc-tlsgd_g1.s: New. * gas/aarch64/reloc-tlsgd_g1.s: New.
2015-10-02[GAS][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC Support.Renlin Li1-0/+5
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * reloc.c (BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC): New. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry MOVW_GOTOFF_G0_NC. * libbfd.h: Regnerate. * bfd-in2.h: Regenerate. gas/ 2015-10-02 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (reloc_table): New relocation modifier gotoff_g0_nc. (process_movw_reloc_info): Support gotoff_g0_nc. (md_apply_fix): Likewise. gas/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * gas/aarch64/reloc-gotoff_g0_nc.s: New. * gas/aarch64/reloc-gotoff_g0_nc.d: New.
2015-10-02[GAS][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 Support.Renlin Li1-0/+5
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * reloc.c (BFD_RELOC_AARCH64_MOVW_GOTOFF_G1): New. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for MOVW_GOTOFF_G1. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. gas/ 2015-10-02 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (reloc_table): New relocation modifier gotoff_g1. (process_movw_reloc_info): Support newly added modifier. (md_apply_fix): Likewise. gas/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * gas/aarch64/reloc-gotoff_g1.s: New. * gas/aarch64/reloc-gotoff_g1.d: New.
2015-08-25[AArch64] Fix a typo in the comment for BFD_RELOC_AARCH64_LD64_GOT_LO12_NCRenlin Li1-1/+1
2015-08-25 Renlin Li <renlin.li@arm.com> bfd/ * reloc.c (BFD_RELOC_AARCH64_LD64_GOTOFF_LO15): Use LP64 instead of ILP64. * bfd-in2.h: Regenerate.
2015-08-19[AArch64][5/6] GAS support TLSLD load/store relocation typesJiong Wang1-1/+46
2015-08-19 Jiong Wang <jiong.wang@arm.com> bfd/ * reloc.c: New entries, including BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC. BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC. * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/ * config/tc-aarch64.c (reloc_table): New relocation types support for dtprel_lo12. (ldst_lo12_determine_real_reloc_type): Support BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC. (parse_operands): Likewise. (md_apply_fix): Likewise (aarch64_force_relocation): Likewise. (process_movw_reloc_info): Likewise. gas/testsuite/ * gas/aarch64/reloc-dtprel_lo12-ldst8.s: New testcase. * gas/aarch64/reloc-dtprel_lo12_nc-ldstc.s: Likewise. * gas/aarch64/reloc-dtprel_lo12-ldst16.s: Likewise. * gas/aarch64/reloc-dtprel_lo12_nc-ldst16.s: Likewise. * gas/aarch64/reloc-dtprel_lo12-ldst32.s: Likewise. * gas/aarch64/reloc-dtprel_lo12_nc-ldst32.s: Likewise. * gas/aarch64/reloc-dtprel_lo12-ldst64.s: Likewise. * gas/aarch64/reloc-dtprel_lo12_nc-ldst64.s: Likewise. * gas/aarch64/reloc-dtprel_lo12-ldst8.d: New expectation file. * gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d: Likewise. * gas/aarch64/reloc-dtprel_lo12-ldst16.d: Likewise. * gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d: Likewise. * gas/aarch64/reloc-dtprel_lo12-ldst32.d: Likewise. * gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d: Likewise. * gas/aarch64/reloc-dtprel-lo12-ldst64.d: Likewise. * gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d: Likewise.
2015-08-19[AArch64][3/6] GAS support TLSLD move/add relocation typesJiong Wang1-0/+24
2015-08-19 Jiong Wang <jiong.wang@arm.com> bfd/ * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2): New entries. * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/ * config/tc-aarch64.c (reloc_table): New relocation modifiers, "dtprel_hi12", "dtprel_g0", "dtprel_g0_nc", "dtprel_g1", "dtprel_g1_nc", "dtprel_g2". (md_apply_fix): Support new relocation types. (aarch64_force_relocation): Likewise. (process_movw_reloc_info): Likewise. gas/testsuite/ * gas/aarch64/reloc-dtprel_g0.s: New testcase. * gas/aarch64/reloc-dtprel_g0-ilp32.s: Likewise. * gas/aarch64/reloc-dtprel_g0_nc.s: Likewise. * gas/aarch64/reloc-dtprel_g0_nc-ilp32.s: Likewise. * gas/aarch64/reloc-dtprel_g1.s: Likewise. * gas/aarch64/reloc-dtprel_g1-ilp32.s: Likewise. * gas/aarch64/reloc-dtprel_g1_nc.s: Likewise. * gas/aarch64/reloc-dtprel_g2.s: Likewise. * gas/aarch64/reloc-dtprel_hi12.s: Likewise. * gas/aarch64/reloc-dtprel_hi12-ilp32.s: Likewise. * gas/aarch64/reloc-dtprel_g0.d: New expectation file. * gas/aarch64/reloc-dtprel_g0-ilp32.d: Likewise. * gas/aarch64/reloc-dtprel_g0_nc.d: Likewise. * gas/aarch64/reloc-dtprel_g0_nc-ilp32.d: Likewise. * gas/aarch64/reloc-dtprel_g1.d: Likewise. * gas/aarch64/reloc-dtprel_g1-ilp32.d: Likewise. * gas/aarch64/reloc-dtprel_g1_nc.d: Likewise. * gas/aarch64/reloc-dtprel_g2.d: Likewise. * gas/aarch64/reloc-dtprel_hi12.d: Likewise. * gas/aarch64/reloc-dtprel_hi12-ilp32.d: Likewise.
2015-08-19[AArch64][1/6] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NCJiong Wang1-0/+4
2015-08-19 Jiong Wang <jiong.wang@arm.com> bfd/ * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC): New entry. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC. gas/ * config/tc-aarch64.c (reloc_table): New relocation modifiers. (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/reloc-dtprel_lo12_nc.s: New testcase. * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.s: Likewise. * gas/aarch64/reloc-dtprel_lo12_nc.d: New expectation file. * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d: Likewise.
2015-08-18Add output_type to bfd_link_infoH.J. Lu1-1/+1
The "shared" field in bfd_link_info is set for both DSO and and PIE. There are separate fields for executable and relocatable outputs. This patch adds an "output_type" field: enum output_type { type_unknown = 0, type_executable, type_dll, type_relocatable }; and a "pic" field to bfd_link_info to replace shared, executable and relocatable fields so that we can use the "output_type" field to check for output type and the "pic" field check if output is PIC. Macros, bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie, are provided to check for output features. bfd/ * bfd/aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * bfd/bout.c: Likewise. * bfd/coff-alpha.c: Likewise. * bfd/coff-arm.c: Likewise. * bfd/coff-i386.c: Likewise. * bfd/coff-i960.c: Likewise. * bfd/coff-m68k.c: Likewise. * bfd/coff-mcore.c: Likewise. * bfd/coff-mips.c: Likewise. * bfd/coff-ppc.c: Likewise. * bfd/coff-rs6000.c: Likewise. * bfd/coff-sh.c: Likewise. * bfd/coff-tic80.c: Likewise. * bfd/coff-x86_64.c: Likewise. * bfd/coff64-rs6000.c: Likewise. * bfd/coffgen.c: Likewise. * bfd/cofflink.c: Likewise. * bfd/ecoff.c: Likewise. * bfd/ecofflink.c: Likewise. * bfd/elf-bfd.h: Likewise. * bfd/elf-eh-frame.c: Likewise. * bfd/elf-ifunc.c: Likewise. * bfd/elf-m10200.c: Likewise. * bfd/elf-m10300.c: Likewise. * bfd/elf-s390-common.c: Likewise. * bfd/elf-vxworks.c: Likewise. * bfd/elf.c: Likewise. * bfd/elf32-arm.c: Likewise. * bfd/elf32-avr.c: Likewise. * bfd/elf32-bfin.c: Likewise. * bfd/elf32-cr16.c: Likewise. * bfd/elf32-cr16c.c: Likewise. * bfd/elf32-cris.c: Likewise. * bfd/elf32-crx.c: Likewise. * bfd/elf32-d10v.c: Likewise. * bfd/elf32-dlx.c: Likewise. * bfd/elf32-epiphany.c: Likewise. * bfd/elf32-fr30.c: Likewise. * bfd/elf32-frv.c: Likewise. * bfd/elf32-ft32.c: Likewise. * bfd/elf32-h8300.c: Likewise. * bfd/elf32-hppa.c: Likewise. * bfd/elf32-i370.c: Likewise. * bfd/elf32-i386.c: Likewise. * bfd/elf32-i860.c: Likewise. * bfd/elf32-ip2k.c: Likewise. * bfd/elf32-iq2000.c: Likewise. * bfd/elf32-lm32.c: Likewise. * bfd/elf32-m32c.c: Likewise. * bfd/elf32-m32r.c: Likewise. * bfd/elf32-m68hc11.c: Likewise. * bfd/elf32-m68hc1x.c: Likewise. * bfd/elf32-m68k.c: Likewise. * bfd/elf32-mcore.c: Likewise. * bfd/elf32-mep.c: Likewise. * bfd/elf32-metag.c: Likewise. * bfd/elf32-microblaze.c: Likewise. * bfd/elf32-moxie.c: Likewise. * bfd/elf32-msp430.c: Likewise. * bfd/elf32-mt.c: Likewise. * bfd/elf32-nds32.c: Likewise. * bfd/elf32-nios2.c: Likewise. * bfd/elf32-or1k.c: Likewise. * bfd/elf32-ppc.c: Likewise. * bfd/elf32-rl78.c: Likewise. * bfd/elf32-rx.c: Likewise. * bfd/elf32-s390.c: Likewise. * bfd/elf32-score.c: Likewise. * bfd/elf32-score7.c: Likewise. * bfd/elf32-sh-symbian.c: Likewise. * bfd/elf32-sh.c: Likewise. * bfd/elf32-sh64.c: Likewise. * bfd/elf32-spu.c: Likewise. * bfd/elf32-tic6x.c: Likewise. * bfd/elf32-tilepro.c: Likewise. * bfd/elf32-v850.c: Likewise. * bfd/elf32-vax.c: Likewise. * bfd/elf32-visium.c: Likewise. * bfd/elf32-xc16x.c: Likewise. * bfd/elf32-xstormy16.c: Likewise. * bfd/elf32-xtensa.c: Likewise. * bfd/elf64-alpha.c: Likewise. * bfd/elf64-hppa.c: Likewise. * bfd/elf64-ia64-vms.c: Likewise. * bfd/elf64-mmix.c: Likewise. * bfd/elf64-ppc.c: Likewise. * bfd/elf64-s390.c: Likewise. * bfd/elf64-sh64.c: Likewise. * bfd/elf64-x86-64.c: Likewise. * bfd/elflink.c: Likewise. * bfd/elfnn-aarch64.c: Likewise. * bfd/elfnn-ia64.c: Likewise. * bfd/elfxx-mips.c: Likewise. * bfd/elfxx-sparc.c: Likewise. * bfd/elfxx-tilegx.c: Likewise. * bfd/i386linux.c: Likewise. * bfd/linker.c: Likewise. * bfd/m68klinux.c: Likewise. * bfd/pdp11.c: Likewise. * bfd/pe-mips.c: Likewise. * bfd/peXXigen.c: Likewise. * bfd/reloc.c: Likewise. * bfd/reloc16.c: Likewise. * bfd/sparclinux.c: Likewise. * bfd/sunos.c: Likewise. * bfd/vms-alpha.c: Likewise. * bfd/xcofflink.c: Likewise. include/ * include/bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. (bfd_link_pic): Likewise. (bfd_link_pie): Likewise. (bfd_link_info): Remove shared, executable, pie and relocatable. Add output_type and pic. ld/ * ld/ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * ld/ldemul.c: Likewise. * ld/ldfile.c: Likewise. * ld/ldlang.c: Likewise. * ld/ldmain.c: Likewise. * ld/ldwrite.c: Likewise. * ld/lexsup.c: Likewise. * ld/pe-dll.c: Likewise. * ld/plugin.c: Likewise. * ld/emultempl/aarch64elf.em: Likewise. * ld/emultempl/aix.em: Likewise. * ld/emultempl/alphaelf.em: Likewise. * ld/emultempl/armcoff.em: Likewise. * ld/emultempl/armelf.em: Likewise. * ld/emultempl/avrelf.em: Likewise. * ld/emultempl/beos.em: Likewise. * ld/emultempl/cr16elf.em: Likewise. * ld/emultempl/elf-generic.em: Likewise. * ld/emultempl/elf32.em: Likewise. * ld/emultempl/genelf.em: Likewise. * ld/emultempl/generic.em: Likewise. * ld/emultempl/gld960.em: Likewise. * ld/emultempl/gld960c.em: Likewise. * ld/emultempl/hppaelf.em: Likewise. * ld/emultempl/irix.em: Likewise. * ld/emultempl/linux.em: Likewise. * ld/emultempl/lnk960.em: Likewise. * ld/emultempl/m68hc1xelf.em: Likewise. * ld/emultempl/m68kcoff.em: Likewise. * ld/emultempl/m68kelf.em: Likewise. * ld/emultempl/metagelf.em: Likewise. * ld/emultempl/mipself.em: Likewise. * ld/emultempl/mmo.em: Likewise. * ld/emultempl/msp430.em: Likewise. * ld/emultempl/nds32elf.em: Likewise. * ld/emultempl/needrelax.em: Likewise. * ld/emultempl/nios2elf.em: Likewise. * ld/emultempl/pe.em: Likewise. * ld/emultempl/pep.em: Likewise. * ld/emultempl/ppc32elf.em: Likewise. * ld/emultempl/ppc64elf.em: Likewise. * ld/emultempl/sh64elf.em: Likewise. * ld/emultempl/solaris2.em: Likewise. * ld/emultempl/spuelf.em: Likewise. * ld/emultempl/sunos.em: Likewise. * ld/emultempl/tic6xdsbt.em: Likewise. * ld/emultempl/ticoff.em: Likewise. * ld/emultempl/v850elf.em: Likewise. * ld/emultempl/vms.em: Likewise. * ld/emultempl/vxworks.em: Likewise.
2015-08-11[AArch64][7/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12Jiong Wang1-0/+4
2015-08-11 Jiong Wang <jiong.wang@arm.com> include/elf/ * aarch64.h (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12): Define. bfd/ * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12): New entry. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12. gas/ * config/tc-aarch64.c (reloc_table): New relocation modifiers "dtprel_lo12". (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/reloc-dtprel_lo12-1.s: New testcase. * gas/aarch64/reloc-dtprel_lo12-ilp32-1.s: Likewise. * gas/aarch64/reloc-dtprel_lo12-1.d: New expectation file. * gas/aarch64/reloc-dtprel_lo12-ilp32-1.d: Likewise.
2015-08-11[AArch64][5/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NCJiong Wang1-0/+6
2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC): New entry. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC. gas/ * config/tc-aarch64.c (reloc_table): New relocation modifiers. (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/reloc-tlsldm_lo12_nc-1.s: New testcase. * gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.s: Likewise. * gas/aarch64/reloc-tlsldm_lo12_nc-1.d: New expectation file. * gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.d: Likewise.
2015-08-11[AArch64][2/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21Jiong Wang1-0/+5
2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21): New entry. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21. gas/ * config/tc-aarch64.c (reloc_table): New relocation modifiers. (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/reloc-tlsldm-page-1.s: New testcase. * gas/aarch64/reloc-tlsldm-page-ilp32-1.s: Likewise. * gas/aarch64/reloc-tlsldm-page-1.d: New expectation file. * gas/aarch64/reloc-tlsldm-page-ilp32-1.d: Likewise.
2015-07-16[AArch64][2/3] GAS support BFD_RELOC_AARCH64_TLSLD_ADR_PREL21Jiong Wang1-0/+4
2015-07-01Relocations for Nios II R2Sandra Loosemore1-0/+26
2015-07-01 Sandra Loosemore <sandra@codesourcery.com> Cesar Philippidis <cesar@codesourcery.com> bfd/ * bfd-in2.h: Regenerated. * elf32-nios2.c (elf_nios2_howto_table_rel): Rename to... (elf_nios2_r1_howto_table_rel): This. (elf_nios2_r2_howto_table_rel): New. (BFD_IS_R2): New. (lookup_howto): Add ABFD parameter. Adjust to look up in either the R1 or R2 relocation table, as determined by ABFD. (nios2_reloc_map): Add R2 relocations. (nios2_elf32_bfd_reloc_type_lookup): Do lookup using lookup_howto. Pass it the ABFD parameter. (nios2_elf32_bfd_reloc_name_lookup): Use ABFD to decide whether to return an R1 or R2 relocation. (nios2_elf32_info_to_howto): Do lookup using lookup_howto. Pass it the ABFD parameter. (nios2_elf32_do_call26_relocate): Check for alignment on a 4-byte boundary. (nios2_elf32_relocate_section): Adjust call to lookup_howto. * libbfd.h: Regenerated. * reloc.c (BFD_RELOC_NIOS2_R2_S12): New. (BFD_RELOC_NIOS2_R2_I10_1_PCREL): New. (BFD_RELOC_NIOS2_R2_T1I7_1_PCREL): New. (BFD_RELOC_NIOS2_R2_T1I7_2): New. (BFD_RELOC_NIOS2_R2_T2I4): New. (BFD_RELOC_NIOS2_R2_T2I4_1): New. (BFD_RELOC_NIOS2_R2_T2I4_2): New. (BFD_RELOC_NIOS2_R2_X1I7_2): New. (BFD_RELOC_NIOS2_R2_X2L5): New. (BFD_RELOC_NIOS2_R2_F1I5_2): New. (BFD_RELOC_NIOS2_R2_L5I4X1): New. (BFD_RELOC_NIOS2_R2_T1X1I6): New. (BFD_RELOC_NIOS2_R2_T1X1I6_2): New. include/elf/ * nios2.h (R_NIOS2_R2_S12): New. (R_NIOS2_R2_I10_1_PCREL): New. (R_NIOS2_R2_T1I7_1_PCREL): New. (R_NIOS2_R2_T1I7_2): New. (R_NIOS2_R2_T2I4): New. (R_NIOS2_R2_T2I4_1): New. (R_NIOS2_R2_T2I4_2): New. (R_NIOS2_R2_X1I7_2): New. (R_NIOS2_R2_X2L5): New. (R_NIOS2_R2_F1I5_2): New. (R_NIOS2_R2_L5I4X1): New. (R_NIOS2_R2_T1X1I6): New. (R_NIOS2_R2_T1X1I6_2): New. (R_NIOS2_ILLEGAL): Renumber.
2015-06-30Add support for SADDR addressing to the RL78 port.Nick Clifton1-0/+2
gas * config/rl78-parse.y: Tag all saddr expressions throughout. (SET_SA): New. (expr_is_saddr): Allow symbolic expressions. * config/tc-rl78.c (md_apply_fix): Handle SADDR. bfd * elf32-rl78.c (rl78_elf_howto_table): Add RH_SADDR. (rl78_reloc_map): Add R_RL78_RH_SADDR. * reloc.c: Add BFD_RELOC_RL78_SADDR. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate.
2015-06-15[AArch64] Gas add BFD_RELOC_AARCH64_LD64_GOTOFF_LO15 supportRenlin Li1-0/+5
2015-06-15 Renlin Li <renlin.li@arm.com> bfd/ * reloc.c (BFD_RELOC_AARCH64_LD64_GOTOFF_LO15): New entry. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_LD64_GOTOFF_LO15. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/ * config/tc-aarch64.c (reloc_table): New relocation modifier. (md_apply_fix): Support BFD_RELOC_AARCH64_LD64_GOTOFF_LO15. (aarch64_force_relocation): Ditto gas/testsuite/ * gas/aarch64/reloc-insn.s: Update test * gas/aarch64/reloc-insn.d: Update expected result.
2015-06-01[AArch64] GAS support BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14Jiong Wang1-0/+4
This patch add BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14 support in Gas. The relocation modifier === :gotpage_lo14:symbol 2015-06-01 Jiong.Wang <jiong.wang@arm.com> bfd/ * reloc.c (BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14): New entry. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14. gas/ * config/tc-aarch64.c (reloc_table): New relocation modifiers. (md_apply_fix): Support BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14. (aarch64_force_relocation): Ditto. gas/testsuite/ * gas/aarch64/ilp32-basic.s: New testcase. * gas/aarch64/ilp32-basic.d: Ditto.
2015-06-01[AArch64] GAS Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15Jiong Wang1-0/+4
2015-06-01 Jiong.Wang <jiong.wang@arm.com> bfd/ * reloc.c (BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15): New entry. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15. gas/ * config/tc-aarch64.c (reloc_table): New relocation modifiers. (md_apply_fix): Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15. (aarch64_force_relocation): Ditto. gas/testsuite/ * gas/aarch64/reloc-insn.s: New testcase. * gas/aarch64/reloc-insn.d: Ditto.
2015-02-26Add ADR :tlsgd: directive and TLSGD_ADR_PREL21 support.Marcus Shawcroft1-0/+4
2015-01-28FT32 initial supportAlan Modra1-0/+12
FT32 is a new 32-bit RISC core developed by FTDI for embedded applications. * configure.ac: Add FT32 support. * configure: Regenerate. bfd/ * Makefile.am: Add FT32 files. * archures.c (enum bfd_architecture): Add bfd_arch_ft32. (bfd_mach_ft32): Define. (bfd_ft32_arch): Declare. (bfd_archures_list): Add bfd_ft32_arch. * config.bfd: Handle FT32. * configure.ac: Likewise. * cpu-ft32.c: New file. * elf32-ft32.c: New file. * reloc.c (BFD_RELOC_FT32_10, BFD_RELOC_FT32_20, BFD_RELOC_FT32_17, BFD_RELOC_FT32_18): Define. * targets.c (_bfd_target_vector): Add ft32_elf32_vec. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * Makefile.in: Regenerate. * configure: Regenerate. * po/SRC-POTFILES.in: Regenerate. binutils/ * readelf.c: Add FT32 support. gas/ * Makefile.am: Add FT32 files. * config/tc-ft32.c: New file. * config/tc-ft32.h: New file. * configure.tgt: Add FT32 support. * Makefile.in: Regenerate. * po/POTFILES.in: Regenerate. gas/testsuite/ * gas/ft32/ft32.exp: New file. * gas/ft32/insn.d: New file. * gas/ft32/insn.s: New file. include/ * dis-asm.h (print_insn_ft32): Declare. include/elf/ * common.h (EM_FT32): Define. * ft32.h: New file. include/opcode/ * ft32.h: New file. ld/ * Makefile.am: Add FT32 files. * configure.tgt: Handle FT32 target. * emulparams/elf32ft32.sh: New file. * scripttempl/ft32.sc: New file. * Makefile.in: Regenerate. opcodes/ * Makefile.am: Add FT32 files. * configure.ac: Handle FT32. * disassemble.c (disassembler): Call print_insn_ft32. * ft32-dis.c: New file. * ft32-opc.c: New file. * Makefile.in: Regenerate. * configure: Regenerate. * po/POTFILES.in: Regenerate.
2015-01-19Fallout from recent bfd_reloc_outofrange changesAlan Modra1-15/+18
Commit ec93045b and cd21f5da introduced a large number of tic4x and tic54x regressions, due to the new checks being wrong for targets with octets_per_byte != 1. To fix that I introduced a new bfd_get_section_limit_octets and performed the check on octets rather than byte adresses, reducing the number of bfd_octets_per_byte calls. bfd_octets_per_byte is rather expensive.. I then wondered why the same bfd_reloc_outofrange check added to bfd_perform_relocation wasn't also added to bfd_install_relocation. The two functions are virtually identical and ought to remain that way. However, adding the same check to bfd_install_relocation resulted in ld-elf "FAIL Link eh-group.o to eh-group" on many ELF targets, including x64_64-linux. The reason being that eh-group.o has NONE relocs at the end of a section, and most targets give NONE relocs a non-zero size. So if we are to keep the new outofrange check it appears that NONE relocs must have a zero size. * bfd-in.h (bfd_get_section_limit_octets): New define, extracted from.. (bfd_get_section_limit): ..here. * reloc.c (bfd_perform_relocation): Correct bfd_reloc_outofrange check. (bfd_install_relocation, _bfd_final_link_relocate): Add same check here. * elf32-sh.c (sh_elf_reloc): Correct bfd_reloc_outofrange check. * elf32-ppc.c (ppc_elf_addr16_ha_reloc): Remove duplicated bfd_reloc_outofrange check. * bfd-in2.h: Regenerate. * cpu-ns32k.c (_bfd_do_ns32k_reloc_contents): Return bfd_reloc_ok on zero size relocs. * ecoff.c (ecoff_reloc_link_order): Likewise. * elf32-nds32.c (nds32_relocate_contents): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. * reloc.c (_bfd_relocate_contents): Don't bomb on zero size relocs. (_bfd_clear_contents): Likewise. * elfxx-mips.c (mips_elf_obtain_contents): Likewise. (mips_elf_perform_relocation): Likewise. * aoutx.h (aout_link_reloc_link_order): Allow for NULL return from malloc on zero size alloc. * cofflink.c (_bfd_coff_reloc_link_order): Likewise. * elflink.c (elf_reloc_link_order): Likewise. * linker.c (_bfd_generic_reloc_link_order): Likewise. * pdp11.c (aout_link_reloc_link_order): Likewise. * xcofflink.c (xcoff_reloc_link_order): Likewise. * aoutx.h (howto_table_ext): Ensure NONE relocs have size 3, bitsize 0, and complain_overflow_dont. * coff-sparc.c (coff_sparc_howto_table): Likewise. * elf-hppa.h (elf_hppa_howto_table): Likewise. * elf-m10200.c (elf_mn10200_howto_table): Likewise. * elf-m10300.c (elf_mn10300_howto_table): Likewise. * elf32-arc.c (elf_arc_howto_table): Likewise. * elf32-arm.c (elf32_arm_howto_table_1): Likewise. * elf32-avr.c (elf_avr_howto_table): Likewise. * elf32-bfin.c (bfin_howto_table): Likewise. * elf32-cr16.c (cr16_elf_howto_table): Likewise. * elf32-cris.c (cris_elf_howto_table): Likewise. * elf32-crx.c (crx_elf_howto_table): Likewise. * elf32-d10v.c (elf_d10v_howto_table): Likewise. * elf32-d30v.c (elf_d30v_howto_table): Likewise. * elf32-dlx.c (dlx_elf_howto_table): Likewise. * elf32-epiphany.c (epiphany_elf_howto_table): Likewise. * elf32-fr30.c (fr30_elf_howto_table): Likewise. * elf32-frv.c (elf32_frv_howto_table): Likewise. * elf32-h8300.c (h8_elf_howto_table): Likewise. * elf32-i370.c (i370_elf_howto_raw): Likewise. * elf32-i386.c (elf_howto_table): Likewise. * elf32-i860.c (elf32_i860_howto_table): Likewise. * elf32-i960.c (elf32_i960_relocate): Likewise. * elf32-ip2k.c (ip2k_elf_howto_table): Likewise. * elf32-iq2000.c (iq2000_elf_howto_table): Likewise. * elf32-lm32.c (lm32_elf_howto_table): Likewise. * elf32-m32c.c (m32c_elf_howto_table): Likewise. * elf32-m32r.c (m32r_elf_howto_table): Likewise. * elf32-m68hc11.c (elf_m68hc11_howto_table): Likewise. * elf32-m68hc12.c (elf_m68hc11_howto_table): Likewise. * elf32-m68k.c (howto_table): Likewise. * elf32-mcore.c (mcore_elf_howto_raw): Likewise. * elf32-mep.c (mep_elf_howto_table): Likewise. * elf32-metag.c (elf_metag_howto_table): Likewise. * elf32-microblaze.c (microblaze_elf_howto_raw): Likewise. * elf32-mips.c (elf_mips_howto_table_rel): Likewise. * elf32-moxie.c (moxie_elf_howto_table): Likewise. * elf32-msp430.c (elf_msp430_howto_table): Likewise. * elf32-mt.c (mt_elf_howto_table): Likewise. * elf32-nds32.c (nds32_elf_howto_table): Likewise. * elf32-nios2.c (elf_nios2_howto_table_rel): Likewise. * elf32-or1k.c (or1k_elf_howto_table): Likewise. * elf32-pj.c (pj_elf_howto_table): Likewise. * elf32-ppc.c (ppc_elf_howto_raw): Likewise. * elf32-rl78.c (rl78_elf_howto_table): Likewise. * elf32-rx.c (rx_elf_howto_table): Likewise. * elf32-s390.c (elf_howto_table): Likewise. * elf32-score.c (elf32_score_howto_table): Likewise. * elf32-score7.c (elf32_score_howto_table): Likewise. * elf32-sh-relocs.h (R_SH_NONE): Likewise. * elf32-spu.c (elf_howto_table): Likewise. * elf32-tic6x.c (elf32_tic6x_howto_table): Likewise. * elf32-tilepro.c (tilepro_elf_howto_table): Likewise. * elf32-v850.c (v850_elf_howto_table): Likewise. * elf32-vax.c (howto_table): Likewise. * elf32-visium.c (visium_elf_howto_table): Likewise. * elf32-xc16x.c (xc16x_elf_howto_table): Likewise. * elf32-xgate.c (elf_xgate_howto_table): Likewise. * elf32-xstormy16.c (xstormy16_elf_howto_table): Likewise. * elf32-xtensa.c (elf_howto_table): Likewise. * elf64-alpha.c (elf64_alpha_howto_table): Likewise. * elf64-mips.c (mips_elf64_howto_table_rel): Likewise. * elf64-mmix.c (elf_mmix_howto_table): Likewise. * elf64-ppc.c (ppc64_elf_howto_raw): Likewise. * elf64-s390.c (elf_howto_table): Likewise. * elf64-sh64.c (sh_elf64_howto_table): Likewise. * elf64-x86-64.c (x86_64_elf_howto_table): Likewise. * elfn32-mips.c (elf_mips_howto_table_rel): Likewise. * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise. (elfNN_aarch64_howto_none): Likewise. * elfxx-ia64.c (ia64_howto_table): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_howto_table): Likewise. * elfxx-tilegx.c (tilegx_elf_howto_table): Likewise. * nlm32-sparc.c (nlm32_sparc_howto_table): Likewise.
2015-01-15Fix memory access violations triggered by running objdump on fuzzed binaries.Nick Clifton1-2/+9
PR binutils/17512 * elf-m10300.c (mn10300_info_to_howto): Replace assertion with an error message. Never return an invalid howto pointer. * elf32-cr16.c (cr16_info_to_howto): Likewise. * elf32-crx.c (elf_crx_info_to_howto): Likewise. * elf32-i370.c (i370_elf_info_to_howto): Likewise. * elf32-mcore.c (mcore_elf_info_to_howto): Likewise. * elf32-microblaze.c (microblaze_elf_info_to_howto): Likewise. * elf32-mips.c (mips_elf32_rtype_to_howto): Likewise. * elf32-pj.c (pj_elf_info_to_howto): Likewise. * elf32-ppc.c (ppc_elf_info_to_howto): Likewise. * elf32-spu.c (spu_elf_info_to_howto): Likewise. * elf32-v850.c (v850_elf_info_to_howto_rela): Likewise. * elf32-vax.c (rtype_to_howto): Likewise. * elf64-alpha.c (elf64_alpha_info_to_howto): Likewise. * elf64-mips.c (mips_elf64_rtype_to_howto): Likewise. * elfn32-mips.c (sh_elf_info_to_howto): Likewise. * elf32-sh.c (sh_elf_info_to_howto): Likewise. (sh_elf_reloc): Check that the reloc is in range. * reloc.c (bfd_perform_relocation): Check that the section is big enough for the entire reloc. (bfd_generic_get_relocated_section_contents): Report unexpected return values from perform_reloc.
2015-01-06Fix memory access violations for objdump triggered by fuzzed binaries.Nick Clifton1-5/+6
PR binutils/17512 * reloc.c (bfd_get_reloc_size): Handle a reloc size of -1. (bfd_perform_relocation): Include the size of the reloc in the test for an out of range relocation. (bfd_generic_get_relocated_section_contents): Remove reloc range test.
2015-01-02ChangeLog rotatation and copyright year updateAlan Modra1-1/+1
2014-12-22More fixes for memory access violations exposed by fuzzed binaries.Nick Clifton1-0/+4
PR binutils/17512 * archive.c (do_slurp_bsd_armap): Return if the parsed_size is zero. (bfd_slurp_armap): Zero terminate the name. (bfd_generic_stat_arch_elt): If there is no header, fail. * elf32-arc.c (arc_info_to_howto_rel): Replace BFD_ASSERT with error message. * elf32-avr.c (avr_info_to_howto_rela): Likewise. * elf32-cr16c.c (elf_cr16c_info_to_howto_rel): Likewise. * elf32-cris.c (cris_info_to_howto_rela): Likewise. * elf32-d10v.c (d10v_info_to_howto_rel): Likewise. * elf32-d30v.c (d30v_info_to_howto_rel): Likewise. * elf32-dlx.c (dlx_rtype_to_howto): Likewise. * elf32-epiphany.c (epiphany_info_to_howto_rela): Likewise. * elf32-fr30.c (fr30_info_to_howto_rela): Likewise. * elf32-frv.c (frv_info_to_howto_rela): Likewise. * elf32-i960.c (elf32_i960_info_to_howto_rel): Likewise. * elf32-ip2k.c (ip2k_info_to_howto_rela): Likewise. * elf32-iq2000.c (iq2000_info_to_howto_rela): Likewise. * elf32-lm32.c (lm32_info_to_howto_rela): Likewise. * elf32-m32c.c (m32c_info_to_howto_rela): Likewise. * elf32-m32r.c (m32r_info_to_howto_rel): Likewise. * elf32-m68hc11.c (m68hc11_info_to_howto_rel): Likewise. * elf32-m68hc12.c (m68hc11_info_to_howto_rel): Likewise. * elf32-mep.c (mep_info_to_howto_rela): Likewise. * elf32-metag.c (metag_info_to_howto_rela): Likewise. * elf32-moxie.c (moxie_info_to_howto_rela): Likewise. * elf32-msp430.c (msp430_info_to_howto_rela): Likewise. * elf32-mt.c (mt_info_to_howto_rela): Likewise. * elf32-nds32.c (nds32_info_to_howto_rel): Likewise. * elf32-or1k.c (or1k_info_to_howto_rela): Likewise. * elf32-rl78.c (rl78_info_to_howto_rela): Likewise. * elf32-rx.c (rx_info_to_howto_rela): Likewise. * elf32-v850.c (v850_elf_info_to_howto_rel): Likewise. * elf32-visium.c (visium_info_to_howto_rela): Likewise. * elf32-xgate.c (xgate_info_to_howto_rel): Likewise. * elf32-xtensa.c (elf_xtensa_info_to_howto_rela): Likewise. * elf64-mmix.c (mmix_info_to_howto_rela): Likewise. * elf64-x86-64.c (elf_x86_64_reloc_type_lookup): Likewise. * elfnn-aarch64.c (elfNN_aarch64_bfd_reloc_from_type): Likewise. * elf64-sparc.c (elf64_sparc_slurp_one_reloc_table): Add range checking of reloc symbol index. * mach-o.c (bfd_mach_o_canonicalize_one_reloc): If no symbols have been provided then set the reloc's symbol to undefined. * reloc.c (bfd_generic_get_relocated_section_contents): Add range checking of the reloc to be applied. * versados.c (process_otr): Add more range checks. (versados_canonicalize_reloc): If the section is unknown, set the symbol to undefined. * vms-alpha.c (_bfd_vms_slurp_eisd): Add range checks. (alpha_vms_object_p): Likewise.
2014-12-06Add Visium support to bfdEric Botcazou1-0/+17
bfd/ * config.bfd: Add Visium support. * configure.ac: Likewise. * configure: Regenerate. * Makefile.am (ALL_MACHINES): Add cpu-visium.lo. (ALL_MACHINES_CFILES): Add cpu-visium.c. (BFD32_BACKENDS): Add elf32-visium.lo. (BFD32_BACKENDS_CFILES): Add elf32-visium.c. * Makefile.in: Regenerate. * archures.c (DESCRIPTION): Add Visium support. (bfd_visium_arch): Declare. (bfd_archures_list): Add bfd_visium_arch. * reloc.c: Add Visium relocations. * targets.c (visium_elf32_vec): Declare. (_bfd_target_vector): Add visium_elf32_vec. * bfd-in2.h: Regenerate. * libbfd.h: Likewise. * cpu-visium.c: New file. * elf32-visium.c: Likewise. * po/SRC-POTFILES.in: Regenerate. include/elf/ * common.h (EM_VISIUM): Define. * visium.h: New file.
2014-12-01More fixes for memory access violations exposed by fuzzed binaries.Nick Clifton1-0/+4
PR binutils/17512 * dwarf.h (struct dwarf_section): Add user_data field. * dwarf.c (frame_need_space): Check for an over large register number. (display_debug_frames): Check the return value from frame_need_space. Check for a CFA expression that is so long the start address wraps around. (debug_displays): Initialise the user_data field. * objdump.c (load_specific_debug_section): Save the BFD section pointer in the user_data field of the dwarf_section structure. (free_debug_section): Update BFD section data when freeing section contents. * readelf.c (load_specific_debug_section): Initialise the user_data field. * archive.c (do_slurp_coff_armap): Add range checks to prevent running off the end of the string table. * compress.c (bfd_get_full_section_contents): Return a NULL pointer for zero sized sections. Do not attempt to copy a buffer onto itself. * elf-attrs.c (_bfd_elf_parse_attributes): Check for an empty header. Add range checks to avoid running off the end of the section. * elf.c (bfd_elf_get_str_section): Seek before allocating so that if the seek fails, no memory is allocated. (bfd_elf_string_from_elf_section): Do not allocate a string from a non string section. It only leads to trouble later on. (_bfd_elf_print_private_bfd_data): Check for there being too little external dynamic data. (bfd_section_from_shdr): Replace assertion with a failure mode. (bfd_section_from_shdr): When walking a loaded group section use the internal structure size, not the external size. Check for the group section being empty. * elf32-i386.c (elf_i386_rtype_to_howto): Replace assertion with a failure mode. * elfcode.h (elf_slurp_reloc_table): Likewise. * reloc.c (bfd_perform_relocation): Avoid seg-fault if the howto parameter is NULL.
2014-11-26More fixes for memory access errors triggered by attemps to examine ↵Nick Clifton1-0/+9
corrupted binaries. PR binutils/17512 * dwarf.c (display_block): Do nothing if the block starts after the end of the buffer. (read_and_display_attr_value): Add range checks. (struct Frame_Chunk): Make the ncols and ra fields unsigned. (frame_need_space): Test for an ncols of zero. (read_cie): Fail if the augmentation data extends off the end of the buffer. (display_debug_frames): Add checks for read_cie failing. Add range checks. * coff-h8300.c (rtype2howto): Replace abort with returning a NULL value. * coff-h8500.c (rtype2howto): Likewise. * coff-tic30.c (rtype2howto): Likewise. * coff-z80.c (rtype2howto): Likewise. * coff-z8k.c (rtype2howto): Likewise. * coff-ia64.c (RTYPE2HOWTO): Always return a valid howto. * coff-m68k.c (m68k_rtype2howto): Return a NULL howto if none could be found. * coff-mcore.c (RTYPE2HOWTO): Add range checking. * coff-w65.c (rtype2howto): Likewise. * coff-we32k.c (RTYPE2HOWTO): Likewise. * pe-mips.c (RTYPE2HOWTO): Likewise. * coff-x86_64.c (coff_amd64_reloc): Likewise. Replace abort with an error return. * coffcode.h (coff_slurp_reloc_table): Allow the rel parameter to be unused. * coffgen.c (make_a_section_from_file): Check the length of a section name before testing to see if it is a debug section name. (coff_object_p): Zero out any uninitialised bytes in the opt header. * ecoff.c (_bfd_ecoff_slurp_symbolic_info): Test for the raw source being empty when there are values to be processed. (_bfd_ecoff_slurp_symbol_table): Add range check. * mach-o.c (bfd_mach_o_canonicalize_one_reloc): Likewise. (bfd_mach_o_mangle_sections): Move test for too many sections to before the allocation of the section table. (bfd_mach_o_read_symtab_strtab): If the read fails, free the memory and nullify the symbol pointer. * reloc.c (bfd_generic_get_relocated_section_contents): Add handling of a bfd_reloc_notsupported return value. * versados.c (EDATA): Add range checking. (get_record): Likewise. (process_otr): Check for contents being available before updating them. (versados_canonicalize_reloc): Add range check.
2014-09-16NDS32: Code refactoring of relaxation.Kuan-Lin Chen1-2/+50
Refactor each relaxation pattern to raise the maintainability. In origin, all patterns is analysed in nds32_elf_relax_section, so it is hard to debug and maintain. Therefore, we classify all patterns into different functions in this patch. Moreover, we adjust all optimizations into nds32_elf_relax_section to take these optimizations in turn. This can promise all relaxation being done after calling gld${EMULATION_NAME}_after_allocation.
2014-09-15Add support for MIPS R6.Andrew Bennett1-0/+11
bfd/ * aoutx.h (NAME (aout, machine_type)): Add mips32r6 and mips64r6. * archures.c (bfd_architecture): Likewise. * bfd-in2.h (bfd_architecture): Likewise. (bfd_reloc_code_real): Add relocs BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and BFD_RELOC_MIPS_19_PCREL_S2. * cpu-mips.c (arch_info_struct): Add mips32r6 and mips64r6. * elf32-mips.c: Define relocs R_MIPS_PC21_S2, R_MIPS_PC26_S2 R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16. (mips_reloc_map): Add entries for BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. * elf64-mips.c: Define REL, and RELA relocations R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16. (mips_reloc_map): Add entries for BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. * elfn32-mips.c: Likewise. * elfxx-mips.c (MIPSR6_P): New define. (mipsr6_exec_plt_entry): New array. (hi16_reloc_p): Add support for R_MIPS_PCHI16. (lo16_reloc_p): Add support for R_MIPS_PCLO16. (aligned_pcrel_reloc_p): New function. (mips_elf_relocation_needs_la25_stub): Add support for relocs: R_MIPS_PC21_S2 and R_MIPS_PC26_S2. (mips_elf_calculate_relocation): Add support for relocs: R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16. (_bfd_elf_mips_mach): Add support for mips32r6 and mips64r6. (mips_elf_add_lo16_rel_addend): Add support for R_MIPS_PCHI16. (_bfd_mips_elf_check_relocs): Add support for relocs: R_MIPS_PC21_S2 and R_MIPS_PC26_S2. (_bfd_mips_elf_relocate_section): Add a check for unaligned pc relative relocs. (_bfd_mips_elf_finish_dynamic_symbol): Add support for MIPS r6 plt entry. (mips_set_isa_flags): Add support for mips32r6 and mips64r6. (_bfd_mips_elf_print_private_bfd_data): Likewise. (mips_32bit_flags_p): Add support for mips32r6. * libbfd.h (bfd_reloc_code_real_names): Add entries for BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and BFD_RELOC_MIPS_19_PCREL_S2. * reloc.c: Document relocs BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and BFD_RELOC_MIPS_19_PCREL_S2. binutils/ * readelf.c (get_machine_flags): Add support for mips32r6 and mips64r6. elfcpp/ * mips.h (E_MIPS_ARCH_32R6, E_MIPS_ARCH_64R6): New enum constants. gas/ * config/tc-mips.c (mips_nan2008): New static global. (mips_flag_nan2008): Removed. (LL_SC_FMT): New define. (COP12_FMT): Updated. (ISA_IS_R6): New define. (ISA_HAS_64BIT_REGS): Add mips64r6. (ISA_HAS_DROR): Likewise. (ISA_HAS_64BIT_FPRS): Add mips32r6 and mips64r6. (ISA_HAS_ROR): Likewise. (ISA_HAS_ODD_SINGLE_FPR): Likewise. (ISA_HAS_MXHC1): Likewise. (hilo_interlocks): Likewise. (md_longopts): Likewise. (ISA_HAS_LEGACY_NAN): New define. (options): Add OPTION_MIPS32R6 and OPTION_MIPS64R6. (mips_ase): Add field rem_rev. (mips_ases): Updated to add which ISA an ASE was removed in. (mips_isa_rev): Add support for mips32r6 and mips64r6. (mips_check_isa_supports_ase): Add support to check if an ASE has been removed in the specified MIPS ISA revision. (validate_mips_insn): Skip '-' character. (macro_build): Likewise. (mips_check_options): Prevent R6 working with fp32, mips16, micromips, or branch relaxation. (file_mips_check_options): Set R6 floating point registers to 64 bit. Also deal with the nan2008 option. (limited_pcrel_reloc_p): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. (operand_reg_mask): Add support for OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. (match_check_prev_operand): New static function. (match_same_rs_rt_operand): New static function. (match_non_zero_reg_operand): New static function. (match_operand): Added entries for: OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. (insns_between): Added case to deal with forbidden slots. (append_insn): Added support for relocs: BFD_RELOC_MIPS_21_PCREL_S2 and BFD_RELOC_MIPS_26_PCREL_S2. (match_insn): Add support for operands -A, -B, +' and +". Also skip '-' character. (mips_percent_op): Add entries for %pcrel_hi and %pcrel_lo. (md_parse_option): Add support for mips32r6 and mips64r6. Also update the nan option handling. (md_pcrel_from): Add cases for relocs: BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2. (mips_force_relocation): Prevent forced relaxation for MIPS r6. (md_apply_fix): Add support for relocs: BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. (s_mipsset): Add support for mips32r6 and mips64r6. (s_nan): Update to support the new nan2008 framework. (tc_gen_reloc): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. (mips_elf_final_processing): Updated to use the mips_nan2008. (mips_cpu_info_table): Add entries for mips32r6 and mips64r6. (macro): Enable ldc2, sdc2, ll, lld, swc2, sc, scd, cache, pref macros for R6. (mips_fix_adjustable): Make PC relative R6 relocations relative to the symbol and not the section. * configure.ac: Add support for mips32r6 and mips64r6. * configure: Regenerate. * doc/c-mips.texi: Document the -mips32r6 and -mips64r6 command line options. * doc/as.texinfo: Likewise. gas/testsuite/ * gas/mips/24k-triple-stores-1.s: If testing for r6 prevent non-supported instructions from being tested. * gas/mips/24k-triple-stores-2.s: Likewise. * gas/mips/24k-triple-stores-3.s: Likewise. * gas/mips/24k-triple-stores-6.s: Likewise. * gas/mips/beq.s: Likewise. * gas/mips/eva.s: Likewise. * gas/mips/ld-zero-3.s: Likewise. * gas/mips/mips32-cp2.s: Likewise. * gas/mips/mips32.s: Likewise. * gas/mips/mips4.s: Likewise. * gas/mips/add.s: Don't test the add instructions if r6, and add padding. * gas/mips/add.d: Check for a triple dot not a nop at the end of the disassembly output. * gas/mips/micromips@add.d: Likewise. * gas/mips/mipsr6@24k-branch-delay-1.d: New file. * gas/mips/mipsr6@24k-triple-stores-1.d: New file. * gas/mips/mipsr6@24k-triple-stores-2-llsc.d: New file. * gas/mips/mipsr6@24k-triple-stores-2.d: New file. * gas/mips/mipsr6@24k-triple-stores-3.d: New file. * gas/mips/mipsr6@24k-triple-stores-6.d: New file. * gas/mips/mipsr6@add.d: New file. * gas/mips/mipsr6@attr-gnu-4-1-msingle-float.l: New file. * gas/mips/mipsr6@attr-gnu-4-1-msingle-float.s: New file. * gas/mips/mipsr6@attr-gnu-4-1-msoft-float.l: New file. * gas/mips/mipsr6@attr-gnu-4-1-msoft-float.s: New file. * gas/mips/mipsr6@attr-gnu-4-2-mdouble-float.l: New file. * gas/mips/mipsr6@attr-gnu-4-2-mdouble-float.s: New file. * gas/mips/mipsr6@beq.d: New file. * gas/mips/mipsr6@bge.d: New file. * gas/mips/mipsr6@bgeu.d: New file. * gas/mips/mipsr6@blt.d: New file. * gas/mips/mipsr6@bltu.d: New file. * gas/mips/mipsr6@branch-misc-1.d: New file. * gas/mips/mipsr6@branch-misc-2-64.d: New file. * gas/mips/mipsr6@branch-misc-2pic-64.d: New file. * gas/mips/mipsr6@branch-misc-4-64.d: New file. * gas/mips/mipsr6@cache.d: New file. * gas/mips/mipsr6@eva.d: New file. * gas/mips/mipsr6@jal-svr4pic-noreorder.d: New file. * gas/mips/mipsr6@jal-svr4pic.d: New file. * gas/mips/mipsr6@ld-zero-2.d: New file. * gas/mips/mipsr6@ld-zero-3.d: New file. * gas/mips/mipsr6@loc-swap-dis.d: New file. * gas/mips/mipsr6@mips32-cp2.d: New file. * gas/mips/mipsr6@mips32-imm.d: New file. * gas/mips/mipsr6@mips32.d: New file. * gas/mips/mipsr6@mips32r2.d: New file. * gas/mips/mipsr6@mips4-fp.d: New file. * gas/mips/mipsr6@mips4-fp.l: New file. * gas/mips/mipsr6@mips4-fp.s: New file. * gas/mips/mipsr6@mips4.d: New file. * gas/mips/mipsr6@mips5-fp.d: New file. * gas/mips/mipsr6@mips5-fp.l: New file. * gas/mips/mipsr6@mips5-fp.s: New file. * gas/mips/mipsr6@mips64.d: New file. * gas/mips/mipsr6@msa-branch.d: New file. * gas/mips/mipsr6@msa.d: New file. * gas/mips/mipsr6@pref.d: New file. * gas/mips/mipsr6@relax-swap3.d: New file. * gas/mips/r6-64-n32.d: New file. * gas/mips/r6-64-n64.d: New file. * gas/mips/r6-64-removed.l: New file. * gas/mips/r6-64-removed.s: New file. * gas/mips/r6-64.s: New file. * gas/mips/r6-attr-none-double.d: New file. * gas/mips/r6-n32.d: New file. * gas/mips/r6-n64.d: New file. * gas/mips/r6-removed.l: New file. * gas/mips/r6-removed.s: New file. * gas/mips/r6.d: New file. * gas/mips/r6.s: New file. * gas/mips/mipsr6@mips32-dsp.d: New file. * gas/mips/mipsr6@mips32-dspr2.d: New file. * gas/mips/mipsr6@mips32r2-ill.l: New file. * gas/mips/mipsr6@mips32r2-ill.s: New file. * gas/mips/cache.s: Add r6 instruction varients. * gas/mips/mips.exp: Add support for the mips32r6 and mips64r6 architectures. Also prevent non r6 supported tests from running. Finally, add in support for running the new r6 tests. (run_dump_test_arch): Add support for mipsr6 tests. (run_list_test_arch): Add support for using files of the form arch@testname.l . include/elf/ * mips.h: Add relocs: R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16. (E_MIPS_ARCH_32R6): New define. (E_MIPS_ARCH_64R6): New define. include/opcode/ * mips.h (mips_operand_type): Add new entries: OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. Add descriptions for the MIPS R6 instruction arguments: -a, -b, -d, -s, -t, -u, -v, -w, -x, -y, -A, -B, +I, +O, +R, +:, +\, +", +; (mips_check_prev_operand): New struct. (INSN2_FORBIDDEN_SLOT): New define. (INSN_ISA32R6): New define. (INSN_ISA64R6): New define. (INSN_UPTO32R6): New define. (INSN_UPTO64R6): New define. (mips_isa_table): Add INSN_UPTO32R6 and INSN_UPTO64R6. (ISA_MIPS32R6): New define. (ISA_MIPS64R6): New define. (CPU_MIPS32R6): New define. (CPU_MIPS64R6): New define. (cpu_is_member): Add cases for CPU_MIPS32R6, and CPU_MIPS64R6. ld/ * ldmain.c (get_emulation): Add support for -mips32r6 and -mips64r6. opcodes/ * mips-dis.c (mips_arch_choices): Add entries for mips32r6 and mips64r6. (parse_mips_dis_option): Allow MSA and virtualization support for mips64r6. (mips_print_arg_state): Add fields dest_regno and seen_dest. (mips_seen_register): New function. (print_insn_arg): Refactored code to use mips_seen_register function. Add support for OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. Changed OP_REPEAT_DEST_REG case to print out the register rather than aborting. (print_insn_args): Add length argument. Add code to correctly calculate the instruction address for pc relative instructions. (validate_insn_args): New static function. (print_insn_mips): Prevent jalx disassembling for r6. Use validate_insn_args. (print_insn_micromips): Use validate_insn_args. all the arguments are valid. * mips-formats.h (PREV_CHECK): New define. * mips-opc.c (decode_mips_operand): Add support for -a, -b, -d, -s, -t, -u, -v, -w, -x, -y, -A, -B, +I, +O, +R, +:, +\, +", +; (RD_pc): New define. (FS): New define. (I37): New define. (I69): New define. (mips_builtin_opcodes): Add MIPS R6 instructions. Exclude recoded MIPS R6 instructions from MIPS R2 instructions.
2014-07-07Adds support for writing values to AVR system I/O registers.Barney Stratford1-0/+10
* elf32-avr.c: Handle R_AVR_PORT5 and R_AVR_PORT6. * reloc.c: Add BFD_RELOC_AVR_PORT5 and BFD_RELOC_AVR_PORT6. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * avr.h: Add R_AVR_PORT5 and R_AVR_PORT6. * config/tc-avr.c (avr_operand): Permit referring to r26-r31 by name as [xyz][hl]. Permit using a symbol whoes name begins with `r' to refer to a register. Allow arbitrary expressions for the P and p operators. (md_apply_fix): Check the BFD_RELOC_AVR_PORT5 and BFD_RELOC_AVR_PORT6 relocations.
2014-07-01Add support for the AVR Tiny series of microcontrollers.Barney Stratford1-0/+5
* archures.c: add avrtiny architecture for avr target. * bfd-in2.h: Regenerate. * cpu-avr.c (arch_info_struct): add avrtiny arch info. * elf32-avr.c (elf_avr_howto_table): new relocation R_AVR_LDS_STS_16 added for 16 bit LDS/STS instruction of avrtiny arch. (avr_reloc_map): reloc R_AVR_LDS_STS_16 is mapped to BFD_RELOC_AVR_LDS_STS_16. (bfd_elf_avr_final_write_processing): select machine number avrtiny arch. (elf32_avr_object_p): set machine number for avrtiny arch. * libbfd.h: Regenerate. * reloc.c: Add documentation for BFD_RELOC_AVR_LDS_STS_16 reloc. * config/tc-avr.c (mcu_types): Add avrtiny arch. Add avrtiny arch devices attiny4, attiny5, attiny9, attiny10, attiny20 and attiny40. (md_show_usage): Add avrtiny arch in usage message. (avr_operand): validate and issue error for invalid register for avrtiny. add new reloc exp for 16 bit lds/sts instruction. (md_apply_fix): check 16 bit lds/sts operand for out of range and encode. (md_assemble): check ISA for arch and issue diagnostic. * include/elf/avr.h (E_AVR_MACH_AVRTINY): define avrtiny machine number. (R_AVR_LDS_STS_16): define 16 bit lds/sts reloc number. * include/opcode/avr.h (AVR_ISA_TINY): define avrtiny specific ISA. (AVR_ISA_2xxxa): define ISA without LPM. (AVR_ISA_AVRTINY): define avrtiny arch ISA. Add doc for contraint used in 16 bit lds/sts. Adjust ISA group for icall, ijmp, pop and push. Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints. * opcodes/avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts. (print_insn_avr): do not select opcode if insn ISA is avrtiny and machine is not avrtiny. * Makefile.am (ALL_EMULATION_SOURCES): add avrtiny emulation source. (eavrtiny.c): add rules for avrtiny emulation source. * Makefile.in: Regenerate. * configure.tgt: Add avrtiny to avr target emulations. * scripttempl/avrtiny.sc: New file. linker script template for avrtiny arch. * emulparams/avrtiny.sh: New file. emulation parameters for avrtiny arch.
2014-04-23PR ld/16787, stale dwarf2 stashAlan Modra1-4/+0
Throw away the dwarf2 stash if it becomes invalid due to section VMAs changing. It would be nice to reclaim all the bfd_alloc memory here when we throw away the stash, perhaps by putting everything we alloc on a private dwarf2 objalloc, but I haven't done that with this patch. I've also fixed a problem with bfd_perform_relocation losing reloc addends, which meant a second or subsequent look at debug info sections did not properly relocate the sections. I can't see why bfd_perform_relocation should need to change addends except for ld -r, and the history (985fca12, e98e6ec1) doesn't help much. Finally, the patch tweaks place_sections to avoid unnecessary work. If we've mapped input to output sections, then input section VMA isn't used so there's not much point in adjusting it. Incidentally, this also means place_sections isn't effective in all cases. PR ld/16787 * dwarf2.c (struct dwarf2_debug): Add sec_vma field. (place_sections): Do not modify VMA of sections when called from linker after sections have been placed in output sections. Short circuit single section case. (save_section_vma, section_vma_same): New functions. (_bfd_dwarf2_slurp_debug_info): Throw away stash if section VMAs change. * reloc.c (bfd_perform_relocation): Do not modify reloc addend when non-relocatable.
2014-04-22Remove support for the (deprecated) openrisc and or32 configurations and replaceChristian Svensson1-3/+47
with support for the new or1k configuration.
2014-04-10bfd/ChangeLogDenis Chertykov1-1/+13
* elf32-avr.c: Add DIFF relocations for AVR. (avr_final_link_relocate): Handle the DIFF relocs. (bfd_elf_avr_diff_reloc): New. (elf32_avr_is_diff_reloc): New. (elf32_avr_adjust_diff_reloc_value): Reduce difference value. (elf32_avr_relax_delete_bytes): Recompute difference after deleting bytes. * reloc.c: Add BFD_RELOC_AVR_DIFF8/16/32 relocations gas/ChangeLog * config/tc-avr.c: Add new flag mlink-relax. (md_show_usage): Add flag and help text. (md_parse_option): Record whether link relax is turned on. (relaxable_section): New. (avr_validate_fix_sub): New. (avr_force_relocation): New. (md_apply_fix): Generate DIFF reloc. (avr_allow_local_subtract): New. * config/tc-avr.h (TC_LINKRELAX_FIXUP): Define to 0. (TC_FORCE_RELOCATION): Define. (TC_FORCE_RELOCATION_SUB_SAME): Define. (TC_VALIDATE_FIX_SUB): Define. (avr_force_relocation): Declare. (avr_validate_fix_sub): Declare. (md_allow_local_subtract): Define. (avr_allow_local_subtract): Declare. gas/testsuite/ChangeLog * gas/avr/diffreloc_withrelax.d: New testcase. * gas/avr/noreloc_withoutrelax.d: Likewise. * gas/avr/relax.s: Likewise. include/ChangeLog * elf/avr.h: Add new DIFF relocs. ld/testsuite/ChangeLog * ld-avr/norelax_diff.d: New testcase. * ld-avr/relax_diff.d: Likewise. * ld-avr/relax.s: Likewise.
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