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path: root/bfd/reloc.c
AgeCommit message (Expand)AuthorFilesLines
2022-12-17bfd_get_relocated_section_contents allow NULL data bufferAlan Modra1-1/+4
2022-11-14objcopy renaming section with explicit flagsAlan Modra1-0/+4
2022-08-25PR11290, avr-ld "out of range error" is confusingAlan Modra1-1/+1
2022-07-25bfd: Delete R_LARCH_NONE from dyn info of LoongArch.liuzhensong1-0/+3
2022-07-25bfd: Add supported for LoongArch new relocations.liuzhensong1-0/+79
2022-06-27drop XC16x bitsJan Beulich1-11/+0
2022-06-14BFD_RELOC_MIPS_16Alan Modra1-1/+1
2022-06-08Don't encode reloc.sizeAlan Modra1-50/+27
2022-06-08HOWTO size encodingAlan Modra1-4/+4
2022-06-08HOWTO_RSIZEAlan Modra1-1/+2
2022-06-08NONE reloc fixesAlan Modra1-1/+1
2022-04-07Add support for COFF secidx relocationsMark Harmstone1-0/+2
2022-01-02Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2021-11-15PowerPC64 @notoc in non-power10 codeAlan Modra1-0/+2
2021-10-24LoongArch bfd supportliuzhensong1-0/+89
2021-08-06bfd_reloc_offset_in_range overflowAlan Modra1-1/+1
2021-05-06or1k: Implement relocation R_OR1K_GOT_AHI16 for gotha()Stafford Horne1-0/+2
2021-04-20Rework the R_NEG support on both gas and ld for the PowerPC AIX targets, in o...Cl?ment Chigot1-0/+2
2021-03-31Use bool in bfdAlan Modra1-29/+29
2021-03-12aix: implement TLS relocation for gas and ldClément Chigot1-0/+20
2021-03-12aix: implement R_TOCU and R_TOCL relocationsClément Chigot1-0/+4
2021-03-05Move x86_64 PE changes out of bfd_perform_relocationAlan Modra1-25/+1
2021-03-03Split relocation defines out of coff/internal.hAlan Modra1-1/+1
2021-01-12elf/x86-64: Adjust R_AMD64_DIR64/R_AMD64_DIR32 for PE/x86-64 inputsH.J. Lu1-0/+7
2021-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2020-09-16elf/x86-64: Adjust relocation for PE/x86-64 inputsH.J. Lu1-0/+18
2020-09-08MSP430: Support relocations for subtract expressions in .uleb128 directivesJozef Lawrynowicz1-0/+5
2020-09-01arm: ubsan: shift exponent 4GAlan Modra1-2/+3
2020-08-27PR26462 UBSAN: reloc.c:473 shift exponent 4294967295Alan Modra1-0/+3
2020-06-06Rename PowerPC64 pcrel GOT TLS relocationsAlan Modra1-4/+4
2020-04-22xtensa: fix PR ld/25861Max Filippov1-0/+24
2020-02-26Indent labelsAlan Modra1-1/+1
2020-02-07Add support for the GBZ80 and Z80N variants of the Z80 architecture, and add ...Sergey Belyashov1-0/+4
2020-01-02Add support for the GBZ80, Z180, and eZ80 variants of the Z80 architecure. A...Sergey Belyashov1-0/+24
2020-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2019-11-25Pass section when available to bfd_octets_per_byteAlan Modra1-16/+13
2019-11-25Introduce new section flag: SEC_ELF_OCTETSChristian Eggers1-7/+25
2019-11-19PR25200, SIGSEGV in _bfd_elf_validate_relocAlan Modra1-22/+5
2019-11-07Remove CR16C supportAlan Modra1-82/+0
2019-09-19bfd_section_* macrosAlan Modra1-2/+1
2019-09-18Constify target name, reloc name, and carsym nameAlan Modra1-1/+1
2019-07-19[PowerPC64] pc-relative TLS relocationsAlan Modra1-0/+14
2019-05-24PowerPC relocations for prefix insnsAlan Modra1-0/+34
2019-05-23bfd: add support for eBPFJose E. Marchesi1-0/+13
2019-05-06PowerPC reloc symbols that shouldn't be adjustedAlan Modra1-8/+8
2019-04-15[binutils, ARM, 16/16] Add support to VLDR and VSTR of system registersAndre Vieira1-0/+2
2019-04-15[binutils, ARM, 12/16] Scalar Low Overhead loop instructions for Armv8.1-M Ma...Andre Vieira1-0/+5
2019-04-15[binutils, ARM, 11/16] New BFCSEL instruction for Armv8.1-M MainlineAndre Vieira1-0/+5
2019-04-15[binutils, ARM, 10/16] BFCSEL infrastructure with new global reloc R_ARM_THM_...Andre Vieira1-0/+5
2019-04-15[binutils, ARM, 8/16] BFL infrastructure with new global reloc R_ARM_THM_BF18Andre Vieira1-0/+5
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