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path: root/bfd/elfxx-riscv.c
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2023-12-15RISC-V: Imply 'Zicntr' and 'Zihpm' implicitly depended on 'Zicsr'Xiao Zeng1-0/+4
2023-12-01RISC-V: Add SiFive custom vector coprocessor interface instructions v1.0Nelson Chu1-0/+5
2023-12-01RISC-V: Zv*: Add support for Zvkb ISA extensionChristoph Müllner1-2/+8
2023-11-24RISC-V: Update 'Zfa' extension versionzengxiao1-1/+1
2023-11-23RISC-V: Add sub-extension XTheadZvamo for T-Head VECTOR vendor extensionJin Ma1-0/+5
2023-11-23RISC-V: Add T-Head VECTOR vendor extension.Jin Ma1-0/+12
2023-11-07RISC-V: Add support for XCValu extension in CV32E40PMary Bennett1-0/+5
2023-11-07RISC-V: Add support for XCVmac extension in CV32E40PMary Bennett1-0/+5
2023-11-06RISC-V: Moved out linker internal relocations after R_RISCV_max.Nelson Chu1-85/+93
2023-10-16RISC-V: Remove RV64E conflictTsukasa OI1-7/+0
2023-09-07RISC-V: Clarify the naming rules of vendor operands.Nelson Chu1-1/+0
2023-09-05RISC-V: Add stub support for the 'Svadu' extensionTsukasa OI1-0/+2
2023-09-05RISC-V: Add 'Smcntrpmf' extension and its CSRsTsukasa OI1-0/+2
2023-09-05RISC-V: Prohibit combination of 'E' and 'H'Tsukasa OI1-0/+7
2023-08-18RISC-V: Report "c or zca" for INSN_CLASS_C when error reporting.Nelson Chu1-1/+1
2023-08-15RISC-V: Make "fli.h" available to 'Zvfh' + 'Zfa'Tsukasa OI1-0/+15
2023-08-15RISC-V: Add support for the 'Zihintntl' extensionTsukasa OI1-0/+20
2023-08-11RISC-V: Remove support for non-existing 'Zve32d'Tsukasa OI1-1/+0
2023-08-08RISC-V: Update ratified 'Ztso' extension versionTsukasa OI1-1/+1
2023-08-03RISC-V: Add support for 'Zvfh' and 'Zvfhmin'Tsukasa OI1-0/+5
2023-08-03RISC-V: Imply 'Zicsr' from 'Zve32x'Tsukasa OI1-0/+1
2023-08-02Revert "2.41 Release sources"Sam James1-23/+61
2023-08-022.41 Release sourcesbinutils-2_41-releaseNick Clifton1-61/+23
2023-07-28RISC-V: Add actual 'Zvkt' extension supportTsukasa OI1-0/+3
2023-07-24RISC-V: Implications from 'Zc[fd]' extensionsTsukasa OI1-0/+2
2023-07-24RISC-V: Prohibit the 'Zcf' extension on RV64Tsukasa OI1-0/+7
2023-07-18RISC-V: Supports Zcb extension.Jiawei1-0/+21
2023-07-18RISC-V: Support Zca/f/d extensions.Jiawei1-15/+29
2023-07-03RISC-V: Zvkh[a,b]: Remove individual instruction classChristoph Müllner1-8/+2
2023-07-01RISC-V: Add support for the Zvksc ISA extensionNathan Huckleberry1-0/+3
2023-07-01RISC-V: Add support for the Zvknc ISA extensionNathan Huckleberry1-0/+3
2023-07-01RISC-V: Add support for the Zvksg ISA extensionNathan Huckleberry1-0/+3
2023-07-01RISC-V: Add support for the Zvks ISA extensionChristoph Müllner1-0/+4
2023-07-01RISC-V: Add support for the Zvkng ISA extensionNathan Huckleberry1-0/+3
2023-07-01RISC-V: Allow nested implications for extensionsNathan Huckleberry1-7/+22
2023-07-01RISC-V: Add support for the Zvkn ISA extensionChristoph Müllner1-0/+5
2023-07-01RISC-V: Add support for the Zvksh ISA extensionChristoph Müllner1-0/+5
2023-07-01RISC-V: Add support for the Zvksed ISA extensionChristoph Müllner1-0/+5
2023-07-01RISC-V: Add support for the Zvknh[a,b] ISA extensionsChristoph Müllner1-0/+13
2023-07-01RISC-V: Add support for the Zvkned ISA extensionChristoph Müllner1-0/+5
2023-07-01RISC-V: Add support for the Zvkg ISA extensionChristoph Müllner1-0/+5
2023-07-01RISC-V: Add support for the Zvbc extensionNathan Huckleberry1-0/+5
2023-07-01RISC-V: Add support for the Zvbb ISA extensionChristoph Müllner1-0/+5
2023-06-30RISC-V: Add support for the Zfa extensionChristoph Müllner1-0/+39
2023-06-27 RISC-V: Support Zicond extensionPhilipp Tomsich1-0/+5
2023-05-19RISC-V: Support subtraction of .uleb128.Kuan-Lin Chen1-0/+54
2023-04-26 RISC-V: Support XVentanaCondOps extensionPhilipp Tomsich1-0/+4
2023-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2022-12-23RISC-V: Relax the order checking for the architecture stringNelson Chu1-135/+75
2022-11-25riscv: Add AIA extension support (Smaia, Ssaia)Christoph Müllner1-0/+4