riscv-gnu-toolchain/gdb.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2022-03-18	RISC-V: Cache management instructions	Tsukasa OI	1	-0/+6
2022-03-18	RISC-V: Prefetch hint instructions and operand set	Tsukasa OI	1	-0/+3
2022-02-25	RISC-V: Remove a loop in the ISA parser	Tsukasa OI	1	-7/+4
2022-02-23	RISC-V: PR28733, add missing extension info to 'unrecognized opcode' error	Patrick O'Neill	1	-0/+94
2022-02-22	RISC-V: Maintain a string to hold the canonical order	Kito Cheng	1	-17/+5
2022-01-07	RISC-V: Updated the default ISA spec to 20191213.	Nelson Chu	1	-1/+3
2022-01-02	Update year range in copyright notice of binutils files	Alan Modra	1	-1/+1
2021-12-16	RISC-V: Support svinval extension with frozen version 1.0.	Nelson Chu	1	-0/+3
2021-12-09	RISC-V: Clarify the behavior of .option arch directive.	Nelson Chu	1	-24/+15
2021-11-22	RISC-V: Removed the redundant NULL pointer check in the riscv_update_subset.	Nelson Chu	1	-3/+0
2021-11-22	RISC-V: PR28610, Fix ASAN heap-buffer-overflow error in riscv_update_subset.	Nelson Chu	1	-7/+12
2021-11-19	RISC-V: Support new .option arch directive.	Nelson Chu	1	-24/+134
2021-11-18	RISC-V: Add instructions and operand set for z[fdq]inx	jiawei	1	-0/+9
2021-11-18	RISC-V: Add mininal support for z[fdq]inx	jiawei	1	-0/+12
2021-11-17	RISC-V: Support rvv extension with released version 1.0.	Nelson Chu	1	-1/+75
2021-11-16	RISC-V: Scalar crypto instructions and operand set.	jiawei	1	-0/+25
2021-11-16	RISC-V: Minimal support of scalar crypto extension.	jiawei	1	-1/+29
2021-11-11	RISC-V: Dump objects according to the elf architecture attribute.	Nelson Chu	1	-3/+66
2021-11-04	RISC-V: Clarify the behavior of .option rvc or norvc.	Nelson Chu	1	-0/+65
2021-10-07	RISC-V: Add support for Zbs instructions	Philipp Tomsich	1	-0/+1
2021-10-07	RISC-V: Update extension version for Zb[abc] to 1.0.0	Philipp Tomsich	1	-3/+3
2021-09-28	RISC-V: Fix wrong version number when arch contains 'p'.	Cooper Qu	1	-6/+2
2021-09-28	RISC-V: Allow to add numbers in the prefixed extension names.	Nelson Chu	1	-38/+44
2021-09-17	RISC-V: Merged extension string tables and their version tables into one.	Nelson Chu	1	-127/+223
2021-09-07	Fix illegal memory access triggered by an attempt to disassemble a corrupt RI...	Nick Clifton	1	-0/+7
2021-07-20	RISC-V: Minor updates for architecture parser.	Nelson Chu	1	-94/+82
2021-05-26	RISC-V: Allow to link the objects with unknown prefixed extensions.	Nelson Chu	1	-1/+2
2021-05-13	RISC-V: Record implicit subsets in a table, to avoid repeated codes.	Nelson Chu	1	-54/+49
2021-04-13	RISC-V: Don't report the mismatched version warning for the implicit extensions.	Nelson Chu	1	-8/+3
2021-04-12	RISC-V: The version of i-ext should be RISCV_UNKNOWN_VERSION when expanding g...	Nelson Chu	1	-2/+2
2021-04-12	RISC-V: Add i-ext as the implicit extension when e-ext is set.	Nelson Chu	1	-37/+17
2021-04-12	RISC-V: Support to parse the multi-letter prefix in the architecture string.	Nelson Chu	1	-199/+196
2021-04-01	Use startswith more for strncmp function calls.	Martin Liska	1	-2/+2
2021-03-31	Use bool in bfd	Alan Modra	1	-219/+219
2021-03-16	RISC-V : Support bitmanip-0.93 ZBA/ZBB/ZBC instructions	Kuan-Lin Chen	1	-1/+1
2021-02-19	RISC-V: PR27158, fixed UJ/SB types and added CSS/CL/CS types for .insn.	Nelson Chu	1	-5/+5
2021-02-18	RISC-V: Add bfd/cpu-riscv.h to support all spec versions controlling.	Nelson Chu	1	-1/+4
2021-02-04	RISC-V: Removed the v0.93 bitmanip ZBA/ZBB/ZBC instructions.	Nelson Chu	1	-1/+1
2021-01-15	RISC-V: Comments tidy and improvement.	Nelson Chu	1	-29/+25
2021-01-07	RISC-V: Add pause hint instruction.	Philipp Tomsich	1	-1/+1
2021-01-07	RISC-V: Support riscv bitmanip frozen ZBA/ZBB/ZBC instructions (v0.93).	Claire Xenia Wolf	1	-1/+1
2021-01-04	RISC-V: Fix the merged orders of Z* extension for linker.	Nelson Chu	1	-1/+1
2021-01-04	PR26741, benign use after free in riscv_parse_prefixed_ext	Alan Modra	1	-1/+1
2021-01-01	Update year range in copyright notice of binutils files	Alan Modra	1	-1/+1
2020-12-10	RISC-V: Control fence.i and csr instructions by zifencei and zicsr.	Nelson Chu	1	-20/+39
2020-12-01	RISC-V: Fix the order checking for Z* extension.	Nelson Chu	1	-2/+1
2020-12-01	RISC-V: Support to add implicit extensions for G.	Nelson Chu	1	-6/+21
2020-12-01	RISC-V: Support to add implicit extensions.	Nelson Chu	1	-46/+221
2020-12-01	RISC-V: Improve the version parsing for arch string.	Nelson Chu	1	-178/+146
2020-12-01	RISC-V: Add zifencei and prefixed h class extensions.	Nelson Chu	1	-2/+19