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Add reloc_unsign_bits() to fix others sop_pop relocs overflow check.
Then add over/underflow tests for relocs B*, SOP_POP* and PCREL20_S2.
bfd/ChangeLog:
* bfd/elfxx-loongarch.c: Add reloc_unsign_bits().
ld/ChangeLog:
* ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp: Add tests.
* ld/testsuite/ld-loongarch-elf/abi1_max_imm.dd: New test.
* ld/testsuite/ld-loongarch-elf/abi1_max_imm.s: New test.
* ld/testsuite/ld-loongarch-elf/abi1_sops.s: New test.
* ld/testsuite/ld-loongarch-elf/abi2_max_imm.s: New test.
* ld/testsuite/ld-loongarch-elf/abi2_overflows.s: New test.
* ld/testsuite/ld-loongarch-elf/max_imm_b16.d: New test.
* ld/testsuite/ld-loongarch-elf/max_imm_b21.d: New test.
* ld/testsuite/ld-loongarch-elf/max_imm_b26.d: New test.
* ld/testsuite/ld-loongarch-elf/max_imm_pcrel20.d: New test.
* ld/testsuite/ld-loongarch-elf/overflow_b16.d: New test.
* ld/testsuite/ld-loongarch-elf/overflow_b21.d: New test.
* ld/testsuite/ld-loongarch-elf/overflow_b26.d: New test.
* ld/testsuite/ld-loongarch-elf/overflow_pcrel20.d: New test.
* ld/testsuite/ld-loongarch-elf/overflow_s_0_10_10_16_s2.d: New test.
* ld/testsuite/ld-loongarch-elf/overflow_s_0_5_10_16_s2.d: New test.
* ld/testsuite/ld-loongarch-elf/overflow_s_10_12.d: New test.
* ld/testsuite/ld-loongarch-elf/overflow_s_10_16.d: New test.
* ld/testsuite/ld-loongarch-elf/overflow_s_10_16_s2.d: New test.
* ld/testsuite/ld-loongarch-elf/overflow_s_10_5.d: New test.
* ld/testsuite/ld-loongarch-elf/overflow_s_5_20.d: New test.
* ld/testsuite/ld-loongarch-elf/overflow_u.d: New test.
* ld/testsuite/ld-loongarch-elf/overflow_u_10_12.d: New test.
* ld/testsuite/ld-loongarch-elf/underflow_b16.d: New test.
* ld/testsuite/ld-loongarch-elf/underflow_b21.d: New test.
* ld/testsuite/ld-loongarch-elf/underflow_b26.d: New test.
* ld/testsuite/ld-loongarch-elf/underflow_pcrel20.d: New test.
* ld/testsuite/ld-loongarch-elf/underflow_s_0_10_10_16_s2.d: New test.
* ld/testsuite/ld-loongarch-elf/underflow_s_0_5_10_16_s2.d: New test.
* ld/testsuite/ld-loongarch-elf/underflow_s_10_12.d: New test.
* ld/testsuite/ld-loongarch-elf/underflow_s_10_16.d: New test.
* ld/testsuite/ld-loongarch-elf/underflow_s_10_16_s2.d: New test.
* ld/testsuite/ld-loongarch-elf/underflow_s_10_5.d: New test.
* ld/testsuite/ld-loongarch-elf/underflow_s_5_20.d: New test.
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R_LARCH_IRELATIVE: For dynamic relocation that does not distinguish between
32/64 bits, size and bitsize set to 8 and 64.
R_LARCH_TLS_DESC64: Change size to 8.
R_LARCH_SOP_POP_32_S_0_5_10_16_S2: Change src_mask to 0, dst_mask to
0x03fffc1f.
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Adds two new external authors to etc/update-copyright.py to cover
bfd/ax_tls.m4, and adds gprofng to dirs handled automatically, then
updates copyright messages as follows:
1) Update cgen/utils.scm emitted copyrights.
2) Run "etc/update-copyright.py --this-year" with an extra external
author I haven't committed, 'Kalray SA.', to cover gas testsuite
files (which should have their copyright message removed).
3) Build with --enable-maintainer-mode --enable-cgen-maint=yes.
4) Check out */po/*.pot which we don't update frequently.
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Add tls le relax support and related relocs in bfd.
New relocation related explanation can refer to the following url:
https://github.com/loongson/la-abi-specs/blob/release/laelf.adoc
This support does two main things:
1. Implement support for three new relocation items in bfd.
The three new relocation items are shown below:
R_LARCH_TLS_LE_ADD_R
R_LARCH_TLS_LE_HI20_R
R_LARCH_TLS_LE_LO12_R
2. ADD a new macro RELOCATE_TLS_TP32_HI20
Handle problems caused by symbol extensions in TLS LE, The processing
is similar to the macro RELOCATE_CALC_PC32_HI20 method.
3. Implement the tls le relax function.
bfd/ChangeLog:
* bfd-in2.h: Add relocs related to tls le relax.
* elfnn-loongarch.c:
(loongarch_relax_tls_le): New function.
(RELOCATE_TLS_TP32_HI20): New macro.
(loongarch_elf_check_relocs): Add new reloc support.
(perform_relocation): Likewise.
(loongarch_elf_relocate_section): Handle new relocs related to relax.
(loongarch_elf_relax_section): Likewise.
* elfxx-loongarch.c:
(LOONGARCH_HOWTO (R_LARCH_TLS_LE_ADD_R)): New reloc how to type.
(LOONGARCH_HOWTO (R_LARCH_TLS_LE_HI20_R)): Likewise.
(LOONGARCH_HOWTO (R_LARCH_TLS_LE_LO12_R)): Likewise.
* libbfd.h: Add relocs related to tls le relax.
* reloc.c: Likewise.
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Seen when running ld-loongarch-elf/tlsdesc-dso test.
elfxx-loongarch.c:1844:32: runtime error: index 125 out of bounds for
type 'loongarch_reloc_howto_type [124]'
So either the loongarch_howto_table needs three more
LOONGARCH_EMPTY_HOWTO entries, or loongarch_elf_rtype_to_howto should
be testing for r_type < ARRAY_SIZE (loongarch_howto_table). I figure
it's worth wasting a little more space to get faster lookup.
* elfxx-loongarch.c (loongarch_howto_table): Add
LOONGARCH_EMPTY_HOWTO entries for 121..123.
(loongarch_elf_rtype_to_howto): Don't support slow lookup.
Assert exact table size and r_type indexing. Omit return cast.
(loongarch_reloc_name_lookup): Omit assertion and return cast.
(loongarch_reloc_type_lookup): Likewise.
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The pcalau12i + addi.d of TLS LD/GD/DESC relax to pcaddi.
Relaxation is only performed when the TLS model transition is not possible.
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The normal DESC instruction sequence is:
pcalau12i $a0,%desc_pc_hi20(var) #R_LARCH_TLS_DESC_PC_HI20
addi.d $a0,$a0,%desc_pc_lo12(var) #R_LARCH_TLS_DESC_PC_LO12
ld.d $ra,$a0,%desc_ld(var) #R_LARCH_TLS_DESC_LD
jirl $ra,$ra,%desc_call(var) #R_LARCH_TLS_DESC_CALL
add.d $a0,$a0,$tp
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If the symbol index is not zero, the addend is used to represent
the first and the third expressions of the .align.
The lowest 8 bits are used to represent the first expression.
Other bits are used to represent the third expression.
The addend of R_LARCH_ALIGN for ".align 5, ,4" is 0x405.
The addend of R_LARCH_ALIGN for ".balign 32, ,4" is 0x405.
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R_LARCH_CALL36 is used for medium code model function call pcaddu18i+jirl, and
these two instructions must adjacent.
The LoongArch ABI v2.20 at here: https://github.com/loongson/la-abi-specs.
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The as and ld use _bfd_error_handler to output error messages when
checking relocation alignment and relocation overflow. However, the
abfd value passed by as to the function is NULL, resulting in an
internal error. The ld passes a non-null value to the function,
so it can output an error message normally.
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Add a macro pcaddi instruction to support "pcaddi rd, symbol".
pcaddi has a 20-bit signed immediate, it can address a +/- 2MB pc relative
address, and the address should be 4-byte aligned.
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This reverts commit 675b9d612cc59446e84e2c6d89b45500cb603a8d.
See https://sourceware.org/pipermail/binutils/2023-August/128761.html.
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For B16/B21/B26/PCREL20_S2 relocations, if immediate overflow check after
rightshift, and the mask need to include sign bit.
Now, the immediate overflow check before rightshift for easier understand.
bfd/ChangeLog:
* elfxx-loongarch.c (reloc_bits_pcrel20_s2): Delete.
(reloc_bits_b16): Delete.
(reloc_bits_b21): Delete.
(reloc_bits_b26): Delete.
(reloc_sign_bits): New.
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Gas defaults to emit R_LARCH_ADD64/R_LARCH_SUB64 unless explcitly declared
to emit R_LARCH_64_PCREL.
The LoongArch ABI at here:
https://github.com/loongson/la-abi-specs/blob/release/la-abi.adoc
bfd/ChangeLog:
* bfd-in2.h (not): Add R_LARCH_64_PCREL
* elfnn-loongarch.c (perform_relocation): Likewise.
* elfxx-loongarch.c: Likewise.
* libbfd.h: Likewise.
* reloc.c: Likewise.
gas/ChangeLog:
* config/tc-loongarch.c (loongarch_args_parser_can_match_arg_helper):
(md_apply_fix): Add R_LARCH_64_PCREL.
* testsuite/gas/loongarch/64_pcrel.d: New test.
* testsuite/gas/loongarch/64_pcrel.s: New test.
include/ChangeLog:
* elf/loongarch.h (RELOC_NUMBER): Add R_LARCH_64_PCREL.
ld/ChangeLog:
* testsuite/ld-loongarch-elf/ld-loongarch-elf.exp: Add test.
* testsuite/ld-loongarch-elf/64_pcrel.d: New test.
* testsuite/ld-loongarch-elf/64_pcrel.s: New test.
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Because _bfd_read_unsigned_leb128 is hidden visibility, so it can't
be referenced out of shared object.
The new function loongarch_get_uleb128_length just used to call
_bfd_read_unsigned_leb128.
bfd/ChangeLog:
* elfxx-loongarch.c (loongarch_get_uleb128_length): New function.
* elfxx-loongarch.h (loongarch_get_uleb128_length): New function.
gas/ChangeLog:
* config/tc-loongarch.c (md_apply_fix): Use
loongarch_get_uleb128_length.
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Add relax support and related relocs in bfd.
bfd/ChangeLog:
* bfd-in2.h: Add relocs related to relax.
* elfnn-loongarch.c (struct loongarch_elf_link_hash_table): New integer
pointer (data_segment_phase) to monitor the data segment phase.
(loongarch_elf_check_relocs): Swap B21/B26 reloc sequence.
(loongarch_elf_adjust_dynamic_symbol): Fix code format.
(loongarch_reloc_rewrite_imm_insn): Fix function call.
(perform_relocation): Handle new relocs related to relax.
(RELOCATE_CALC_PC32_HI20): Fix code format.
(RELOCATE_CALC_PC64_HI32): Likewise.
(loongarch_elf_relocate_section): Handle new relocs related to relax.
(loongarch_relax_delete_bytes): New function.
(loongarch_relax_pcala_addi): Likewise.
(loongarch_relax_pcala_ld): Likewise.
(bfd_elfNN_loongarch_set_data_segment_info): Likewise.
(loongarch_relax_align): Likewise.
(loongarch_elf_relax_section): Likewise.
(bfd_elfNN_bfd_relax_section): New macro define.
* elfxx-loongarch.c (reloc_bits): New bfd point parameter.
(reloc_bits_b16): Likewise.
(reloc_bits_b21): Likewise.
(reloc_bits_b26): Likewise.
(loongarch_adjust_reloc_bitsfield): Likewise.
(reloc_bits_pcrel20_s2): New function.
(loongarch_elf_add_sub_reloc): Likewise.
(loongarch_elf_add_sub_reloc_uleb128): Likewise.
(loongarch_write_unsigned_leb128): New function.
* elfxx-loongarch.h (loongarch_adjust_reloc_bitsfield): New bfd point
parameter.
(bfd_elf32_loongarch_set_data_segment_info): New declare.
(bfd_elf64_loongarch_set_data_segment_info): Likewise.
(loongarch_write_unsigned_leb128): Likewise.
* libbfd.h: Add relocs related to relax.
* reloc.c: Add relocs related to relax.
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The newer update-copyright.py fixes file encoding too, removing cr/lf
on binutils/bfdtest2.c and ld/testsuite/ld-cygwin/exe-export.exp, and
embedded cr in binutils/testsuite/binutils-all/ar.exp string match.
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Some R_LARCH_64 in section .eh_frame will to generate
R_LARCH_NONE, we change relocation to R_LARCH_32_PCREL
from R_LARCH_64 in setction .eh_frame and not generate
dynamic relocation for R_LARCH_32_PCREL.
Add New relocate type R_LARCH_32_PCREL for .eh_frame.
include/elf/
loongarch.h
bfd/
bfd/bfd-in2.h
libbfd.h
reloc.c
elfxx-loongarch.c
elfnn-loongarch.c
gas/config/
tc-loongarch.c
binutils/
readelf.c
ld/testsuite/ld-elf/
eh5.d
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Define new reloc types according to linker needs.
include/elf/
loongarch.h
bfd/
bfd-in2.h
libbfd.h
reloc.c
elfnn-loongarch.c
elfxx-loongarch.c
elfxx-loongarch.h
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The "HOWTO size encoding" patch put 1 as the HOWTO size arg for
numerous howtos that are unused, describe dynamic relocs, are markers,
or otherwise are special purpose reloc howtos that don't care about
the size. The idea was to ensure no howto changed by inspecting
object files. Revert those changes, making them zero size.
* coff-alpha.c: Give special purpose reloc howtos a size of zero.
* coff-mcore.c, * elf-hppa.h, * elf-m10300.c, * elf32-arm.c,
* elf32-csky.c, * elf32-m32c.c, * elf32-m68k.c, * elf32-mep.c,
* elf32-mips.c, * elf32-ppc.c, * elf32-rx.c, * elf32-s390.c,
* elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, *elf32-vax.c,
* elf32-xtensa.c, * elf64-alpha.c, * elf64-mips.c,
* elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elfn32-mips.c,
* elfxx-loongarch.c, * elfxx-riscv.c, * elfxx-sparc.c,
* elfxx-tilegx.c, * som.c, * vms-alpha.c: Likewise.
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This changes the HOWTO macro to encode the howto.size field from a
value given in bytes. This of course requires editing all target
uses of HOWTO, a major pain, but makes it a little nicer to specify
new target HOWTOs. Object files before/after this patch are
unchanged in .data and .rodata.
bfd/
* reloc.c (HOWTO_RSIZE): Encode size in bytes.
(EMPTY_HOWTO): Adjust to keep it all zero.
* aout-ns32k.c, * aoutx.h, * coff-alpha.c, * coff-arm.c,
* coff-i386.c, * coff-mcore.c, * coff-mips.c, * coff-rs6000.c,
* coff-sh.c, * coff-tic30.c, * coff-tic4x.c, * coff-tic54x.c,
* coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c,
* elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf32-arc.c,
* elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c,
* elf32-cris.c, * elf32-crx.c, * elf32-csky.c, * elf32-d10v.c,
* elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c,
* elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-gen.c,
* elf32-h8300.c, * elf32-i386.c, * elf32-ip2k.c, * elf32-iq2000.c,
* elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c,
* elf32-m68hc12.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c,
* elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c,
* elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c,
* elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c,
* elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s12z.c,
* elf32-s390.c, * elf32-score.c, * elf32-score7.c,
* elf32-sh-relocs.h, * elf32-spu.c, * elf32-tic6x.c,
* elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c,
* elf32-visium.c, * elf32-wasm32.c, * elf32-xc16x.c,
* elf32-xgate.c, * elf32-xstormy16.c, * elf32-xtensa.c,
* elf32-z80.c, * elf64-alpha.c, * elf64-bpf.c, * elf64-gen.c,
* elf64-mips.c, * elf64-mmix.c, * elf64-nfp.c, * elf64-ppc.c,
* elf64-s390.c, * elf64-x86-64.c, * elfn32-mips.c,
* elfnn-aarch64.c, * elfxx-ia64.c, * elfxx-loongarch.c,
* elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c,
* elfxx-tilegx.c, * mach-o-aarch64.c, * mach-o-arm.c,
* mach-o-i386.c, * mach-o-x86-64.c, * pdp11.c, * reloc.c,
* som.c, * vms-alpha.c: Adjust all uses of HOWTO.
* bfd-in2.h: Regenerate.
include/
* elf/arc-reloc.def: Adjust all uses of HOWTO.
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Replace the magic numbers in gas(tc-loongarch.c) and
bfd(elfnn-loongarch.c) with the functions defined in
the howto table(elfxx-loongarch.c).
gas/
* config/tc-loongarch.c: use functions.
bfd/
* elfnn-loongarch.c: use functions.
* elfxx-loongarch.c: define functions.
* elfxx-loongarch.h
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The result of running etc/update-copyright.py --this-year, fixing all
the files whose mode is changed by the script, plus a build with
--enable-maintainer-mode --enable-cgen-maint=yes, then checking
out */po/*.pot which we don't update frequently.
The copy of cgen was with commit d1dd5fcc38ead reverted as that commit
breaks building of bfp opcodes files.
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2021-10-22 Chenghua Xu <xuchenghua@loongson.cn>
Zhensong Liu <liuzhensong@loongson.cn>
Weinan Liu <liuweinan@loongson.cn>
bfd/
* Makefile.am: Add LoongArch.
* archures.c: Likewise.
* config.bfd: Likewise.
* configure.ac: Likewise.
* cpu-loongarch.c: New.
* elf-bfd.h: Add LoongArch.
* elf.c: Add LoongArch elfcore_grok_xxx.
* elfnn-loongarch.c: New.
* elfxx-loongarch.c: New.
* elfxx-loongarch.h: New.
* reloc.c: Add LoongArch BFD RELOC ENUM.
* targets.c: Add LoongArch target.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* libbfd.h: Regenerate.
* po/BLD-POTFILES.in: Regenerate.
* po/SRC-POTFILES.in: Regenerate.
include/
* elf/common.h: Add NT_LARCH_{CPUCFG,CSR,LSX,LASX}.
* elf/loongarch.h: New.
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