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2020-12-01RISC-V: Support to add implicit extensions.Nelson Chu1-9/+12
We have to parse and add all arch string extensions at first, and then start to add their implicit extensions. That means we can always add arch string extensions at the end of the subset list, but we need to search the right place to add their implicit extensions. For now we follow the following rules to add the implicit extensions, * Add zicsr and zifencei only when the i's version less than 2.1. * Add d, f and zicsr when q is found. * Add f and zicsr when d is found. * Add zicsr when f is found. Besides, we do not add the implicit extensions if they are already added in the subset list, or we cannot find their default versions according to the chosen ISA spec. bfd/ * elfnn-riscv.c (riscv_merge_std_ext): Updated since riscv_lookup_subset is changed. * elfxx-riscv.c (riscv_ext_order): New Array used to compare the extensions' order quickly. (riscv_init_ext_order): New function. Init the riscv_ext_order according to the riscv_supported_std_ext and parse_config[i].class automatically. (riscv_compare_subsets): New function. Similar to the strcmp, but compare the subsets with the specific order. (riscv_lookup_subset): Return TRUE and set `current` to the subset if it is found. Otherwise, return FALSE and set `current` to the place where we should insert the subset. (riscv_add_implicit_subset): New function. Search the list first, and then find the right place to add the implicit_subset. (riscv_parse_add_subset): Since We have to add all arch string extensions first, and then start to add their implicit extensions. We can add arch string extensions in order by the original riscv_add_subset, and then add the implicit subsets by the riscv_add_implicit_subset. Besides, do not add the implicit extensions if we failed to find their default versions. (riscv_parse_std_ext): Updated. (riscv_parse_add_implicit_subsets): New function. Add all implicit extensions according to the arch string extensions. (riscv_parse_subset): Call riscv_init_ext_order and riscv_parse_add_implicit_subsets, before and after parsing the arch string. Remove parts of the ISA conflict checking since the implicit extensions are added. * elfxx-riscv.h (riscv_lookup_subset): Updated. gas/ * config/tc-riscv.c (riscv_subset_supports): Updated. * testsuite/gas/riscv/march-imply-i2p0.d: New testcase. Need to add the implicit zicsr and zifencei when i's version less than 2.1. * testsuite/gas/riscv/march-imply-i2p1.d: New testcase. * testsuite/gas/riscv/march-imply-d.d: Likewise. * testsuite/gas/riscv/march-imply-f.d: Likewise. * testsuite/gas/riscv/march-imply-q.d: Likewise. * testsuite/gas/riscv/march-fail-rv32iq.l: Updated. * testsuite/gas/riscv/march-fail-rv32id.d: Removed. * testsuite/gas/riscv/march-fail-rv32id.l: Likewise. * testsuite/gas/riscv/march-fail-rv64iq.d: Likewise. * testsuite/gas/riscv/march-fail-rv64iq.l: Likewise.
2020-11-21RISC-V: Relax PCREL to GPREL while doing other relaxations is dangerous.Nelson Chu1-13/+18
I get the feedback recently that enable linker relaxations may fail to build some program. Consider the following case, .text foo: addi a0, a0, %pcrel_lo(.L2) call foo .L1: auipc a1, %pcrel_hi(data_g) addi a1, a1, %pcrel_lo(.L1) lui a2, %hi(data_g) addi a2, a2, %lo(data_g) lui a3, %tprel_hi(data_t) add a3, a3, tp, %tprel_add(data_t) addi a3, a3, %tprel_lo(data_t) .L2: auipc a0, %pcrel_hi(data_g) .data .word 0x0 .global data_g data_g: .word 0x1 .section .tbss data_t: .word 0x0 The current ld reports `dangerous relocation error` when doing the pcgp relaxation, test.o: in function `foo': (.text+0x0): dangerous relocation: %pcrel_lo missing matching %pcrel_hi The .L2 auipc should not be removed since it is behind the corresponding addi, so we record the information in the pcgp_relocs table to avoid removing the auipc later. But current ld still remove it since we do not update the pcgp_relocs table while doing other relaxations. I have two solutions to fix the problem, 1. Update the pcgp_relocs table once we actually delete the code. 2. Add new relax pass to do the pcgp relaxations At first I tried to do the first solution, and we need to update at least three information - hi_sec_off of riscv_pcgp_lo_reloc, hi_sec_off and hi_addr (symbol value) of riscv_pcgp_hi_reloc. Update the hi_sec_off is simple, but it is more complicate to update the symbol value, since we almost have to do parts the same works of _bfd_riscv_relax_call again in the riscv_relax_delete_bytes to get the correct symbol value. Compared with the first solution, the second one is more intuitive and simple. We add a new relax pass to do the pcgp relaxations later, so we will get all the information correctly in the _bfd_riscv_relax_call, including the symbol value, without changing so much code. I do not see any penalty by adding a new relax pass for now, so it should be fine to delay the pcgp relaxations. Besides, I have pass all riscv-gnu-toolchain regressions for this patch. bfd/ * elfnn-riscv.c (_bfd_riscv_relax_section): Add a new relax pass to do the pcgp relaxation later, after the lui and call relaxations, but before the delete and alignment relaxations. ld/ * emultempl/riscvelf.em (riscv_elf_before_allocation): Change link_info.relax_pass from 3 to 4. * testsuite/ld-riscv-elf/pcgp-relax.d: New testcase. * testsuite/ld-riscv-elf/pcgp-relax.s: Likewise. * testsuite/ld-riscv-elf/ld-riscv-elf.exp: Updated.
2020-10-16RISC-V: Fix that IRELATIVE relocs may be inserted to the wrong place.Nelson Chu1-7/+39
For the ifunc symbol, which is referenced by GOT rather than PLT relocs, we should add the dynamic reloc (usually IRELATIVE) into the .rel.iplt when generating the static executable. But if we use riscv_elf_append_rela to add the dynamic relocs into .rela.iplt, this may cause the overwrite problem. The reason is that we don't handle the `reloc_index` of .rela.iplt, but the riscv_elf_append_rela adds the relocs to the place that are calculated from the reloc_index (in seqential). Therefore, we may overwrite the dynamic relocs when the `reloc_index` of .rela.iplt isn't handled correctly. One solution is that we can add these dynamic relocs (GOT ifunc) from the last of .rela.iplt section. But I'm not sure if it is the best way. bfd/ * elfnn-riscv.c (riscv_elf_link_hash_table): Add last_iplt_index. (riscv_elf_size_dynamic_sections): Initialize the last_iplt_index. (riscv_elf_relocate_section): Use riscv_elf_append_rela. (riscv_elf_finish_dynamic_symbol): If the use_elf_append_rela is false, then we should add the dynamic relocs from the last of the .rela.iplt, and don't use the riscv_elf_append_rela to add. ld/ * testsuite/ld-riscv-elf/ifunc-plt-got-overwrite.s: New testcase. * testsuite/ld-riscv-elf/ifunc-plt-got-overwrite.d: Likewise. * testsuite/ld-riscv-elf/ifunc-plt-got-overwrite-exe.rd: Likewise. * testsuite/ld-riscv-elf/ifunc-plt-got-overwrite-pic.rd: Likewise. * testsuite/ld-riscv-elf/ifunc-plt-got-overwrite-pie.rd: Likewise. * testsuite/ld-riscv-elf/ld-riscv-elf.exp: Updated.
2020-10-16RISC-V: Support GNU indirect functions.Nelson Chu1-47/+678
Generally, glibc dynamic linker should have two ways to deal with ifunc - one is to handle the IRELATIVE relocations for the non-preemtive ifunc symbols, the other is to handle the R_RISCV_32/64 and R_RISCV_JUMP_SLOT relocations with the STT_IFUNC preemtive symbols. No matter which method is used, both of them should get the resolved ifunc symbols at runtime. Therefore, linker needs to generate the correct dynamic relocations for ifunc to make sure the the dynamic linker works well. For now, there are thirteen relocations are supported for ifunc in GNU ld, * R_RISCV_CALL and R_RISCV_CALL_PLT: The RISC-V compiler won't generate R_RISCV_JAL directly to jump to an ifunc. Besides, we disable the relaxations for the relocation referenced to ifunc, so just handling the R_RISCV_CALL and R_RISCV_CALL_PLT should be enough. Linker should generate a .plt entry and a .got.plt entry for it, and also needs to insert a dynamic IRELATIVE in the .got.plt enrty, or insert a R_RISCV_JUMP_SLOT when generating shared library. * R_RISCV_PCREL_HI20 and R_RISCV_PCREL_LO12_I/S: LA/LLA pattern with local fPIC ifunc symbol, or any non-PIC ifunc symbol. The PC-relative relocation. The current linker will deal with them in the same way as R_RISCV_CALL_PLT. * R_RISCV_GOT_HI20 and R_RISCV_PCREL_LO12_I/S: LA pattern with global PIC ifunc symbol. Linker should insert a dynamic IRELATIVE in the .got entry, or insert a R_RISCV_32/64 when generating shared library. * R_RISCV_32 and R_RISCV_64: Store the ifunc symbol into the data section. Linker should insert a dynamic IRELATIVE in the data section, or insert a R_RISCV_32/64 when generating shared library. * R_RISCV_HI20 and R_RISCV_LO12_I/S: The LUI + ADDI/LW/SW patterns. The absolute access relocation. The medlow model without the -fPIC compiler option should generate them. The ld ifunc testsuites "Build pr23169a" and "Build pr23169d" need the relocations, they are in the ld/testsuite/ld-ifunc/, and need compiler support. However, we also made some optimizations with reference to x86, * If GOT and PLT relocations refer to the same ifunc symbol when generating pie, then they can actually share a .got entry without creating two entries to store the same value and relocation. * If GOT, PLT and DATA relocations refer to the same ifunc symbol when generating position dependency executable, then linker will fill the address of .plt entry into the corresponding .got entry and data section, without insert any dynamic relocations for the GOT and DATA relocations. For the ifunc testcases, there are three types of them, 1. ifunc-reloc-*: Only check the single type of relocation refers to ifunc symbol. * ifunc-reloc-call: R_RISCV_CALL and R_RISCV_CALL_PLT. * ifunc-reloc-data: R_RISCV_32 and R_RISCV_64. * ifunc-reloc-got: R_RISCV_GOT_HI20 and R_RISCV_PCREL_LO_I/S. * ifunc-reloc-pcrel: R_RISCV_PCREL_HI20 and R_RISCV_PCREL_LO_I/S. 2. ifunc-[nonplt|plt]-*: If we don't have PLT relocs, then don't need to create the PLT and it's .plt entries. * ifunc-nonplt: Combine R_RISCV_GOT_HI20 and R_RISCV_32/64. * ifunc-plt: Combine all ifunc relocations. 3. ifunc-seperate-*: If we link the ifunc caller and resolver into the same module (link the objects), then the results are the same as the ifunc-reloc-* and ifunc-[noplt|plt]-* testcases. Consider the cases that the ifunc callers and resolver are in the different modules, that is, we compile the ifunc resolver to the shared library first, and then link it with the ifunc callers. The output of ifunc callers should be the same as the normal STT_FUNC cases, and the shared ifunc resolver should define the symbols as STT_IFUNC. The R_RISCV_PCREL_HI20 reloc is special. It should be linked and resolved locally, so if the ifunc resolver is defined in other modules (other shared libraries), then the R_RISCV_PCREL_HI20 is unresolvable, and linker should issue an unresolvable reloc error. bfd/ * elfnn-riscv.c: Include "objalloc.h" since we need objalloc_alloc. (riscv_elf_link_hash_table): Add loc_hash_table and loc_hash_memory for local STT_GNU_IFUNC symbols. (riscv_elf_got_plt_val): Removed. (riscv_elf_local_htab_hash, riscv_elf_local_htab_eq): New functions. Use to compare local hash entries. (riscv_elf_get_local_sym_hash): New function. Find a hash entry for local symbol, and create a new one if needed. (riscv_elf_link_hash_table_free): New function. Destroy an riscv elf linker hash table. (riscv_elf_link_hash_table_create): Create hash table for local ifunc. (riscv_elf_check_relocs): Create a fake global symbol to track the local ifunc symbol. Add support to check and handle the relocations reference to ifunc symbols. (allocate_dynrelocs): Let allocate_ifunc_dynrelocs and allocate_local_ifunc_dynrelocs to handle the ifunc symbols if they are defined and referenced in a non-shared object. (allocate_ifunc_dynrelocs): New function. Allocate space in .plt, .got and associated reloc sections for ifunc dynamic relocs. (allocate_local_ifunc_dynrelocs): Likewise, but for local ifunc dynamic relocs. (riscv_elf_relocate_section): Add support to handle the relocation referenced to ifunc symbols. (riscv_elf_size_dynamic_sections): Updated. (riscv_elf_adjust_dynamic_symbol): Updated. (riscv_elf_finish_dynamic_symbol): Finish up the ifunc handling, including fill the PLT and GOT entries for ifunc symbols. (riscv_elf_finish_local_dynamic_symbol): New function. Called by riscv_elf_finish_dynamic_symbol to handle the local ifunc symbols. (_bfd_riscv_relax_section): Don't do the relaxation for ifunc. * elfxx-riscv.c: Add R_RISCV_IRELATIVE. * configure.ac: Link elf-ifunc.lo to use the generic ifunc support. * configure: Regenerated. include/ * elf/riscv.h: Add R_RISCV_IRELATIVE to 58. ld/ * emulparams/elf32lriscv-defs.sh: Add IREL_IN_PLT. * testsuite/ld-ifunc/ifunc.exp: Enable ifunc tests for RISC-V. * testsuite/ld-riscv-elf/ld-riscv-elf.exp (run_dump_test_ifunc): New dump test for ifunc. There are two arguments, 'target` and `output`. The `target` is rv32 or rv64, and the `output` is used to choose which output you want to test (exe, pie or .so). * testsuite/ld-riscv-elf/ifunc-reloc-call-01.s: New testcase. * testsuite/ld-riscv-elf/ifunc-reloc-call-01.d: Likewise. * testsuite/ld-riscv-elf/ifunc-reloc-call-01-exe.rd: Likewise. * testsuite/ld-riscv-elf/ifunc-reloc-call-01-pic.rd: Likewise. * testsuite/ld-riscv-elf/ifunc-reloc-call-01-pie.rd: Likewise. * testsuite/ld-riscv-elf/ifunc-reloc-call-02.s: Likewise. * testsuite/ld-riscv-elf/ifunc-reloc-call-02.d: Likewise. * testsuite/ld-riscv-elf/ifunc-reloc-call-02-exe.rd: Likewise. * testsuite/ld-riscv-elf/ifunc-reloc-call-02-pic.rd: Likewise. * testsuite/ld-riscv-elf/ifunc-reloc-call-02-pie.rd: Likewise. * testsuite/ld-riscv-elf/ifunc-reloc-data.s: Likewise. * testsuite/ld-riscv-elf/ifunc-reloc-data.d: Likewise. * testsuite/ld-riscv-elf/ifunc-reloc-data-exe.rd: Likewise. * testsuite/ld-riscv-elf/ifunc-reloc-data-pic.rd: Likewise. * testsuite/ld-riscv-elf/ifunc-reloc-data-pie.rd: Likewise. * testsuite/ld-riscv-elf/ifunc-reloc-got.s: Likewise. * testsuite/ld-riscv-elf/ifunc-reloc-got.d: Likewise. * testsuite/ld-riscv-elf/ifunc-reloc-got-exe.rd: Likewise. * testsuite/ld-riscv-elf/ifunc-reloc-got-pic.rd: Likewise. * testsuite/ld-riscv-elf/ifunc-reloc-got-pie.rd: Likewise. * testsuite/ld-riscv-elf/ifunc-reloc-pcrel.s: Likewise. * testsuite/ld-riscv-elf/ifunc-reloc-pcrel.d: Likewise. * testsuite/ld-riscv-elf/ifunc-reloc-pcrel-exe.rd: Likewise. * testsuite/ld-riscv-elf/ifunc-reloc-pcrel-pic.rd: Likewise. * testsuite/ld-riscv-elf/ifunc-reloc-pcrel-pie.rd: Likewise. * testsuite/ld-riscv-elf/ifunc-nonplt.s: Likewise. * testsuite/ld-riscv-elf/ifunc-nonplt.d: Likewise. * testsuite/ld-riscv-elf/ifunc-nonplt-exe.rd: Likewise. * testsuite/ld-riscv-elf/ifunc-nonplt-pic.rd: Likewise. * testsuite/ld-riscv-elf/ifunc-nonplt-pie.rd: Likewise. * testsuite/ld-riscv-elf/ifunc-plt-01.s: Likewise. * testsuite/ld-riscv-elf/ifunc-plt-01.d: Likewise. * testsuite/ld-riscv-elf/ifunc-plt-01-exe.rd: Likewise. * testsuite/ld-riscv-elf/ifunc-plt-01-pic.rd: Likewise. * testsuite/ld-riscv-elf/ifunc-plt-01-pie.rd: Likewise. * testsuite/ld-riscv-elf/ifunc-plt-02.s: Likewise. * testsuite/ld-riscv-elf/ifunc-plt-02.d: Likewise. * testsuite/ld-riscv-elf/ifunc-plt-02-exe.rd: Likewise. * testsuite/ld-riscv-elf/ifunc-plt-02-pic.rd: Likewise. * testsuite/ld-riscv-elf/ifunc-plt-02-pie.rd: Likewise. * testsuite/ld-riscv-elf/ifunc-seperate-resolver.s: Likewise. * testsuite/ld-riscv-elf/ifunc-seperate-caller.s: Likewise. * testsuite/ld-riscv-elf/ifunc-seperate-exe.d: Likewise. * testsuite/ld-riscv-elf/ifunc-seperate-pic.d: Likewise. * testsuite/ld-riscv-elf/ifunc-seperate-pie.d: Likewise. * testsuite/ld-riscv-elf/ifunc-seperate-caller-pcrel.s: Likewise. * testsuite/ld-riscv-elf/ifunc-seperate-pcrel-pic.d: Likewise. * testsuite/ld-riscv-elf/ifunc-seperate-pcrel-pie.d: Likewise.
2020-09-03RISC-V: Minor cleanup and typos when merging elf attributes.Nelson Chu1-12/+12
bfd/ * elfnn-riscv.c (riscv_i_or_e_p): Minor cleanup for warnings/errors. (riscv_merge_std_ext): Likewise. (riscv_merge_arch_attr_info): Likewise. (riscv_merge_attributes): Likewise and fix comment typos. ld/ * testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-01.d: Remove the useless `warnings` keywords. * testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-02.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-03.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-04.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-05.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-06.d: Likewise.
2020-09-03RISC-V: Report warnings rather than errors for the mis-matched ISA versions.Nelson Chu1-32/+39
Same as the privileged spec attributes check - different ISA versions should be compatible, unless there are some known conflicts. Therefore, we should allow to link objects with different ISA versions, and update the output ISA versions once the corresponding input ones are newer. But it's better to also warn people that the conflicts may happen when the ISA versions are mis-matched. bfd/ * elfnn-riscv.c (riscv_version_mismatch): Change the return type from void to bfd_boolean. Report warnings rather than errors when the ISA versions are mis-matched. Afterwards, remember to update the output ISA versions to the newest ones. (riscv_merge_std_ext): Allow to link objects with different standard ISA versions. Try to add output ISA versions to merged_subsets first. (riscv_merge_multi_letter_ext): Likewise. But for standard additional ISA and non-standard ISA versions. ld/ * testsuite/ld-riscv-elf/attr-merge-arch-failed-01.d: Update the message from error to warning. * testsuite/ld-riscv-elf/attr-merge-arch-failed-02.d: New testcases. * testsuite/ld-riscv-elf/attr-merge-arch-failed-02a.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-arch-failed-02b.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-arch-failed-02c.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-arch-failed-02d.s: Likewise. * testsuite/ld-riscv-elf/ld-riscv-elf.exp: Updated.
2020-09-03RISC-V: Improve the error message for the mis-matched ISA versions.Kito Cheng1-1/+1
Consider the updated attr-merge-arch-failed-01.d testcase. Extension A's version are mis-matched between attr-merge-arch-failed-01a.s and attr-merge-arch-failed-01b.s. But the old binutils reports that the mis-matched extension is M rather than A. This commit is used to fix the wrong mis-matched error message. Besides, when parsing the arch string in the riscv_parse_subset, it shouldn't be NULL or empty. However, it might be empty when we failed to merge the arch string in the riscv_merge_attributes. Since we should already issue the correct error message in another side, and the message - ISA string must begin with rv32 or rv64 - is meaninglesss when the arch string is empty, so do not issue it. bfd/ * elfnn-riscv.c (riscv_merge_std_ext): Fix to report the correct error message when the versions of extension are mis-matched. * elfxx-riscv.c (riscv_parse_subset): Don't issue the error when the string is empty. ld/ * testsuite/ld-riscv-elf/attr-merge-arch-failed-01.d: Updated. * testsuite/ld-riscv-elf/attr-merge-arch-failed-01a.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-arch-failed-01b.s: Likewise.
2020-08-31PR26493 UBSAN: elfnn-riscv.c left shift of negative valueAlan Modra1-3/+3
include/ PR 26493 * opcode/riscv.h (OP_MASK_CSR, OP_MASK_CUSTOM_IMM) (OP_MASK_FUNCT7, OP_MASK_RS3): Make unsigned. bfd/ PR 26493 * elfnn-riscv.c (riscv_make_plt_header): Cast PLT_HEADER_SIZE to unsigned when using with RISCV_ITYPE. (_bfd_riscv_relax_call): Use an unsigned foff.
2020-08-28RISC-V: Treat R_RISCV_CALL and R_RISCV_CALL_PLT as the same in check_relocs.Nelson Chu1-9/+10
In fact, we can treate these two relocation as the same one in the riscv_elf_check_relocs. I have heard that RISC-V lld had made this improvement, and so had GNU AARCH64, they only need R_AARCH64_CALL26 for calls rather than two seperate relocations. Beside, the following PLT issue for RISC-V 32-bit glibc seems to be fixed by applying at least this patch. <https://sourceware.org/pipermail/libc-alpha/2020-August/117214.html> I have ran the toolchain regression, and everything seems fine for now. bfd/ * elfnn-riscv.c (riscv_elf_check_relocs): Treat R_RISCV_CALL and R_RISCV_CALL_PLT as the same in the riscv_elf_check_relocs. (riscv_elf_relocate_section): Remove the R_RISCV_CALL for the unresolved reloc checks. ld/ testsuite/ld-riscv-elf/lib-nopic-01a.s: Use R_RISCV_JAL rather than R_RISCV_CALL. testsuite/ld-riscv-elf/lib-nopic-01b.d: Likewise. testsuite/ld-riscv-elf/lib-nopic-01b.s: Likewise.
2020-08-25elf_hash_table_id accessAlan Modra1-2/+3
* elf-m10300.c (elf32_mn10300_hash_table): Test is_elf_hash_table before accessing elf_hash_table_id. * elf32-arc.c (elf_arc_hash_table): Likewise. * elf32-arm.c (elf32_arm_hash_table): Likewise. * elf32-avr.c (avr_link_hash_table): Likewise. * elf32-bfin.c (bfinfdpic_hash_table): Likewise. * elf32-cris.c (elf_cris_hash_table): Likewise. * elf32-csky.c (csky_elf_hash_table): Likewise. * elf32-frv.c (frvfdpic_hash_table): Likewise. * elf32-hppa.c (hppa_link_hash_table): Likewise. * elf32-lm32.c (lm32_elf_hash_table): Likewise. * elf32-m32r.c (m32r_elf_hash_table): Likewise. * elf32-m68hc1x.h (m68hc11_elf_hash_table): Likewise. * elf32-m68k.c (elf_m68k_hash_table): Likewise. * elf32-metag.c (metag_link_hash_table): Likewise. * elf32-microblaze.c (elf32_mb_hash_table): Likewise. * elf32-nds32.h (nds32_elf_hash_table): Likewise. * elf32-or1k.c (or1k_elf_hash_table): Likewise. * elf32-s390.c (elf_s390_hash_table): Likewise. * elf32-sh.c (sh_elf_hash_table): Likewise. * elf32-spu.c (spu_hash_table): Likewise. * elf32-tilepro.c (tilepro_elf_hash_table): Likewise. * elf32-xtensa.c (elf_xtensa_hash_table): Likewise. * elf64-alpha.c (alpha_elf_hash_table): Likewise. * elf64-hppa.c (hppa_link_hash_table): Likewise. * elf64-ia64-vms.c (elf64_ia64_hash_table): Likewise. * elf64-s390.c (elf_s390_hash_table): Likewise. * elfnn-ia64.c (elfNN_ia64_hash_table): Likewise. * elfnn-riscv.c (riscv_elf_hash_table): Likewise. * elfxx-mips.c (mips_elf_hash_table): Likewise. * elfxx-sparc.h (_bfd_sparc_elf_hash_table): Likewise. * elfxx-tilegx.c (tilegx_elf_hash_table): Likewise.
2020-07-30elf: Add sym_cache to elf_link_hash_tableH.J. Lu1-4/+1
Since many ELF backends have sym_cache to their link hash tables, add sym_cache to elf_link_hash_table. Also use sdynbss and srelbss in elf_link_hash_table. * elf-bfd.h (sym_cache): Moved before elf_link_hash_table. (elf_link_hash_table): Add sym_cache. * elf32-arm.c (elf32_arm_link_hash_table): Remove sym_cache. (elf32_arm_check_relocs): Updated. (elf32_arm_size_dynamic_sections): Likewise. * elf32-bfin.c (bfin_link_hash_table): Removed. (bfin_link_hash_newfunc): Updated. (bfin_hash_table): Removed. * elf32-csky.c (csky_elf_link_hash_table): Remove sym_cache. (csky_elf_check_relocs): Updated. * elf32-hppa.c (elf32_hppa_link_hash_table): Remove sym_cache. (elf32_hppa_check_relocs): Updated. * elf32-i386.c (elf_i386_tls_transition): Updated. (elf_i386_convert_load_reloc): Likewise. (elf_i386_check_relocs): Likewise. * elf32-m32r.c (elf_m32r_link_hash_table): Removed. (m32r_elf_hash_table): Updated. (m32r_elf_link_hash_table_create): Likewise. (m32r_elf_create_dynamic_sections): Likewise. (m32r_elf_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (m32r_elf_size_dynamic_sections): Likewise. (m32r_elf_relocate_section): Likewise. (m32r_elf_finish_dynamic_symbol): Likewise. (m32r_elf_check_relocs): Likewise. * elf32-m68hc1x.h (m68hc11_elf_link_hash_table): Remove sym_cache. * elf32-m68k.c (elf_m68k_link_hash_table): Likewise. (elf_m68k_check_relocs): Updated. * elf32-metag.c (elf_metag_link_hash_table): Remove sym_cache. (elf_metag_check_relocs): Updated. * elf32-microblaze.c (elf32_mb_link_hash_table): Remove sym_sec. (microblaze_elf_check_relocs): Updated. * elf32-nds32.c (nds32_elf_link_hash_table_create): Likewise. (nds32_elf_create_dynamic_sections): Likewise. (nds32_elf_adjust_dynamic_symbol): Likewise. (nds32_elf_check_relocs): Likewise. * elf32-nds32.h (elf_nds32_link_hash_table): Remove sdynbss, srelbss and aym_cache. * elf32-nios2.c (elf32_nios2_link_hash_table): Remove sym_cache. (nios2_elf32_check_relocs): Updated. * elf32-or1k.c (elf_or1k_link_hash_table): Remove sym_sec. (or1k_elf_check_relocs): Updated. * elf32-ppc.c (ppc_elf_check_relocs): Remove sym_cache. (ppc_elf_check_relocs): Updated. * elf32-s390.c (elf_s390_link_hash_table): Remove sym_cache. (elf_s390_check_relocs): Updated. (elf_s390_finish_dynamic_sections): Likewise. * elf32-sh.c (elf_sh_link_hash_table): Remove sdynbss, srelbss and aym_cache. (sh_elf_create_dynamic_sections): Updated. (sh_elf_adjust_dynamic_symbol): Likewise. (sh_elf_size_dynamic_sections): Likewise. (sh_elf_check_relocs): Likewise. * elf32-tic6x.c (elf32_tic6x_link_hash_table): Remove sym_cache. (elf32_tic6x_check_relocs): Updated. * elf32-tilepro.c (tilepro_elf_link_hash_table): Removed. (tilepro_elf_hash_table): Updated. (tilepro_elf_link_hash_table_create): Likewise. (tilepro_elf_check_relocs): Likewise. (tilepro_elf_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (tilepro_elf_size_dynamic_sections): Likewise. (tilepro_elf_relocate_section): Likewise. (tilepro_elf_finish_dynamic_symbol): Likewise. (tilepro_finish_dyn): Likewise. (tilepro_elf_finish_dynamic_sections): Likewise. * elf64-ppc.c (ppc_link_hash_table): Remove sym_cache. (ppc64_elf_before_check_relocs): Updated. (ppc64_elf_check_relocs): Likewise. * elf64-s390.c (elf_s390_link_hash_table): Remove sym_cache. (elf_s390_check_relocs): Updated. (elf_s390_relocate_section): Likewise. (elf_s390_finish_dynamic_sections): Likewise. * elf64-x86-64.c (elf_x86_64_tls_transition): Likewise. (elf_x86_64_check_relocs): Likewise. * elfnn-aarch64.c (elf_aarch64_link_hash_table): Remove sym_cache. (elfNN_aarch64_check_relocs): Updated. * elfnn-riscv.c (riscv_elf_link_hash_table): Remove sym_cache. (riscv_elf_check_relocs): Updated. * elfxx-mips.c (mips_elf_link_hash_table): Remove sym_cache. (mips_elf_resolve_got_page_ref): Updated. * elfxx-sparc.c (_bfd_sparc_elf_check_relocs): Likewise. * elfxx-sparc.h (_bfd_sparc_elf_link_hash_table): Remove sym_cache. * elfxx-tilegx.c (tilegx_elf_link_hash_table): Likewise. (tilegx_elf_check_relocs): Updated. * elfxx-x86.h (elf_x86_link_hash_table): Remove sym_cache.
2020-06-23ELF: Add _bfd_elf_add_dynamic_tagsH.J. Lu1-45/+1
All ELF backends with shared library support need to add dynamic tags. Add dt_pltgot_required and dt_jmprel_required to elf_link_hash_table to indicate that DT_PLTGOT and DT_JMPREL are required dynamic tags. 1. Add _bfd_elf_add_dynamic_tags to add common dynamic tags. 2. Add _bfd_elf_maybe_vxworks_add_dynamic_tags to add common VxWorks dynamic tags. * elf-bfd.h (elf_link_hash_table): Add dt_pltgot_required and dt_jmprel_required. (_bfd_elf_add_dynamic_tags): New. * elf-m10300.c (_bfd_mn10300_elf_size_dynamic_sections): Call _bfd_elf_add_dynamic_tags. * elf32-arc.c (elf_arc_size_dynamic_sections): Likewise. * elf32-bfin.c (elf32_bfinfdpic_size_dynamic_sections): Likewise. * elf32-cr16.c (_bfd_cr16_elf_size_dynamic_sections): Likewise. * elf32-frv.c (elf32_frvfdpic_size_dynamic_sections): Likewise. * elf32-lm32.c (lm32_elf_size_dynamic_sections): Likewise. * elf32-m32r.c (m32r_elf_size_dynamic_sections): Likewise. * elf32-m68k.c (elf_m68k_size_dynamic_sections): Likewise. * elf32-microblaze.c (microblaze_elf_size_dynamic_sections): Likewise. * elf32-nds32.c (nds32_elf_size_dynamic_sections): Likewise. * elf32-nios2.c (nios2_elf32_size_dynamic_sections): Likewise. * elf32-or1k.c (or1k_elf_size_dynamic_sections): Likewise. * elf32-s390.c (elf_s390_size_dynamic_sections): Likewise. * elf32-tilepro.c (tilepro_elf_size_dynamic_sections): Likewise. * elf32-vax.c (elf_vax_size_dynamic_sections): Likewise. * elf64-alpha.c (elf64_alpha_size_dynamic_sections): Likewise. * elf64-s390.c (elf_s390_size_dynamic_sections): Likewise. * elfnn-aarch64.c (elfNN_aarch64_size_dynamic_sections): Likewise. * elfnn-riscv.c (riscv_elf_size_dynamic_sections): Likewise. * elfxx-tilegx.c (tilegx_elf_size_dynamic_sections): Likewise. * elf32-arm.c (elf32_arm_size_dynamic_sections): Call _bfd_elf_maybe_vxworks_add_dynamic_tags. * elf32-ppc.c (ppc_elf_size_dynamic_sections): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_size_dynamic_sections): Likewise. * elfxx-x86.c (_bfd_x86_elf_link_hash_table_create): Likewise. (_bfd_x86_elf_size_dynamic_sections): Likewise. * elfxx-x86.h (elf_x86_link_hash_table): Remove dt_reloc, dt_reloc_sz and dt_reloc_ent. * elf-vxworks.c (_bfd_elf_maybe_vxworks_add_dynamic_tags): New. * elf-vxworks.h (_bfd_elf_maybe_vxworks_add_dynamic_tags): Likewise. * elf32-hppa.c (elf32_hppa_link_hash_table_create): Set etab.dt_pltgot_required. (elf32_hppa_size_dynamic_sections): Call _bfd_elf_add_dynamic_tags. * elf32-metag.c (elf_metag_link_hash_table_create): Set etab.dt_pltgot_required. (elf_metag_size_dynamic_sections): Call _bfd_elf_add_dynamic_tags. * elf32-sh.c (sh_elf_link_hash_table_create): Set root.dt_pltgot_required for FDPIC output. (sh_elf_size_dynamic_sections): Call _bfd_elf_maybe_vxworks_add_dynamic_tags. * elf32-xtensa.c (elf_xtensa_link_hash_table_create): Set elf.dt_pltgot_required. (elf_xtensa_size_dynamic_sections): Call _bfd_elf_add_dynamic_tags. * elf64-hppa.c (elf64_hppa_hash_table_create): Set root.dt_pltgot_required. (elf64_hppa_size_dynamic_sections): Call _bfd_elf_add_dynamic_tags. * elfnn-ia64.c (elfNN_ia64_hash_table_create): Set root.dt_pltgot_required. (elfNN_ia64_size_dynamic_sections): Set root.dt_jmprel_required for rel_pltoff_sec. Call _bfd_elf_add_dynamic_tags. * elflink.c (_bfd_elf_add_dynamic_tags): New.
2020-06-22RISC-V: Report warning when linking the objects with different priv specs.Nelson Chu1-11/+36
We do know some conflicts among different privileged specs. For linker, the safest approach is that don't allow the object linked with others which may cause conflicts. But this may cause inconvenience since not all objects with conflicting priv specs are linked will cause problems. But it is hard to know the detailed conflict cases for linker, so we probably need a option to tell linker that we do know there are no conflicts, or we are willing to take risks to link the objects with conflicted priv specs. But the option is still under discussion. Therefore, we can report warnings rather than errors when linking the objects with conflicted priv specs. This not only makes the linker more flexible, but also warns people that the conflicts may happen. We also need to update the output priv spec version once the input priv spec is newer. bfd/ * elfxx-riscv.c (struct priv_spec_t priv_specs[]): Move them from opcodes/riscv-opc.c to bfd/elfxx-riscv.c, since we need it in linker. (riscv_get_priv_spec_class): Likewise. (riscv_get_priv_spec_name): Likewise. (riscv_get_priv_spec_class_from_numbers): New function, convert the version numbers into string, then call riscv_get_priv_spec_class to get the priv spec class. * elfxx-riscv.h (riscv_get_priv_spec_class): Move forward declaration from include/opcode/riscv.h to bfd/elfxx-riscv.h. (riscv_get_priv_spec_name): Likewise. (riscv_get_priv_spec_class_from_numbers): New forward declaration. (opcode/riscv.h): Include it in the header rather than elfxx-riscv.c. * elfnn-riscv.c (riscv_merge_attributes): Get the priv spec classes of input and output objects form their priv spec attributes by riscv_get_priv_spec_class_from_numbers. Report warning rather than errors when linking objects with differnet priv spec versions. We do know v1.9.1 may have conflicts to other versions, so report the warning, too. After that, update the output priv spec version to the newest one so far. gas/ * config/tc-riscv.c (buf_size, buf): Remove the unused variables. (riscv_set_default_priv_spec): Get the priv spec version from the priv spec attributes by riscv_get_priv_spec_class_from_numbers. include/ * opcode/riscv.h (riscv_get_priv_spec_class): Move the function forward declarations to bfd/elfxx-riscv.h. (riscv_get_priv_spec_name): Likewise. opcodes/ * riscv-opc.c: Move the structures and functions to bfd/elfxx-riscv.c. * riscv-dis.c: Include elfxx-riscv.h. ld/ * testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-01.d: Updated. * testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-02.d: Updated. * testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-03.d: Updated. * testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-04.d: Updated. * testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-05.d: Updated. * testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-06.d: Updated.
2020-06-22RISC-V: Don't assume the priv attributes are in order when handling them.Nelson Chu1-37/+36
There is no guarantee that the priv attributes should be defined in order. Therefore, we shouldn't have the order assumption when handling them in the riscv_merge_attributes. Set priv_attrs_merged to TRUE if we have handled all of the priv attributes. bfd/ * elfnn-riscv.c (riscv_merge_attributes): Once we meet one of the priv attributes, we will check the conflicts for all of them (major, minor and revision), and then set the priv_attrs_merged to TRUE to indicate that we have handled all of the priv attributes. Remove the unused boolean priv_may_conflict, in_priv_zero and out_priv_zero.
2020-06-05RISC-V: The object without priv spec attributes can be linked with any object.Nelson Chu1-2/+38
bfd/ * elfnn-riscv.c (riscv_merge_attributes): Add new boolean priv_may_conflict, in_priv_zero and out_priv_zero to decide whether the object can be linked according to it's priv attributes. The object without any priv spec attributes can be linked with others. If the first input object doesn't contain any priv attributes, then we need to copy the setting from the next input one. Also report more detailed error messages to user. ld/ * testsuite/ld-riscv-elf/attr-merge-priv-spec.d: Rename to attr-merge-priv-spec-01.d. * testsuite/ld-riscv-elf/attr-merge-priv-spec-c.s: Set priv spec to 1.11. * testsuite/ld-riscv-elf/attr-merge-priv-spec-d.s: Empty priv spec setting. * testsuite/ld-riscv-elf/attr-merge-priv-spec-02.d: New testcase. * testsuite/ld-riscv-elf/attr-merge-priv-spec-03.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-01.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-02.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-03.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-04.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-05.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-06.d: Likewise. * testsuite/ld-riscv-elf/ld-riscv-elf.exp: Updated.
2020-06-03ELF: Consolidate maybe_set_textrelH.J. Lu1-28/+2
All maybe_set_textrel implementations are the same. Consolidate them to a single _bfd_elf_maybe_set_textrel. * elf-bfd.h (_bfd_elf_maybe_set_textrel): New * elf32-arm.c (maybe_set_textrel): Removed. (elf32_arm_size_dynamic_sections): Replace maybe_set_textrel with _bfd_elf_maybe_set_textrel. * elf32-csky.c (maybe_set_textrel): Removed. (csky_elf_size_dynamic_sections): Replace maybe_set_textrel with _bfd_elf_maybe_set_textrel. * elf32-hppa.c (maybe_set_textrel): Removed. (elf32_hppa_size_dynamic_sections): Replace maybe_set_textrel with _bfd_elf_maybe_set_textrel. * elf32-lm32.c (maybe_set_textrel): Removed. (lm32_elf_size_dynamic_sections): Replace maybe_set_textrel with _bfd_elf_maybe_set_textrel. * elf32-m32r.c (maybe_set_textrel): Removed. (m32r_elf_size_dynamic_sections): Replace maybe_set_textrel with _bfd_elf_maybe_set_textrel. * elf32-metag.c (maybe_set_textrel): Removed. (elf_metag_size_dynamic_sections): Replace maybe_set_textrel with _bfd_elf_maybe_set_textrel. * elf32-nds32.c (maybe_set_textrel): Removed. (nds32_elf_size_dynamic_sections): Replace maybe_set_textrel with _bfd_elf_maybe_set_textrel. * elf32-or1k.c (maybe_set_textrel): Removed. (or1k_elf_size_dynamic_sections): Replace maybe_set_textrel with _bfd_elf_maybe_set_textrel. * elf32-ppc.c (maybe_set_textrel): Removed. (ppc_elf_size_dynamic_sections): Replace maybe_set_textrel with _bfd_elf_maybe_set_textrel. * elf32-s390.c (maybe_set_textrel): Removed. (elf_s390_size_dynamic_sections): Replace maybe_set_textrel with _bfd_elf_maybe_set_textrel. * elf32-sh.c (maybe_set_textrel): Removed. (sh_elf_size_dynamic_sections): Replace maybe_set_textrel with _bfd_elf_maybe_set_textrel. * elf32-tic6x.c (maybe_set_textrel): Removed. (elf32_tic6x_size_dynamic_sections): Replace maybe_set_textrel with _bfd_elf_maybe_set_textrel. * elf32-tilepro.c (maybe_set_textrel): Removed. (tilepro_elf_size_dynamic_sections): Replace maybe_set_textrel with _bfd_elf_maybe_set_textrel. * elf64-ppc.c (maybe_set_textrel): Removed. (ppc64_elf_size_dynamic_sections): Replace maybe_set_textrel with _bfd_elf_maybe_set_textrel. * elf64-s390.c (maybe_set_textrel): Removed. (elf_s390_size_dynamic_sections): Replace maybe_set_textrel with _bfd_elf_maybe_set_textrel. * elfnn-aarch64.c (maybe_set_textrel): Removed. (elfNN_aarch64_size_dynamic_sections): Replace maybe_set_textrel with _bfd_elf_maybe_set_textrel. * elfnn-riscv.c (maybe_set_textrel): Removed. (riscv_elf_size_dynamic_sections): Replace maybe_set_textrel with _bfd_elf_maybe_set_textrel. * elfxx-sparc.c (maybe_set_textrel): Removed. (_bfd_sparc_elf_size_dynamic_sections): Replace maybe_set_textrel with _bfd_elf_maybe_set_textrel. * elfxx-tilegx.c (maybe_set_textrel): Removed. (tilegx_elf_size_dynamic_sections): Replace maybe_set_textrel with _bfd_elf_maybe_set_textrel. * elfxx-x86.c (maybe_set_textrel): Removed. (_bfd_x86_elf_size_dynamic_sections): Replace maybe_set_textrel with _bfd_elf_maybe_set_textrel. * elflink.c (_bfd_elf_maybe_set_textrel): New.
2020-06-03ELF: Copy dyn_relocs in _bfd_elf_link_hash_copy_indirectH.J. Lu1-31/+0
Copy dyn_relocs in _bfd_elf_link_hash_copy_indirect instead of in each target backend. PR ld/26067 * elf32-arm.c (elf32_arm_copy_indirect_symbol): Don't copy dyn_relocs. * elf32-csky.c (csky_elf_copy_indirect_symbol): Likewise. * elf32-hppa.c (elf32_hppa_copy_indirect_symbol): Likewise. * elf32-metag.c (elf_metag_copy_indirect_symbol): Likewise. * elf32-microblaze.c (microblaze_elf_copy_indirect_symbol): Likewise. * elf32-nds32.c (nds32_elf_copy_indirect_symbol): Likewise. * elf32-nios2.c (nios2_elf32_copy_indirect_symbol): Likewise. * elf32-or1k.c (or1k_elf_copy_indirect_symbol): Likewise. * elf32-s390.c (elf_s390_copy_indirect_symbol): Likewise. * elf32-sh.c (sh_elf_copy_indirect_symbol): Likewise. * elf32-tilepro.c (tilepro_elf_copy_indirect_symbol): Likewise. * elf64-s390.c (elf_s390_copy_indirect_symbol): Likewise. * elfnn-aarch64.c (elfNN_aarch64_copy_indirect_symbol): Likewise. * elfnn-riscv.c (riscv_elf_copy_indirect_symbol): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_copy_indirect_symbol): Likewise. * elfxx-tilegx.c (tilegx_elf_copy_indirect_symbol): Likewise. * elfxx-x86.c (_bfd_x86_elf_copy_indirect_symbol): Likewise. * elf32-lm32.c (lm32_elf_copy_indirect_symbol): Removed. (elf_backend_copy_indirect_symbol): Likewise. * elf32-m32r.c (m32r_elf_copy_indirect_symbol): Removed. (elf_backend_copy_indirect_symbol): Likewise. * elflink.c (_bfd_elf_link_hash_copy_indirect): Copy dyn_relocs.
2020-06-03ELF: Consolidate readonly_dynrelocsH.J. Lu1-19/+2
All readonly_dynrelocs implementations are the same. Consolidate them to a single _bfd_elf_readonly_dynrelocs. PR ld/26067 * elf-bfd.h (_bfd_elf_readonly_dynrelocs): New. * elf32-arm.c (readonly_dynrelocs): Removed. (maybe_set_textrel): Replace readonly_dynrelocs with _bfd_elf_readonly_dynrelocs. * elf32-csky.c (readonly_dynrelocs): Removed. (maybe_set_textrel): Replace readonly_dynrelocs with _bfd_elf_readonly_dynrelocs. * elf32-hppa.c(readonly_dynrelocs): Removed. (alias_readonly_dynrelocs): Replace readonly_dynrelocs with _bfd_elf_readonly_dynrelocs. (maybe_set_textrel): Likewise. * elf32-lm32.c (readonly_dynrelocs): Removed. (lm32_elf_adjust_dynamic_symbol): Replace readonly_dynrelocs with _bfd_elf_readonly_dynrelocs. (maybe_set_textrel): Likewise. * elf32-m32r.c (readonly_dynrelocs): Removed. (m32r_elf_adjust_dynamic_symbol): Replace readonly_dynrelocs with _bfd_elf_readonly_dynrelocs. (maybe_set_textrel): Likewise. * elf32-metag.c (readonly_dynrelocs): Removed. (elf_metag_adjust_dynamic_symbol): Replace readonly_dynrelocs with _bfd_elf_readonly_dynrelocs. (maybe_set_textrel): Likewise. * elf32-microblaze.c (readonly_dynrelocs): Removed. (microblaze_elf_adjust_dynamic_symbol): Replace readonly_dynrelocs with _bfd_elf_readonly_dynrelocs. * elf32-nds32.c (readonly_dynrelocs): Removed. (nds32_elf_adjust_dynamic_symbol): Replace readonly_dynrelocs with _bfd_elf_readonly_dynrelocs. (maybe_set_textrel): Likewise. * elf32-or1k.c (readonly_dynrelocs): Removed. (or1k_elf_adjust_dynamic_symbol): Replace readonly_dynrelocs with _bfd_elf_readonly_dynrelocs. * elf32-ppc.c (readonly_dynrelocs): Removed. (alias_readonly_dynrelocs): Replace readonly_dynrelocs with _bfd_elf_readonly_dynrelocs. (ppc_elf_adjust_dynamic_symbol): Likewise. (maybe_set_textrel): Likewise. * elf32-s390.c (readonly_dynrelocs): Removed. (elf_s390_adjust_dynamic_symbol): Replace readonly_dynrelocs with _bfd_elf_readonly_dynrelocs. (maybe_set_textrel): Likewise. * elf32-sh.c (readonly_dynrelocs): Removed. (sh_elf_adjust_dynamic_symbol): Replace readonly_dynrelocs with _bfd_elf_readonly_dynrelocs. (maybe_set_textrel): Likewise. * elf32-tic6x.c (readonly_dynrelocs): Removed. (maybe_set_textrel): Replace readonly_dynrelocs with _bfd_elf_readonly_dynrelocs. * elf32-tilepro.c (readonly_dynrelocs): Removed. (tilepro_elf_adjust_dynamic_symbol): Replace readonly_dynrelocs with _bfd_elf_readonly_dynrelocs. (maybe_set_textrel): Likewise. * elf64-ppc.c (readonly_dynrelocs): Removed. (alias_readonly_dynrelocs): Replace readonly_dynrelocs with _bfd_elf_readonly_dynrelocs. (ppc64_elf_adjust_dynamic_symbol): Likewise. (maybe_set_textrel): Likewise. * elf64-s390.c (readonly_dynrelocs): Removed. (elf_s390_adjust_dynamic_symbol): Replace readonly_dynrelocs with _bfd_elf_readonly_dynrelocs. (maybe_set_textrel): Likewise. * elflink.c (_bfd_elf_readonly_dynrelocs): New. * elfnn-aarch64.c (readonly_dynrelocs): Removed. (maybe_set_textrel): Replace readonly_dynrelocs with _bfd_elf_readonly_dynrelocs. * elfnn-riscv.c (readonly_dynrelocs): Removed. (riscv_elf_adjust_dynamic_symbol): Replace readonly_dynrelocs with _bfd_elf_readonly_dynrelocs. (maybe_set_textrel): Likewise. * elfxx-sparc.c (readonly_dynrelocs): Removed. (_bfd_sparc_elf_adjust_dynamic_symbol): Replace readonly_dynrelocs with _bfd_elf_readonly_dynrelocs. (maybe_set_textrel): Likewise. * elfxx-tilegx.c (readonly_dynrelocs): Removed. (tilegx_elf_adjust_dynamic_symbol): Replace readonly_dynrelocs with _bfd_elf_readonly_dynrelocs. (maybe_set_textrel): Likewise. * elfxx-x86.c (readonly_dynrelocs): Removed. (maybe_set_textrel): Replace readonly_dynrelocs with _bfd_elf_readonly_dynrelocs. (_bfd_x86_elf_adjust_dynamic_symbol): Likewise.
2020-06-01ELF: Move dyn_relocs to struct elf_link_hash_entryH.J. Lu1-21/+15
All ELF backends with shared library support have /* Track dynamic relocs copied for this symbol. */ struct elf_dyn_relocs *dyn_relocs; in symbol hash entry. Move dyn_relocs to struct elf_link_hash_entry to reduce code duplication. PR ld/26067 * elf-bfd.h (elf_link_hash_entry): Add dyn_relocs after size. * elf-s390-common.c (s390_elf_allocate_ifunc_dyn_relocs): Updated. * elf32-arc.c (elf_arc_link_hash_entry): Remove dyn_relocs. (elf_arc_link_hash_newfunc): Updated. * elf32-arm.c (elf32_arm_link_hash_entry): Remove dyn_relocs. (elf32_arm_link_hash_newfunc): Updated. (elf32_arm_copy_indirect_symbol): Likewise. (elf32_arm_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs_for_symbol): Likewise. * elf32-csky.c (csky_elf_link_hash_entry): Remove dyn_relocs. (csky_elf_link_hash_newfunc): Updated. (csky_allocate_dynrelocs): Likewise. (readonly_dynrelocs): Likewise. (csky_elf_copy_indirect_symbol): Likewise. * elf32-hppa.c (elf32_hppa_link_hash_entry): Remove dyn_relocs. (hppa_link_hash_newfunc): Updated. (elf32_hppa_copy_indirect_symbol): Likewise. (elf32_hppa_hide_symbol): Likewise. (elf32_hppa_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (elf32_hppa_relocate_section): Likewise. * elf32-i386.c (elf_i386_check_relocs): Likewise. * elf32-lm32.c (elf_lm32_link_hash_entry): Removed. (lm32_elf_link_hash_newfunc): Likewise. (lm32_elf_link_hash_table_create): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (lm32_elf_copy_indirect_symbol): Likewise. * elf32-m32r.c (elf_m32r_link_hash_entry): Removed. (m32r_elf_link_hash_newfunc): Likewise. (m32r_elf_link_hash_table_create): Updated. (m32r_elf_copy_indirect_symbol): Likewise. (allocate_dynrelocs): Likewise. * elf32-metag.c (elf_metag_link_hash_entry): Remove dyn_relocs. (metag_link_hash_newfunc): Updated. (elf_metag_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-microblaze.c (elf32_mb_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (microblaze_elf_check_relocs): Likewise. (microblaze_elf_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-nds32.c (elf_nds32_link_hash_entry): Remove dyn_relocs. (nds32_elf_link_hash_newfunc): Updated. (nds32_elf_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (nds32_elf_check_relocs): Likewise. * elf32-nios2.c (elf32_nios2_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (nios2_elf32_copy_indirect_symbol): Likewise. (nios2_elf32_check_relocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-or1k.c (elf_or1k_link_hash_entry): Remove dyn_relocs. (or1k_elf_link_hash_newfunc): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (or1k_elf_copy_indirect_symbol): Likewise. * elf32-ppc.c (ppc_elf_link_hash_entry): Remove dyn_relocs. (ppc_elf_link_hash_newfunc): Updated. (ppc_elf_copy_indirect_symbol): Likewise. (ppc_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (ppc_elf_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (ppc_elf_relocate_section): Likewise. * elf32-s390.c (elf_s390_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (elf_s390_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (elf_s390_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. * elf32-sh.c (elf_sh_link_hash_entry): Remove dyn_relocs. (sh_elf_link_hash_newfunc): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (sh_elf_copy_indirect_symbol): Likewise. (sh_elf_check_relocs): Likewise. * elf32-tic6x.c (elf32_tic6x_link_hash_entry): Removed. (elf32_tic6x_link_hash_newfunc): Likewise. (elf32_tic6x_link_hash_table_create): Updated. (readonly_dynrelocs): Likewise. (elf32_tic6x_check_relocs): Likewise. (elf32_tic6x_allocate_dynrelocs): Likewise. * elf32-tilepro.c (tilepro_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (tilepro_elf_copy_indirect_symbol): Likewise. (tilepro_elf_check_relocs): Likewise. (allocate_dynrelocs): Likewise. * elf64-ppc.c (ppc_link_hash_entry): Remove dyn_relocs. (ppc64_elf_copy_indirect_symbol): Updated. (ppc64_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (ppc64_elf_adjust_dynamic_symbol): Likewise. (dec_dynrel_count): Likewise. (allocate_dynrelocs): Likewise. (ppc64_elf_relocate_section): Likewise. * elf64-s390.c (elf_s390_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (elf_s390_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf64-x86-64.c (elf_x86_64_check_relocs): Likewise. * elfnn-aarch64.c (elf_aarch64_link_hash_entry): Remove dyn_relocs. (elfNN_aarch64_link_hash_newfunc): Updated. (elfNN_aarch64_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (need_copy_relocation_p): Likewise. (elfNN_aarch64_allocate_dynrelocs): Likewise. (elfNN_aarch64_allocate_ifunc_dynrelocs): Likewise. * elfnn-riscv.c (riscv_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (riscv_elf_copy_indirect_symbol): Likewise. (riscv_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (_bfd_sparc_elf_copy_indirect_symbol): Likewise. (_bfd_sparc_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-tilegx.c (tilegx_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (tilegx_elf_copy_indirect_symbol): Likewise. (tilegx_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-x86.c (elf_x86_allocate_dynrelocs): Likewise. (readonly_dynrelocs): Likewise. (_bfd_x86_elf_copy_indirect_symbol): Likewise. * elfxx-x86.h (elf_x86_link_hash_entry): Remove dyn_relocs.
2020-05-21Replace "if (x) free (x)" with "free (x)", bfdAlan Modra1-3/+2
* aoutx.h: Replace "if (x) free (x)" with "free (x)" throughout. * archive.c, * bfd.c, * bfdio.c, * coff-alpha.c, * coff-ppc.c, * coff-sh.c, * coff-stgo32.c, * coffcode.h, * coffgen.c, * cofflink.c, * cpu-arm.c, * doc/chew.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * elf-eh-frame.c, * elf-m10200.c, * elf-m10300.c, * elf-strtab.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-crx.c, * elf32-epiphany.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-ip2k.c, * elf32-m32c.c, * elf32-m68hc11.c, * elf32-m68k.c, * elf32-microblaze.c, * elf32-msp430.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-ppc.c, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-sh.c, * elf32-spu.c, * elf32-v850.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c * elf64-mmix.c, * elf64-ppc.c, * elf64-sparc.c, * elfcode.h, * elflink.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-mips.c, * elfxx-x86.c, * format.c, * ihex.c, * libbfd.c, * linker.c, * mmo.c, * opncls.c, * pdp11.c, * peXXigen.c, * pef.c, * peicode.h, * simple.c, * som.c, * srec.c, * stabs.c, * syms.c, * targets.c, * vms-lib.c, * xcofflink.c, * xtensa-isa.c: Likewise.
2020-05-20[PATCH v2 0/9] RISC-V: Support version controling for ISA standard ↵Nelson Chu1-1/+5
extensions and CSR 1. Remove the -mriscv-isa-version and --with-riscv-isa-version options. We can still use -march to choose the version for each extensions, so there is no need to add these. 2. Change the arguments of options from [1p9|1p9p1|...] to [1.9|1.9.1|...]. Unlike the architecture string has specified by spec, ther is no need to do the same thing for options. 3. Spilt the patches to reduce the burdens of review. [PATCH 3/7] RISC-V: Support new GAS options and configure options to set ISA versions to [PATCH v2 3/9] RISC-V: Support GAS option -misa-spec to set ISA versions [PATCH v2 4/9] RISC-V: Support configure options to set ISA versions by default. [PATCH 4/7] RISC-V: Support version checking for CSR according to privilege version. to [PATCH v2 5/9] RISC-V: Support version checking for CSR according to privilege spec version. [PATCH v2 6/9] RISC-V: Support configure option to choose the privilege spec version. 4. Use enum class rather than string to compare the choosen ISA spec in opcodes/riscv-opc.c. The behavior is same as comparing the choosen privilege spec. include * opcode/riscv.h: Include "bfd.h" to support bfd_boolean. (enum riscv_isa_spec_class): New enum class. All supported ISA spec belong to one of the class (struct riscv_ext_version): New structure holds version information for the specific ISA. * opcode/riscv-opc.h (DECLARE_CSR): There are two version information, define_version and abort_version. The define_version means which privilege spec is started to define the CSR, and the abort_version means which privilege spec is started to abort the CSR. If the CSR is valid for the newest spec, then the abort_version should be PRIV_SPEC_CLASS_DRAFT. (DECLARE_CSR_ALIAS): Same as DECLARE_CSR, but only for the obselete CSR. * opcode/riscv.h (enum riscv_priv_spec_class): New enum class. Define the current supported privilege spec versions. (struct riscv_csr_extra): Add new fields to store more information about the CSR. We use these information to find the suitable CSR address when user choosing a specific privilege spec. binutils * dwarf.c: Updated since DECLARE_CSR is changed. opcodes * riscv-opc.c (riscv_ext_version_table): The table used to store all information about the supported spec and the corresponding ISA versions. Currently, only Zicsr is supported to verify the correctness of Z sub extension settings. Others will be supported in the future patches. (struct isa_spec_t, isa_specs): List for all supported ISA spec classes and the corresponding strings. (riscv_get_isa_spec_class): New function. Get the corresponding ISA spec class by giving a ISA spec string. * riscv-opc.c (struct priv_spec_t): New structure. (struct priv_spec_t priv_specs): List for all supported privilege spec classes and the corresponding strings. (riscv_get_priv_spec_class): New function. Get the corresponding privilege spec class by giving a spec string. (riscv_get_priv_spec_name): New function. Get the corresponding privilege spec string by giving a CSR version class. * riscv-dis.c: Updated since DECLARE_CSR is changed. * riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR according to the chosen version. Build a hash table riscv_csr_hash to store the valid CSR for the chosen pirv verison. Dump the direct CSR address rather than it's name if it is invalid. (parse_riscv_dis_option_without_args): New function. Parse the options without arguments. (parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to parse the options without arguments first, and then handle the options with arguments. Add the new option -Mpriv-spec, which has argument. * riscv-dis.c (print_riscv_disassembler_options): Add description about the new OBJDUMP option. ld * testsuite/ld-riscv-elf/attr-merge-arch-01.d: Updated priv attributes according to the -mpriv-spec option. * testsuite/ld-riscv-elf/attr-merge-arch-02.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-arch-03.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-priv-spec-a.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-priv-spec-b.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-priv-spec.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-stack-align.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-01.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-02.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-03.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-04.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-05.d: Likewise. bfd * elfxx-riscv.h (riscv_parse_subset_t): Add new callback function get_default_version. It is used to find the default version for the specific extension. * elfxx-riscv.c (riscv_parsing_subset_version): Remove the parameters default_major_version and default_minor_version. Add new bfd_boolean parameter *use_default_version. Set it to TRUE if we need to call the callback rps->get_default_version to find the default version. (riscv_parse_std_ext): Call rps->get_default_version if we fail to find the default version in riscv_parsing_subset_version, and then call riscv_add_subset to add the subset into subset list. (riscv_parse_prefixed_ext): Likewise. (riscv_std_z_ext_strtab): Support Zicsr extensions. * elfnn-riscv.c (riscv_merge_std_ext): Use strcasecmp to compare the strings rather than characters. riscv_merge_arch_attr_info): The callback function get_default_version is only needed for assembler, so set it to NULL int the linker. * elfxx-riscv.c (riscv_estimate_digit): Remove the static. * elfxx-riscv.h: Updated. gas * testsuite/gas/riscv/priv-reg-fail-read-only-01.s: Updated. * config/tc-riscv.c (default_arch_with_ext, default_isa_spec): Static variables which are used to set the ISA extensions. You can use -march (or ELF build attributes) and -misa-spec to set them, respectively. (ext_version_hash): The hash table used to handle the extensions with versions. (init_ext_version_hash): Initialize the ext_version_hash according to riscv_ext_version_table. (riscv_get_default_ext_version): The callback function of riscv_parse_subset_t. According to the choosed ISA spec, get the default version for the specific extension. (riscv_set_arch): Set the callback function. (enum options, struct option md_longopts): Add new option -misa-spec. (md_parse_option): Do not call riscv_set_arch for -march. We will call it later in riscv_after_parse_args. Call riscv_get_isa_spec_class to set default_isa_spec class. (riscv_after_parse_args): Call init_ext_version_hash to initialize the ext_version_hash, and then call riscv_set_arch to set the architecture with versions according to default_arch_with_ext. * testsuite/gas/riscv/attribute-02.d: Set 0p0 as default version for x extensions. * testsuite/gas/riscv/attribute-03.d: Likewise. * testsuite/gas/riscv/attribute-09.d: New testcase. For i-ext, we already set it's version to 2p1 by march, so no need to use the default 2p2 version. For m-ext, we do not set the version by -march and ELF arch attribute, so set the default 2p0 to it. For zicsr, it is not defined in ISA spec 2p2, so set 0p0 to it. * testsuite/gas/riscv/attribute-10.d: New testcase. The version of zicsr is 2p0 according to ISA spec 20191213. * config/tc-riscv.c (DEFAULT_RISCV_ARCH_WITH_EXT) (DEFAULT_RISCV_ISA_SPEC): Default configure option settings. You can set them by configure options --with-arch and --with-isa-spec, respectively. (riscv_set_default_isa_spec): New function used to set the default ISA spec. (md_parse_option): Call riscv_set_default_isa_spec rather than call riscv_get_isa_spec_class directly. (riscv_after_parse_args): If the -isa-spec is not set, then we set the default ISA spec according to DEFAULT_RISCV_ISA_SPEC by calling riscv_set_default_isa_spec. * testsuite/gas/riscv/attribute-01.d: Add -misa-spec=2.2, since the --with-isa-spec may be set to different ISA spec. * testsuite/gas/riscv/attribute-02.d: Likewise. * testsuite/gas/riscv/attribute-03.d: Likewise. * testsuite/gas/riscv/attribute-04.d: Likewise. * testsuite/gas/riscv/attribute-05.d: Likewise. * testsuite/gas/riscv/attribute-06.d: Likewise. * testsuite/gas/riscv/attribute-07.d: Likewise. * configure.ac: Add configure options, --with-arch and --with-isa-spec. * configure: Regenerated. * config.in: Regenerated. * config/tc-riscv.c (default_priv_spec): Static variable which is used to check if the CSR is valid for the chosen privilege spec. You can use -mpriv-spec to set it. (enum reg_class): We now get the CSR address from csr_extra_hash rather than reg_names_hash. Therefore, move RCLASS_CSR behind RCLASS_MAX. (riscv_init_csr_hashes): Only need to initialize one hash table csr_extra_hash. (riscv_csr_class_check): Change the return type to void. Don't check the ISA dependency if -mcsr-check isn't set. (riscv_csr_version_check): New function. Check and find the CSR address from csr_extra_hash, according to default_priv_spec. Report warning for the invalid CSR if -mcsr-check is set. (reg_csr_lookup_internal): Updated. (reg_lookup_internal): Likewise. (md_begin): Updated since DECLARE_CSR and DECLARE_CSR_ALIAS are changed. (enum options, struct option md_longopts): Add new GAS option -mpriv-spec. (md_parse_option): Call riscv_set_default_priv_version to set default_priv_spec. (riscv_after_parse_args): If -mpriv-spec isn't set, then set the default privilege spec to the newest one. (enum riscv_csr_class, struct riscv_csr_extra): Move them to include/opcode/riscv.h. * testsuite/gas/riscv/priv-reg-fail-fext.d: This test case just want to check the ISA dependency for CSR, so fix the spec version by adding -mpriv-spec=1.11. * testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise. There are some version warnings for the test case. * gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d: New test case. Check whether the CSR is valid when privilege version 1.9 is choosed. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: New test case. Check whether the CSR is valid when privilege version 1.9.1 is choosed. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d: New test case. Check whether the CSR is valid when privilege version 1.10 is choosed. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d: New test case. Check whether the CSR is valid when privilege version 1.11 is choosed. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l: Likewise. * config/tc-riscv.c (DEFAULT_RISCV_ISA_SPEC): Default configure option setting. You can set it by configure option --with-priv-spec. (riscv_set_default_priv_spec): New function used to set the default privilege spec. (md_parse_option): Call riscv_set_default_priv_spec rather than call riscv_get_priv_spec_class directly. (riscv_after_parse_args): If -mpriv-spec isn't set, then we set the default privilege spec according to DEFAULT_RISCV_PRIV_SPEC by calling riscv_set_default_priv_spec. * testsuite/gas/riscv/csr-dw-regnums.d: Add -mpriv-spec=1.11, since the --with-priv-spec may be set to different privilege spec. * testsuite/gas/riscv/priv-reg.d: Likewise. * configure.ac: Add configure option --with-priv-spec. * configure: Regenerated. * config.in: Regenerated. * config/tc-riscv.c (explicit_attr): Rename explicit_arch_attr to explicit_attr. Set it to TRUE if any ELF attribute is found. (riscv_set_default_priv_spec): Try to set the default_priv_spec if the priv attributes are set. (md_assemble): Set the default_priv_spec according to the priv attributes when we start to assemble instruction. (riscv_write_out_attrs): Rename riscv_write_out_arch_attr to riscv_write_out_attrs. Update the arch and priv attributes. If we don't set the corresponding ELF attributes, then try to output the default ones. (riscv_set_public_attributes): If any ELF attribute or -march-attr options is set (explicit_attr is TRUE), then call riscv_write_out_attrs to update the arch and priv attributes. (s_riscv_attribute): Make sure all arch and priv attributes are set before any instruction. * testsuite/gas/riscv/attribute-01.d: Update the priv attributes if any ELF attribute or -march-attr is set. If the priv attributes are not set, then try to update them by the default setting (-mpriv-spec or --with-priv-spec). * testsuite/gas/riscv/attribute-02.d: Likewise. * testsuite/gas/riscv/attribute-03.d: Likewise. * testsuite/gas/riscv/attribute-04.d: Likewise. * testsuite/gas/riscv/attribute-06.d: Likewise. * testsuite/gas/riscv/attribute-07.d: Likewise. * testsuite/gas/riscv/attribute-08.d: Likewise. * testsuite/gas/riscv/attribute-09.d: Likewise. * testsuite/gas/riscv/attribute-10.d: Likewise. * testsuite/gas/riscv/attribute-unknown.d: Likewise. * testsuite/gas/riscv/attribute-05.d: Likewise. Also, the priv spec set by priv attributes must be supported. * testsuite/gas/riscv/attribute-05.s: Likewise. * testsuite/gas/riscv/priv-reg-fail-version-1p9.d: Likewise. Updated priv attributes according to the -mpriv-spec option. * testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: Likewise. * testsuite/gas/riscv/priv-reg-fail-version-1p10.d: Likewise. * testsuite/gas/riscv/priv-reg-fail-version-1p11.d: Likewise. * testsuite/gas/riscv/priv-reg.d: Removed. * testsuite/gas/riscv/priv-reg-version-1p9.d: New test case. Dump the CSR according to the priv spec 1.9. * testsuite/gas/riscv/priv-reg-version-1p9p1.d: New test case. Dump the CSR according to the priv spec 1.9.1. * testsuite/gas/riscv/priv-reg-version-1p10.d: New test case. Dump the CSR according to the priv spec 1.10. * testsuite/gas/riscv/priv-reg-version-1p11.d: New test case. Dump the CSR according to the priv spec 1.11. * config/tc-riscv.c (md_show_usage): Add descriptions about the new GAS options. * doc/c-riscv.texi: Likewise.
2020-05-14RISC-V: Add elfNN_riscv_mkobject to initialize RISC-V tdata.Nelson Chu1-0/+9
For now we only have one char pointer in RISC-V tdata, so it should be fine. But once we need more elements in tdata, then we may get some uninitialize or unexpected values. I do meet the same problem when extending the RISC-V tdata. bfd/ elfnn-riscv.c (elfNN_riscv_mkobject): New function. We need this to initialize RISC-V tdata.
2020-05-01PR25900, RISC-V: null pointer dereferenceAlan Modra1-5/+6
PR 25900 * elfnn-riscv.c (_bfd_riscv_relax_section): Check root.type before accessing root.u.def of symbols. Also check root.u.def.section is non-NULL. Reverse tests so as to make the logic positive.
2020-02-26Indent labelsAlan Modra1-3/+3
Labels don't go in the first column according to standard emacs C indent rules, and I got annoyed enough at seeing diff -p show a label rather than the function name to fix this. bfd/ * aoutx.h: Indent labels correctly. Format error strings. * archive.c: Likewise. * archive64.c: Likewise. * coff-arm.c: Likewise. * coff-rs6000.c: Likewise. * coff-stgo32.c: Likewise. * cpu-arm.c: Likewise. * dwarf2.c: Likewise. * elf-ifunc.c: Likewise. * elf-properties.c: Likewise. * elf-s390-common.c: Likewise. * elf-strtab.c: Likewise. * elf.c: Likewise. * elf32-arm.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-csky.c: Likewise. * elf32-i386.c: Likewise. * elf32-m68k.c: Likewise. * elf32-msp430.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-pru.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfnn-riscv.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-x86.c: Likewise. * i386lynx.c: Likewise. * merge.c: Likewise. * pdp11.c: Likewise. * plugin.c: Likewise. * reloc.c: Likewise. binutils/ * elfedit.c: Indent labels correctly. * readelf.c: Likewise. * resres.c: Likewise. gas/ * config/obj-elf.c: Indent labels correctly. * config/obj-macho.c: Likewise. * config/tc-aarch64.c: Likewise. * config/tc-alpha.c: Likewise. * config/tc-arm.c: Likewise. * config/tc-cr16.c: Likewise. * config/tc-crx.c: Likewise. * config/tc-frv.c: Likewise. * config/tc-i386-intel.c: Likewise. * config/tc-i386.c: Likewise. * config/tc-ia64.c: Likewise. * config/tc-mn10200.c: Likewise. * config/tc-mn10300.c: Likewise. * config/tc-nds32.c: Likewise. * config/tc-riscv.c: Likewise. * config/tc-s12z.c: Likewise. * config/tc-xtensa.c: Likewise. * config/tc-z80.c: Likewise. * read.c: Likewise. * symbols.c: Likewise. * write.c: Likewise. ld/ * emultempl/cskyelf.em: Indent labels correctly. * ldfile.c: Likewise. * ldlang.c: Likewise. * plugin.c: Likewise. opcodes/ * aarch64-asm.c: Indent labels correctly. * aarch64-dis.c: Likewise. * aarch64-gen.c: Likewise. * aarch64-opc.c: Likewise. * alpha-dis.c: Likewise. * i386-dis.c: Likewise. * nds32-asm.c: Likewise. * nfp-dis.c: Likewise. * visium-dis.c: Likewise.
2020-02-19bfd_size_type to size_tAlan Modra1-2/+2
bfd_size_type was invented a long time ago in the K&R days. Many places in binutils ought to be using size_t instead (and there are lots of places that use long or unsigned long that really ought to use size_t too). Note that you can't change everything over to size_t: A 32-bit host needs a larger type than size_t to support reading and processing of 64-bit ELF object files. This patch just tidies some of the more obvious uses of bfd_size_type that could be size_t. There no doubt are more lurking in the source. Incidentally, practically all functions used for output of object files can use size_t and don't need to worry about overflow of size expressions. If you have something like symcount * sizeof (void *) when symcount is counting symbols already in memory then you know that this expression can't overflow since the size of a symbol in memory is larger by far than that of a pointer. * aix386-core.c (aix386_core_file_p): Use size_t for "amt". * aout-target.h (object_p): Likewise. * aout-tic30.c (tic30_aout_object_p): Likewise. * aoutx.h (some_aout_object_p, mkobject, make_empty_symbol), (emit_stringtab, write_syms, link_hash_table_create), (aout_link_write_other_symbol): Likewise. * archive.c (_bfd_generic_mkarchive, bfd_generic_archive_p), (bfd_ar_hdr_from_filesystem, _bfd_write_archive_contents), (_bfd_compute_and_write_armap): Likewise. * archures.c (bfd_arch_list): Likewise. * bfd.c (bfd_record_phdr): Likewise. * binary.c (binary_canonicalize_symtab): Likewise. * cisco-core.c (cisco_core_file_validate): Likewise. * coff-arm.c (coff_arm_link_hash_table_create, find_thumb_glue), (find_arm_glue, record_arm_to_thumb_glue), (record_thumb_to_arm_glue): Likewise. * coff-ppc.c (ppc_coff_link_hash_table_create, record_toc), (ppc_allocate_toc_section): Likewise. * coff-rs6000.c (_bfd_xcoff_mkobject, _bfd_xcoff_archive_p): Likewise. * coff-sh.c (sh_relax_section): Likewise. * coff64-rs6000.c (xcoff64_archive_p): Likewise. * coffcode.h (handle_COMDAT, coff_new_section_hook), (coff_set_alignment_hook, coff_mkobject), (coff_compute_section_file_positions): Likewise. * coffgen.c (coff_make_empty_symbol, coff_bfd_make_debug_symbol), (coff_find_nearest_line_with_names), ( bfd_coff_set_symbol_class): Likewise. * cofflink.c (_bfd_coff_link_hash_table_create), (_bfd_coff_link_input_bfd): Likewise. * dwarf1.c (alloc_dwarf1_unit, alloc_dwarf1_func): Likewise. * dwarf2.c (read_abbrevs, read_attribute_value, add_line_info), (build_line_info_table, sort_line_sequences), (line_info_add_include_dir, line_info_add_file_name), (decode_line_info, scan_unit_for_symbols, parse_comp_unit), (place_sections, _bfd_dwarf2_slurp_debug_info): Likewise. * ecoff.c (_bfd_ecoff_mkobject, _bfd_ecoff_make_empty_symbol), (_bfd_ecoff_find_nearest_line), (_bfd_ecoff_bfd_link_hash_table_create): Likewise. * ecofflink.c (bfd_ecoff_debug_init): Likewise. * elf-hppa.h (_bfd_elf_hppa_gen_reloc_type): Likewise. * elf-m10300.c (mn10300_elf_relax_section), (elf32_mn10300_link_hash_table_create): Likewise. * elf-strtab.c (_bfd_elf_strtab_init): Likewise. * elf.c (make_mapping, copy_elf_program_header): Likewise. * elf32-arm.c (elf32_arm_link_hash_table_create), (elf32_arm_setup_section_lists, elf32_arm_check_relocs), (elf32_arm_new_section_hook): Likewise. * elf32-avr.c (elf_avr_new_section_hook), (elf32_avr_link_hash_table_create, get_local_syms), (elf32_avr_setup_section_lists): Likewise. * elf32-bfin.c (bfinfdpic_elf_link_hash_table_create), (bfin_link_hash_table_create): Likewise. * elf32-cr16.c (elf32_cr16_link_hash_table_create): Likewise. * elf32-cris.c (elf_cris_link_hash_table_create): Likewise. * elf32-csky.c (csky_elf_link_hash_table_create), (csky_elf_check_relocs, elf32_csky_setup_section_lists): Likewise. * elf32-frv.c (frvfdpic_elf_link_hash_table_create): Likewise. * elf32-hppa.c (elf32_hppa_link_hash_table_create), (elf32_hppa_setup_section_lists, get_local_syms): Likewise. * elf32-i386.c (elf_i386_check_relocs): Likewise. * elf32-lm32.c (lm32_elf_link_hash_table_create): Likewise. * elf32-m32r.c (m32r_elf_link_hash_table_create), (m32r_elf_check_relocs): Likewise. * elf32-m68hc1x.c (m68hc11_elf_hash_table_create), (elf32_m68hc11_setup_section_lists), (elf32_m68hc11_size_stubs): Likewise. * elf32-m68k.c (elf_m68k_link_hash_table_create): Likewise. * elf32-metag.c (elf_metag_link_hash_table_create), (elf_metag_setup_section_lists): Likewise. * elf32-microblaze.c (microblaze_elf_link_hash_table_create), (microblaze_elf_check_relocs): Likewise. * elf32-nds32.c (nds32_elf_link_hash_table_create), (nds32_elf_check_relocs): Likewise. * elf32-nios2.c (nios2_elf32_setup_section_lists), (get_local_syms, nios2_elf32_check_relocs), (nios2_elf32_link_hash_table_create): Likewise. * elf32-or1k.c (or1k_elf_link_hash_table_create), (or1k_elf_check_relocs): Likewise. * elf32-ppc.c (ppc_elf_modify_segment_map, update_plt_info): Likewise. * elf32-pru.c (pru_elf32_link_hash_table_create): Likewise. * elf32-s390.c (elf_s390_link_hash_table_create), (elf_s390_check_relocs): Likewise. * elf32-score.c (score_elf_create_got_section), (s3_elf32_score_new_section_hook), (elf32_score_link_hash_table_create): Likewise. * elf32-score7.c (score_elf_create_got_section), (s7_elf32_score_new_section_hook): Likewise. * elf32-sh.c (sh_elf_link_hash_table_create), (sh_elf_check_relocs): Likewise. * elf32-tic6x.c (elf32_tic6x_link_hash_table_create), (elf32_tic6x_new_section_hook, elf32_tic6x_check_relocs): Likewise. * elf32-tilepro.c (tilepro_elf_link_hash_table_create), (tilepro_elf_check_relocs): Likewise. * elf32-v850.c (remember_hi16s_reloc): Likewise. * elf32-vax.c (elf_vax_link_hash_table_create): Likewise. * elf32-xtensa.c (elf_xtensa_link_hash_table_create), (elf_xtensa_new_section_hook): Likewise. * elf64-alpha.c (elf64_alpha_bfd_link_hash_table_create), (get_got_entry, elf64_alpha_check_relocs): Likewise. * elf64-hppa.c (elf64_hppa_hash_table_create): Likewise. * elf64-ia64-vms.c (elf64_ia64_object_p): Likewise. * elf64-mmix.c (mmix_elf_new_section_hook): Likewise. * elf64-ppc.c (ppc64_elf_new_section_hook), (ppc64_elf_link_hash_table_create, update_local_sym_info), (update_plt_info, ppc64_elf_check_relocs): Likewise. * elf64-s390.c (elf_s390_link_hash_table_create), (elf_s390_check_relocs): Likewise. * elf64-x86-64.c (elf_x86_64_check_relocs): Likewise. * elflink.c (bfd_elf_link_record_local_dynamic_symbol), (_bfd_elf_link_find_version_dependencies, elf_link_add_object_symbols), (elf_link_add_archive_symbols, compute_bucket_count), (bfd_elf_size_dynsym_hash_dynstr, _bfd_elf_link_hash_table_create), (bfd_elf_get_bfd_needed_list, elf_link_swap_symbols_out), (bfd_elf_final_link): Likewise. * elfnn-aarch64.c (elfNN_aarch64_link_hash_table_create), (elfNN_aarch64_setup_section_lists, elfNN_aarch64_check_relocs), (elfNN_aarch64_new_section_hook): Likewise. * elfnn-ia64.c (elfNN_ia64_object_p): Likewise. * elfnn-riscv.c (riscv_elf_link_hash_table_create), (riscv_elf_check_relocs): Likewise. * elfxx-mips.c (_bfd_mips_elf_new_section_hook), (_bfd_mips_elf_add_symbol_hook, _bfd_mips_elf_check_relocs), (_bfd_mips_elf_modify_segment_map, _bfd_mips_elf_set_section_contents), (_bfd_mips_elf_link_hash_table_create): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_link_hash_table_create), (_bfd_sparc_elf_check_relocs), (_bfd_sparc_elf_new_section_hook): Likewise. * elfxx-tilegx.c (tilegx_elf_link_hash_table_create), (tilegx_elf_check_relocs): Likewise. * elfxx-x86.c (_bfd_x86_elf_link_hash_table_create): Likewise. * format.c (bfd_check_format_matches): Likewise. * hash.c (_bfd_stringtab_init): Likewise. * ihex.c (ihex_scan): Likewise. * irix-core.c (irix_core_core_file_p): Likewise. * linker.c (bfd_wrapped_link_hash_lookup), (_bfd_generic_link_hash_table_create), (_bfd_generic_reloc_link_order): Likewise. * lynx-core.c (lynx_core_file_p): Likewise. * netbsd-core.c (netbsd_core_file_p): Likewise. * osf-core.c (osf_core_core_file_p): Likewise. * pdp11.c (some_aout_object_p, mkobject, make_empty_symbol), (link_hash_table_create, aout_link_write_other_symbol): Likewise. * peXXigen.c (_bfd_XX_bfd_copy_private_section_data): Likewise. * peicode.h (pe_mkobject): Likewise. * ppcboot.c (ppcboot_mkobject, ppcboot_canonicalize_symtab): Likewise. * ptrace-core.c (ptrace_unix_core_file_p): Likewise. * sco5-core.c (read_uarea): Likewise. * som.c (hppa_som_gen_reloc_type, som_object_p, som_prep_headers), (som_write_fixups, som_write_space_strings, som_write_symbol_strings), (som_finish_writing, som_canonicalize_symtab, som_new_section_hook), (som_bfd_copy_private_section_data, bfd_som_set_section_attributes), (bfd_som_attach_aux_hdr, som_write_armap): Likewise. * srec.c (srec_scan): Likewise. * syms.c (_bfd_generic_make_empty_symbol): Likewise. * targets.c (bfd_target_list): Likewise. * tekhex.c (first_phase, tekhex_sizeof_headers): Likewise. * trad-core.c (trad_unix_core_file_p): Likewise. * vms-alpha.c (vms_initialize, alpha_vms_bfd_link_hash_table_create), (vms_new_section_hook): Likewise. * wasm-module.c (wasm_make_empty_symbol): Likewise. * xcofflink.c (xcoff_get_section_contents), (_bfd_xcoff_bfd_link_hash_table_create, xcoff_set_import_path), (xcoff_find_function, bfd_xcoff_link_record_set, xcoff_build_ldsym), (bfd_xcoff_size_dynamic_sections, xcoff_link_input_bfd): Likewise.
2020-01-22RISC-V: Change -march parsing.Jim Wilson1-63/+83
bfd/ 2020-01-22 Maxim Blinov <maxim.blinov@embecosm.com> * bfd/elfnn-riscv.c (riscv_skip_prefix): New. (riscv_prefix_cmp): Likewise. (riscv_non_std_ext_p): Deleted. (riscv_std_sv_ext_p): Likewise. (riscv_non_std_sv_ext_p): Likewise. (riscv_merge_non_std_and_sv_ext): Rename to... (riscv_merge_multi_letter_ext): and modified to use riscv_prefix_cmp. (riscv_merge_arch_attr_info): Replace 3 calls to riscv_merge_non_std_and_sv_ext with single call to riscv_merge_multi_letter_ext. * bfd/elfxx-riscv.c (riscv_parse_std_ext): Break if we encounter a 'z' prefix. (riscv_get_prefix_class): New function, return prefix class based on first few characters of input string. (riscv_parse_config): New structure to factor out minor differences in extension class parsing behaviour. (riscv_parse_sv_or_non_std_ext): Rename to... (riscv_parse_prefixed_ext): and parameterise with riscv_parse_config. (riscv_std_z_ext_strtab, riscv_std_s_ext_strtab): New. (riscv_multi_letter_ext_valid_p): New. (riscv_ext_x_valid_p, riscv_ext_z_valid_p, riscv_ext_s_valid_p): New. (riscv_parse_subset): Delegate all non-single-letter parsing work to riscv_parse_prefixed_ext. * bfd/elfxx-riscv.h (riscv_isa_ext_class): New type. (riscv_get_prefix_class): Declare. gas/ 2020-01-22 Maxim Blinov <maxim.blinov@embecosm.com> * testsuite/gas/riscv/march-ok-s.d: sx is no longer valid and s exts must be known, so rename *ok* to *fail*. * testsuite/gas/riscv/march-ok-sx.d: Likewise. * testsuite/gas/riscv/march-ok-s-with-version: Likewise. * testsuite/gas/riscv/march-fail-s.l: Expected error messages for above change. * testsuite/gas/riscv/march-fail-sx.l: Likewise. * testsuite/gas/riscv/march-fail-sx-with-version.l: Likewise. Change-Id: Ic4d91a13d055a10d30ab28752a380a669b59f29c
2020-01-06RISC-V: Fix weak function call reloc overflow on llvm build.Jim Wilson1-3/+6
bfd/ PR 25205 * elfnn-riscv.c (riscv_elf_relocate_section) <R_RISCV_CALL>: Add check for !bfd_link_pic (info). <R_RISCV_CALL_PLT>: Move next to R_RISCV_CALL. <R_RISCV_JAL>: Add comment. (_bfd_riscv_relax_section): For plt.offset check, add check for bfd_link_pic (info). Add comment. Change-Id: Ie769bc3d5adf096a51df5cc12efe3d50e80acb8f
2020-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2019-11-12RISC-V: Fix ld relax failure with calls and align directives.Jim Wilson1-3/+10
Make _bfd_riscv_relax_call handle section alignment padding same as the _bfd_riscv_relax_lui and _bfd_riscv_relax_pc functions already do. Use the max section alignment if section boundaries are crossed, otherwise the alignment of the containing section. bfd/ PR 25181 * elfnn-riscv.c (_bfd_riscv_relax_call): Always add max_alignment to foff. If sym_sec->output_section and sec->output_section are the same and not *ABS* then set max_alignment to that section's alignment. ld/ PR 25181 * testsuite/ld-riscv-elf/call-relax-0.s: New file. * testsuite/ld-riscv-elf/call-relax-1.s: New file. * testsuite/ld-riscv-elf/call-relax-2.s: New file. * testsuite/ld-riscv-elf/call-relax-3.s: New file. * testsuite/ld-riscv-elf/call-relax.d: New test. * testsuite/ld-riscv-elf/ld-riscv-elf.exp: Run call-relax test. Change-Id: Iaf65cee52345abf1955f36e8e72c4f6cc0db8d9a
2019-10-17RISC-V: Report unresolved relocation error via linker's callback function.Jim Wilson1-17/+46
Two patches from Nelson Chu. It is better to use the linker's callback functions to handle the link time error when relocating. The unresolved relocation error can be regarded as an unsupported relocation. To make user easier to understand different errors, we need to extend the current error message format of the callback function since the format is fixed. bfd/ * elfnn-riscv.c (riscv_elf_relocate_section): Use asprintf to extend the error message if needed, and then store the result into the `msg_buf`. Finally, remember to free the unused `msg_buf`. All error message for the dangerous relocation should be set before we call the callback function. If we miss the error message since linker runs out of memory, we should set the default error message for the error. ld/ * testsuite/ld-riscv-elf/lib-nopic-01a.s: Create the shared library lib-nopic-01a.so, it will be linked with lib-nopic-01b.s. * testsuite/ld-riscv-elf/lib-nopic-01b.s: Add new test for the unresolved relocation. Link the non-pic code into a shared library may cause the error. * testsuite/ld-riscv-elf/lib-nopic-01b.d: Likewise. * testsuite/ld-riscv-elf/ld-riscv-elf.exp: Run the new test only when the shared library is supported. R_RISCV_CALL, R_RISCV_JAL and R_RISCV_RVC_JUMP are pc-relative relocation. For now, we do not allow the object with these relocation links into a shared library since the referenced symbols may be loaded to the places that too far from the pc. We can improve the error message for these unsupported relocation to notice user that they should recompile their code with `fPIC`. bfd/ * elfnn-riscv.c (riscv_elf_relocate_section): Report the error message that user should recompile their code with `fPIC` when linking non-pic code into shared library. ld/ * testsuite/ld-riscv-elf/lib-nopic-01b.d: Update the error message. Change-Id: Ib3347a0a6fa1c2b20a9647c314d5bec2c322ff04
2019-09-20RISC-V: Optimize lui and auipc relaxations for undefweak symbol.Jim Wilson1-27/+116
For the lui and auipc relaxations, since the symbol value of an undefined weak symbol is always be zero, we can optimize the patterns into a single LI/MV/ADDI instruction. bfd/ * elfnn-riscv.c (riscv_pcgp_hi_reloc): Add new field undefined_weak. (riscv_record_pcgp_hi_reloc): New parameter undefined_weak. Set undefined_weak field from it. (relax_func_t): New parameter undefined_weak. (_bfd_riscv_relax_call): New ignored parameter undefined_weak. (_bfd_riscv_relax_tls_le): Likewise. (_bfd_riscv_relax_align): Likewise. (_bfd_riscv_relax_delete): Likewise. (_bfd_riscv_relax_lui): New parameter undefined_weak. If true, allow relaxing. For LO12* relocs, set rs1 to x0 when undefined_weak. (_bfd_riscv_relax_pc): New parameter undefined_weak. For LO12* relocs, set undefined_weak from hi_reloc. If true, allow relaxing. For LO12* relocs, set rs1 to x0 when undefined_weak and change to non-pcrel reloc. (_bfd_riscv_relax_section): New local undefined_weak. Set for undef weak relocs that can be relaxed. Pass to relax_func call. ld/ * testsuite/ld-riscv-elf/weakref32.s: Add relaxable undef weak code. * testsuite/ld-riscv-elf/weakref64.s: Likewise. * testsuite/ld-riscv-elf/weakref32.d: Updated. * testsuite/ld-riscv-elf/weakref64.d: Updated.
2019-09-19bfd_section_* macrosAlan Modra1-6/+5
This large patch removes the unnecessary bfd parameter from various bfd section macros and functions. The bfd is hardly ever used and if needed for the bfd_set_section_* or bfd_rename_section functions can be found via section->owner except for the com, und, abs, and ind std_section special sections. Those sections shouldn't be modified anyway. The patch also removes various bfd_get_section_<field> macros, replacing their use with bfd_section_<field>, and adds bfd_set_section_lma. I've also fixed a minor bug in gas where compressed section renaming was done directly rather than calling bfd_rename_section. This would have broken bfd_get_section_by_name and similar functions, but that hardly mattered at such a late stage in gas processing. bfd/ * bfd-in.h (bfd_get_section_name, bfd_get_section_vma), (bfd_get_section_lma, bfd_get_section_alignment), (bfd_get_section_size, bfd_get_section_flags), (bfd_get_section_userdata): Delete. (bfd_section_name, bfd_section_size, bfd_section_vma), (bfd_section_lma, bfd_section_alignment): Lose bfd parameter. (bfd_section_flags, bfd_section_userdata): New. (bfd_is_com_section): Rename parameter. * section.c (bfd_set_section_userdata, bfd_set_section_vma), (bfd_set_section_alignment, bfd_set_section_flags, bfd_rename_section), (bfd_set_section_size): Delete bfd parameter, rename section parameter. (bfd_set_section_lma): New. * bfd-in2.h: Regenerate. * mach-o.c (bfd_mach_o_init_section_from_mach_o): Delete bfd param, update callers. * aoutx.h, * bfd.c, * coff-alpha.c, * coff-arm.c, * coff-mips.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * compress.c, * ecoff.c, * elf-eh-frame.c, * elf-hppa.h, * elf-ifunc.c, * elf-m10200.c, * elf-m10300.c, * elf-properties.c, * elf-s390-common.c, * elf-vxworks.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-csky.c, * elf32-d10v.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-ppc.c, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-bpf.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c, * elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * i386msdos.c, * linker.c, * mach-o.c, * mmo.c, * opncls.c, * pdp11.c, * pei-x86_64.c, * peicode.h, * reloc.c, * section.c, * syms.c, * vms-alpha.c, * xcofflink.c: Update throughout for bfd section macro and function changes. binutils/ * addr2line.c, * bucomm.c, * coffgrok.c, * dlltool.c, * nm.c, * objcopy.c, * objdump.c, * od-elf32_avr.c, * od-macho.c, * od-xcoff.c, * prdbg.c, * rdcoff.c, * rddbg.c, * rescoff.c, * resres.c, * size.c, * srconv.c, * strings.c, * windmc.c: Update throughout for bfd section macro and function changes. gas/ * as.c, * as.h, * dw2gencfi.c, * dwarf2dbg.c, * ecoff.c, * read.c, * stabs.c, * subsegs.c, * subsegs.h, * write.c, * config/obj-coff-seh.c, * config/obj-coff.c, * config/obj-ecoff.c, * config/obj-elf.c, * config/obj-macho.c, * config/obj-som.c, * config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c, * config/tc-arm.c, * config/tc-avr.c, * config/tc-bfin.c, * config/tc-bpf.c, * config/tc-d10v.c, * config/tc-d30v.c, * config/tc-epiphany.c, * config/tc-fr30.c, * config/tc-frv.c, * config/tc-h8300.c, * config/tc-hppa.c, * config/tc-i386.c, * config/tc-ia64.c, * config/tc-ip2k.c, * config/tc-iq2000.c, * config/tc-lm32.c, * config/tc-m32c.c, * config/tc-m32r.c, * config/tc-m68hc11.c, * config/tc-mep.c, * config/tc-microblaze.c, * config/tc-mips.c, * config/tc-mmix.c, * config/tc-mn10200.c, * config/tc-mn10300.c, * config/tc-msp430.c, * config/tc-mt.c, * config/tc-nds32.c, * config/tc-or1k.c, * config/tc-ppc.c, * config/tc-pru.c, * config/tc-rl78.c, * config/tc-rx.c, * config/tc-s12z.c, * config/tc-s390.c, * config/tc-score.c, * config/tc-score7.c, * config/tc-sh.c, * config/tc-sparc.c, * config/tc-spu.c, * config/tc-tic4x.c, * config/tc-tic54x.c, * config/tc-tic6x.c, * config/tc-tilegx.c, * config/tc-tilepro.c, * config/tc-v850.c, * config/tc-visium.c, * config/tc-wasm32.c, * config/tc-xc16x.c, * config/tc-xgate.c, * config/tc-xstormy16.c, * config/tc-xtensa.c, * config/tc-z8k.c: Update throughout for bfd section macro and function changes. * write.c (compress_debug): Use bfd_rename_section. gdb/ * aarch64-linux-tdep.c, * arm-tdep.c, * auto-load.c, * coff-pe-read.c, * coffread.c, * corelow.c, * dbxread.c, * dicos-tdep.c, * dwarf2-frame.c, * dwarf2read.c, * elfread.c, * exec.c, * fbsd-tdep.c, * gcore.c, * gdb_bfd.c, * gdb_bfd.h, * hppa-tdep.c, * i386-cygwin-tdep.c, * i386-fbsd-tdep.c, * i386-linux-tdep.c, * jit.c, * linux-tdep.c, * machoread.c, * maint.c, * mdebugread.c, * minidebug.c, * mips-linux-tdep.c, * mips-sde-tdep.c, * mips-tdep.c, * mipsread.c, * nto-tdep.c, * objfiles.c, * objfiles.h, * osabi.c, * ppc-linux-tdep.c, * ppc64-tdep.c, * record-btrace.c, * record-full.c, * remote.c, * rs6000-aix-tdep.c, * rs6000-tdep.c, * s390-linux-tdep.c, * s390-tdep.c, * solib-aix.c, * solib-dsbt.c, * solib-frv.c, * solib-spu.c, * solib-svr4.c, * solib-target.c, * spu-linux-nat.c, * spu-tdep.c, * symfile-mem.c, * symfile.c, * symmisc.c, * symtab.c, * target.c, * windows-nat.c, * xcoffread.c, * cli/cli-dump.c, * compile/compile-object-load.c, * mi/mi-interp.c: Update throughout for bfd section macro and function changes. * gcore (gcore_create_callback): Use bfd_set_section_lma. * spu-tdep.c (spu_overlay_new_objfile): Likewise. gprof/ * corefile.c, * symtab.c: Update throughout for bfd section macro and function changes. ld/ * ldcref.c, * ldctor.c, * ldelf.c, * ldlang.c, * pe-dll.c, * emultempl/aarch64elf.em, * emultempl/aix.em, * emultempl/armcoff.em, * emultempl/armelf.em, * emultempl/cr16elf.em, * emultempl/cskyelf.em, * emultempl/m68hc1xelf.em, * emultempl/m68kelf.em, * emultempl/mipself.em, * emultempl/mmix-elfnmmo.em, * emultempl/mmo.em, * emultempl/msp430.em, * emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em, * emultempl/ppc64elf.em, * emultempl/xtensaelf.em: Update throughout for bfd section macro and function changes. libctf/ * ctf-open-bfd.c: Update throughout for bfd section macro changes. opcodes/ * arc-ext.c: Update throughout for bfd section macro changes. sim/ * common/sim-load.c, * common/sim-utils.c, * cris/sim-if.c, * erc32/func.c, * lm32/sim-if.c, * m32c/load.c, * m32c/trace.c, * m68hc11/interp.c, * ppc/hw_htab.c, * ppc/hw_init.c, * rl78/load.c, * rl78/trace.c, * rx/gdb-if.c, * rx/load.c, * rx/trace.c: Update throughout for bfd section macro changes.
2019-08-31RISC-V: Fix linker problems with tls copy relocs.Jim Wilson1-0/+14
The linker doesn't allocate memory space for sections that are only SEC_ALLOC and SEC_THREAD_LOCAL. See the IS_TBSS test in ld/ldlang.c. So we need to pretend that .tdata.dyn sections have contents to get the right result. It will be marked this way anyways if there is a .tdata section to merge with. bfd/ PR 23825 * elfnn-riscv.c (riscv_elf_create_dynamic_sections): Add SEC_LOAD, SEC_DATA, and SEC_HAS_CONTENTS to .tdata.dyn section.
2019-08-30RISC-V: Force linker error exit after unresolvable reloc.Jim Wilson1-1/+4
This was noticed while trying to test the compiler -msave-restore support. Putting non-pic code in a shared library gives a linker error, but doesn't stop the build. rohan:2030$ cat libtmp.c extern int sub2 (int); int sub (int i) { return sub2 (i + 10); } rohan:2031$ cat libtmp2.c extern int sub (int); int sub2 (int i) { return sub (i + 10); } rohan:2032$ riscv64-unknown-linux-gnu-gcc --shared -o libtmp.so libtmp.c rohan:2033$ riscv64-unknown-linux-gnu-gcc --shared -o libtmp2.so libtmp2.c libtmp.so /home/jimw/FOSS/install-riscv64/lib/gcc/riscv64-unknown-linux-gnu/8.3.0/../../../../riscv64-unknown-linux-gnu/bin/ld: /tmp/cctrsIBe.o(.text+0x18): unresolvable R_RISCV_CALL relocation against symbol `sub' rohan:2034$ echo $? 0 rohan:2035$ ls -lt libtmp2.so -rwxr-xr-x 1 jimw jimw 6912 Aug 30 14:32 libtmp2.so rohan:2036$ The patch fixes this by forcing a linker error. I now get this. ohan:2059$ sh tmp.script /home/jimw/FOSS/BINUTILS/X-riscv64-linux/ld/ld-new: libtmp2.o(.text+0x18): unresolvable R_RISCV_CALL relocation against symbol `sub' /home/jimw/FOSS/BINUTILS/X-riscv64-linux/ld/ld-new: final link failed: bad value rohan:2060$ echo $? 1 rohan:2061$ ls -lt libtmp2.so ls: cannot access 'libtmp2.so': No such file or directory bfd/ * elfnn-riscv.c (riscv_elf_relocate_section): For unresolvable reloc error, call bfd_set_error, set ret to FALSE, and goto out label.
2019-08-28RISC-V: Fix a gp relaxation reloc overflow error.Jim Wilson1-7/+10
This was broken when I changed how we compute the value for the gp register. It used to be computed inside the sdata section. Now it is computed at the end which makes it an abs section symbol. There is code that tries to use the alignment of the section that the gp value is in, but this does not work if it is in the abs section, as the abs section has alignment of 1 byte. There are people using alternative linker scripts that still define it in the sdata section, so the code is still useful. Thus adding a check to disable this when gp is in the abs section. bfd/ * elfnn-riscv.c (_bfd_riscv_relax_lui): Add check to exclude abs section when setting max_alignment. Update comment. (_bfd_riscv_relax_pc): Likewise.
2019-08-15RISC-V: Fix lui relaxation issue with code at address 0.Jim Wilson1-2/+14
This fixes a problem originally reported at https://github.com/riscv/riscv-binutils-gdb/issues/173 If you have code linked at address zero, you can have a lui instruction loading a value 0x800 which gets relaxed to a c.lui which is valid (c.lui 0x1 followed by addi -0x800). Relaxation can reduce the value below 0x800 at which point the c.lui 0x0 is no longer valid. We can fix this by converting the c.lui to a c.li which can load 0. bfd/ * elfnn-riscv.c (perform_relocation) <R_RISCV_RVC_LUI>: If RISCV_CONST_HIGH_PART (value) is zero, then convert c.lui instruction to c.li instruction, and use ENCODE_RVC_IMM to set value. ld/ * testsuite/ld-riscv-elf/c-lui-2.d: New. * testsuite/ld-riscv-elf/c-lui-2.ld: New. * testsuite/ld-riscv-elf/c-lui-2.s: New. * testsuite/ld-riscv-elf/ld-riscv-elf.exp: Run the c-lui-2 test.
2019-08-01RISC-V: Fix lui relax failure with relro.Jim Wilson1-2/+7
bfd/ChangeLog Ilia Diachkov <ilia.diachkov@optimitech.com> * elfnn-riscv.c (_bfd_riscv_relax_lui): Set lui relax safety area to two pages in relro presence.
2019-06-24RISC-V: Enable lui relaxation for CODE and MERGE sections.Jim Wilson1-10/+46
2019-06-24 Ilia Diachkov <ilia.diachkov@optimitech.com> bfd/ * elfnn-riscv.c (_bfd_riscv_relax_lui): Delete early exit when SEC_MERGE or SEC_CODE flags are set. (_bfd_riscv_relax_section): New local symtype. Set sym_sec and symtype consistently. Don't include sec_addr (sym_sec) in symval. Add check for SEC_INFO_TYPE_MERGE and call _bfd_merged_section_offset. Add sec_addr (sym_sec) after handling merge sections.
2019-04-22RISC-V: Enable 32-bit linux gdb core file support.Jim Wilson1-1/+1
bfd/ * elfnn-riscv.c (PRSTATUS_SIZE) [ARCH_SIZE==32]: Change from 0 to 204.
2019-04-02RISC-V: Don't check ABI flags if no code section.Jim Wilson1-2/+32
This fixes a glib build failure reported in PR 24389. Using ld -b binary creates an object file with no elf header flags set which has the wrong ABI info for riscv64-linux. But the file also has no code sections, so I added code borrowed from the arm port that only checks the ELF header ABI flags if there is a code section. bfd/ PR 24389 * elfnn-riscv.c (_bfd_riscv_elf_merge_private_bfd_data): Move read of ELF header flags to after check for ELF object file. Loop through sections looking for code sections, if none, then skip ABI checks.
2019-03-30RISC-V: Relax tail/j to c.j for RV64.Jim Wilson1-2/+5
2019-03-30 Andrew Waterman <andrew@sifive.com> bfd/ * elfnn-riscv.c (_bfd_riscv_relax_call): Only check ARCH_SIZE for rd == X_RA case.
2019-03-21RISC-V: Fix linker crash in section symbol check.Jim Wilson1-1/+3
sym is only set for local symbols. h is only set for global symbols. Gas won't let me create a global section symbol, but bfd appears to have some support for that, and I can't rule out that other assemblers might do this. So we need to support both, and verify sym and h are non-NULL before using. bfd/ PR 24365 * elfnn-riscv.c (riscv_elf_relocate_section): For STT_SECTION check, verify sym non-NULL before using. Add identical check using h.
2019-01-21Fix spelling mistakes in BFD library.Yuri Chornoivan1-4/+4
PR 24108 bfd * elf32-nds32.c (nds32_relocate_section): Add space between words in error message. * elfnn-riscv.c (riscv_version_mismatch): Fix spelling mistake in error message. (riscv_i_or_e_p): Likewise. (riscv_merge_arch_attr_info): Likewise. ld * testsuite/ld-riscv-elf/attr-merge-arch-failed-01.d: Update expected error message.
2019-01-16RISC-V: Merge ELF attribute for ld.Jim Wilson1-0/+417
2019-01-16 Kito Cheng <kito@andestech.com> Nelson Chu <nelson@andestech.com> bfd/ * elfnn-riscv.c (in_subsets): New. (out_subsets): Likewise. (merged_subsets): Likewise. (riscv_std_ext_p): Likewise. (riscv_non_std_ext_p): Likewise. (riscv_std_sv_ext_p): Likewise. (riscv_non_std_sv_ext_p): Likewise. (riscv_version_mismatch): Likewise. (riscv_i_or_e_p): Likewise. (riscv_merge_std_ext): Likewise. (riscv_merge_non_std_and_sv_ext): Likewise. (riscv_merge_arch_attr_info): Likewise. (riscv_merge_attributes): Likewise. (_bfd_riscv_elf_merge_private_bfd_data): Merge attribute. ld/ * testsuite/ld-elf/orphan-region.d: XFAIL for RISC-V, because add new section. * testsuite/ld-riscv-elf/ld-riscv-elf.exp: Add new tests. * testsuite/ld-riscv-elf/attr-merge-arch-01.d: New test. * testsuite/ld-riscv-elf/attr-merge-arch-01a.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-arch-01b.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-arch-02.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-arch-02a.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-arch-02b.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-arch-03.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-arch-03a.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-arch-03b.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-arch-failed-01.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-arch-failed-01a.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-arch-failed-01b.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-priv-spec-a.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-priv-spec-b.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-priv-spec.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-stack-align-a.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-stack-align-b.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-stack-align-failed-a.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-stack-align-failed-b.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-stack-align-failed.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-stack-align.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-01.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-01a.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-01b.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-02.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-02a.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-02b.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-03.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-03a.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-03b.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-04.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-04a.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-04b.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-05.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-05a.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-05b.s: Likewise.
2019-01-16RISC-V: Support ELF attribute for gas and readelf.Jim Wilson1-0/+17
2019-01-16 Kito Cheng <kito@andestech.com> Nelson Chu <nelson@andestech.com> bfd/ * elfnn-riscv.c (riscv_elf_obj_attrs_arg_type): New. (elf_backend_obj_attrs_vendor): Define. (elf_backend_obj_attrs_section_type): Likewise. (elf_backend_obj_attrs_section): Likewise. (elf_backend_obj_attrs_arg_type): Define as riscv_elf_obj_attrs_arg_type. * elfxx-riscv.c (riscv_estimate_digit): New. (riscv_estimate_arch_strlen1): Likewise. (riscv_estimate_arch_strlen): Likewise. (riscv_arch_str1): Likewise. (riscv_arch_str): Likewise. * elfxx-riscv.h (riscv_arch_str): Declare. binutils/ * readelf.c (get_riscv_section_type_name): New function. (get_section_type_name): Add handler for RISC-V. (riscv_attr_tag_t): Declare. (riscv_attr_tag): New. (display_riscv_attribute): New function. (process_attributes): Add handler for RISC-V. * testsuite/binutils-all/strip-3.d: Remove .riscv.attribute section. gas/ * config/tc-riscv.c (DEFAULT_RISCV_ATTR): Define to 0 if not defined. (riscv_set_options): Add `arch_attr` field. (riscv_opts): Set default value for arch_attr. (riscv_write_out_arch_attr): New. (riscv_set_public_attributes): Likewise. (riscv_md_end): Likewise. (riscv_convert_symbolic_attribute): Likewise. (s_riscv_attribute): Likewise. (explicit_arch_attr): Likewise. (riscv_pseudo_table): Add .attribute to the table. (options): Add OPTION_ARCH_ATTR and OPTION_NO_ARCH_ATTR enumeration constants. (md_longopts): Add `march-attr' and `mno-arch-attr' options. (md_parse_option): Handle the new options. (md_show_usage): Document the `march-attr' option. * config/tc-riscv.h (md_end): Define as riscv_md_end (riscv_md_end): Declare. (CONVERT_SYMBOLIC_ATTRIBUTE): Define as riscv_convert_symbolic_attribute. (riscv_convert_symbolic_attribute): Declare. (start_assemble): Declare. * testsuite/gas/elf/elf.exp: Adjust test case for section2.e. * testsuite/gas/elf/section2.e-riscv: New. * testsuite/gas/riscv/attribute-01.d: New test * testsuite/gas/riscv/attribute-02.d: Likewise. * testsuite/gas/riscv/attribute-03.d: Likewise. * testsuite/gas/riscv/attribute-04.d: Likewise. * testsuite/gas/riscv/attribute-04.s: Likewise. * testsuite/gas/riscv/attribute-05.d: Likewise. * testsuite/gas/riscv/attribute-05.s: Likewise. * testsuite/gas/riscv/attribute-06.d: Likewise. * testsuite/gas/riscv/attribute-06.s: Likewise. * testsuite/gas/riscv/attribute-07.d: Likewise. * testsuite/gas/riscv/attribute-07.s: Likewise. * testsuite/gas/riscv/attribute-08.d: Likewise. * testsuite/gas/riscv/attribute-08.s: Likewise. * testsuite/gas/riscv/attribute-unknown.d: Likewise. * testsuite/gas/riscv/attribute-unknown.s: Likewise. * testsuite/gas/riscv/empty.l: Likewise. * doc/c-riscv.texi (.attribute): Add documentation. * configure.ac (--enable-default-riscv-attribute): New options. * configure: Re-generate. * config.in: Re-generate. include/ * elf/riscv.h (SHT_RISCV_ATTRIBUTES): Define. (Tag_RISCV_arch): Likewise. (Tag_RISCV_priv_spec): Likewise. (Tag_RISCV_priv_spec_minor): Likewise. (Tag_RISCV_priv_spec_revision): Likewise. (Tag_RISCV_unaligned_access): Likewise. (Tag_RISCV_stack_align): Likewise.
2019-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2018-11-13RISC-V: Improve linker error for FP mismatch.Jim Wilson1-1/+28
bfd/ * elfnn-riscv.c (riscv_float_abi_string): New. (_bfd_riscv_elf_merge_private_bfd_data): Use it for error message.
2018-10-04RISC-V: Delete zero-size .tdata.dyn section.Jim Wilson1-1/+2
bfd/ * elfnn-riscv.c (riscv_elf_size_dynamic_sections): In dynobj->sections loop, handle htab->sdyntdata section.
2018-09-27RISC-V: Pc-rel to gp-rel relaxation function cleanup.Jim Wilson1-42/+20
bfd/ * elfnn-riscv.c (riscv_init_pcgp_relocs): Add explanatory comment. (riscv_free_pcgp_relocs, riscv_record_pcgp_reloc): Likewise. (riscv_find_pcgp_hi_reloc, riscv_reocrd_pcgp_lo_reloc): Likewise. (riscv_find_pcgp_lo_reloc): Likewise. (riscv_delete_pcgp_hi_reloc, riscv_use_pcgp_hi_reloc): Delete. (riscv_delete_pcgp_lo_reloc): Likewise. (_bfd_riscv_relax_pc): Don't call riscv_use_pcgp_hi_reloc. Replace calls to riscv_delete_pcgp_lo_reloc and riscv_delete_pcgp_hi_reloc with TRUE. Mark abfd arg as ATTRIBUTE_UNUSED.
2018-09-25RISC-V: Give error for RVE PLTs.Jim Wilson1-8/+36
bfd/ * elfnn-riscv.c (riscv_make_plt_header): New arg output_bfd. Change return type to bfd_boolean. If EF_RISCV_RVE call _bfd_error_handler and return FALSE. Return TRUE at end. (riscv_make_plt_entry): Likewise. (riscv_elf_finish_dynamic_symbol): Update call to riscv_make_plt_entry. (riscv_elf_finish_dynamic_sections): Update call to riscv_make_plt_header.