Age | Commit message (Collapse) | Author | Files | Lines |
|
* ppc.h: Add PPC_OPCODE_ALTIVEC2, PPC_OPCODE_E6500, PPC_OPCODE_TMR.
opcodes/
* ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
* ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
(PPCVEC2, PPCTMR, E6500): New short names.
(powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
optional operands on sync instruction for E6500 target.
bfd/
* archures.c: Add bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500.
* bfd-in2.h: Regenerate.
* cpu-powerpc.c (bfd_powerpc_archs): Add entryies for
bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500.
gas/
* config/tc-ppc.c (md_show_usage): Document -me5500 and -me6500.
(ppc_handle_align): Add termination nop opcode for e500mc family.
* doc/as.texinfo: Document options -me5500 and -me6500.
* doc/c-ppc.texi: Likewise.
gas/testsuite/
* gas/ppc/e500mc64_nop.s: New test case for e500mc family
termination nops.
* gas/ppc/e500mc64_nop.d: Likewise.
* gas/ppc/e5500_nop.s: Likewise.
* gas/ppc/e5500_nop.d: Likewise.
* gas/ppc/e6500_nop.s: Likewise.
* gas/ppc/e6500_nop.d: Likewise.
* gas/ppc/e6500.s: New.
* gas/ppc/e6500.d: Likewise.
* gas/ppc/ppc.exp: Run e6500, e500mc64_nop, e5500_nop, and e6500_nop.
|
|
bfd/
2012-01-31 H.J. Lu <hongjiu.lu@intel.com>
PR ld/13616
* archures.c (bfd_arch_info): Add fill.
(bfd_default_arch_struct): Add bfd_arch_default_fill.
(bfd_arch_default_fill): New.
* configure.in: Set bfd version to 2.22.52.
* configure: Regenerated.
* cpu-alpha.c: Add bfd_arch_default_fill to bfd_arch_info
initializer.
* cpu-arc.c: Likewise.
* cpu-arm.c: Likewise.
* cpu-avr.c: Likewise.
* cpu-bfin.c: Likewise.
* cpu-cr16.c: Likewise.
* cpu-cr16c.c: Likewise.
* cpu-cris.c: Likewise.
* cpu-crx.c: Likewise.
* cpu-d10v.c: Likewise.
* cpu-d30v.c: Likewise.
* cpu-dlx.c: Likewise.
* cpu-epiphany.c: Likewise.
* cpu-fr30.c: Likewise.
* cpu-frv.c: Likewise.
* cpu-h8300.c: Likewise.
* cpu-h8500.c: Likewise.
* cpu-hppa.c: Likewise.
* cpu-i370.c: Likewise.
* cpu-i860.c: Likewise.
* cpu-i960.c: Likewise.
* cpu-ia64.c: Likewise.
* cpu-ip2k.c: Likewise.
* cpu-iq2000.c: Likewise.
* cpu-lm32.c: Likewise.
* cpu-m10200.c: Likewise.
* cpu-m10300.c: Likewise.
* cpu-m32c.c: Likewise.
* cpu-m32r.c: Likewise.
* cpu-m68hc11.c: Likewise.
* cpu-m68hc12.c: Likewise.
* cpu-m68k.c: Likewise.
* cpu-m88k.c: Likewise.
* cpu-mcore.c: Likewise.
* cpu-mep.c: Likewise.
* cpu-microblaze.c: Likewise.
* cpu-mips.c: Likewise.
* cpu-mmix.c: Likewise.
* cpu-moxie.c: Likewise.
* cpu-msp430.c: Likewise.
* cpu-mt.c: Likewise.
* cpu-ns32k.c: Likewise.
* cpu-openrisc.c: Likewise.
* cpu-or32.c: Likewise.
* cpu-pdp11.c: Likewise.
* cpu-pj.c: Likewise.
* cpu-plugin.c: Likewise.
* cpu-powerpc.c: Likewise.
* cpu-rl78.c: Likewise.
* cpu-rs6000.c: Likewise.
* cpu-rx.c: Likewise.
* cpu-s390.c: Likewise.
* cpu-score.c: Likewise.
* cpu-sh.c: Likewise.
* cpu-sparc.c: Likewise.
* cpu-spu.c: Likewise.
* cpu-tic30.c: Likewise.
* cpu-tic4x.c: Likewise.
* cpu-tic54x.c: Likewise.
* cpu-tic6x.c: Likewise.
* cpu-tic80.c: Likewise.
* cpu-tilegx.c: Likewise.
* cpu-tilepro.c: Likewise.
* cpu-v850.c: Likewise.
* cpu-vax.c: Likewise.
* cpu-w65.c: Likewise.
* cpu-we32k.c: Likewise.
* cpu-xc16x.c: Likewise.
* cpu-xstormy16.c: Likewise.
* cpu-xtensa.c: Likewise.
* cpu-z80.c: Likewise.
* cpu-z8k.c: Likewise.
* cpu-i386.c: Include "libiberty.h".
(bfd_arch_i386_fill): New.
Add bfd_arch_i386_fill to bfd_arch_info initializer.
* cpu-k1om.c: Add bfd_arch_i386_fill to bfd_arch_info initializer.
* cpu-l1om.c: Likewise.
* linker.c (default_data_link_order): Call abfd->arch_info->fill
if fill size is 0.
* bfd-in2.h: Regenerated.
include/
2012-01-31 H.J. Lu <hongjiu.lu@intel.com>
PR ld/13616
* bfdlink.h (bfd_link_order): Update comments on data size.
ld/
2012-01-31 H.J. Lu <hongjiu.lu@intel.com>
PR ld/13616
* emulparams/elf32_x86_64.sh: Remove NOP.
* emulparams/elf_i386.sh: Likewise.
* emulparams/elf_i386_be.sh: Likewise.
* emulparams/elf_i386_ldso.sh: Likewise.
* emulparams/elf_i386_vxworks.sh: Likewise.
* emulparams/elf_k1om.sh: Likewise.
* emulparams/elf_l1om.sh: Likewise.
* emulparams/elf_x86_64.sh: Likewise.
* ldlang.c (zero_fill): Initialized to 0.
* ldwrite.c (build_link_order): Set data size to linker odrder
size when they are the same.
* scripttempl/elf.sc: Don't specify fill if NOP is undefined.
ld/testsuite/
2012-01-31 H.J. Lu <hongjiu.lu@intel.com>
PR ld/13616
* ld-i386/tlsbindesc.dd: Update no-op padding.
* ld-i386/tlsnopic.dd: Likewise.
* ld-i386/tlspic.dd: Likewise.
* ld-x86-64/tlsbin.dd: Likewise.
* ld-x86-64/tlsbindesc.dd: Likewise.
* ld-x86-64/tlspic.dd: Likewise.
|
|
* opcode/ppc.h (PPC_OPCODE_TITAN): Define.
bfd/
* archures.c (bfd_mach_ppc_titan): Define.
* bfd-in2.h: Regenerate.
* cpu-powerpc.c (bfd_powerpc_archs): Add titan entry.
opcodes/
* ppc-dis.c (ppc_opts): Add titan entry.
* ppc-opc.c (TITAN, MULHW): Define.
(powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
gas/
* config/tc-ppc.c (md_show_usage): Mention -mtitan. Don't use tabs.
(ppc_mach): Handle titan.
* doc/c-ppc.texi: Mention -mtitan.
gas/testsuite/
* gas/ppc/titan.d, * gas/ppc/titan.s: New test.
* gas/ppc/ppc.exp: Run it.
|
|
* archures.c: Add bfd_mach_ppc_e500mc64.
* bfd-in2.h: Regenerate.
* cpu-powerpc.c (bfd_powerpc_archs): Add entry for
bfd_mach_ppc_e500mc64.
gas/
* config/tc-ppc.c (md_show_usage): Document -me500mc64.
opcodes/
* ppc-dis.c (ppc_opts): Add entry for "e500mc64".
|
|
|
|
|
|
|
|
Many files: Include sysdep.h before bfd.h.
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
binutils/
* bucumm.h: Split off host dependencies to..
* sysdep.h: ..here.
Many files: Include sysdep.h. Remove duplicate headers and reorder.
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
ld/
Many files: Include sysdep.h first. Remove duplicate headers.
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
opcodes/
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
* ns32k-dis.c: Include sysdep.h first.
|
|
|
|
|
|
|
|
|
|
family is a superset of <bfd_arch_rs6000,bfd_mach_rs6k>.
|
|
comparisons of bfd_boolean vars with TRUE/FALSE. Formatting.
|
|
* Makefile.in: Regenerate.
* cpu-avr.c (compatible): Don't use hard-coded mach constants.
* cpu-powerpc.c (powerpc_compatible): Likewise.
* cpu-rs6000.c (rs6000_compatible): Likewise.
|
|
* archures.c (bfd_mach_ppc_e500): Added.
* bfd-in2.h: Rebuilt.
* cpu-powerpc.c (bfd_powerpc_archs): Added e500.
|
|
* elf32-ppc.c (ppc_elf_object_p): New function.
(elf_backend_object_p): Define.
* elf64-ppc.c (ppc64_elf_object_p): New function.
(elf_backend_object_p): Define.
|
|
(bfd_default_set_arch_mach): Use bfd_lookup_arch.
* cpu-powerpc.c (bfd_powerpc_archs): Re-order so that the default
is always at head of list.
|
|
(bfd_powerpc_arch): Rename to bfd_powerpc_archs.
(bfd_powerpc_arch): Define.
* bfd-in2.h: Regenerate.
* cpu-powerpc.c (arch_info_struct): Rename to bfd_powerpc_archs.
(bfd_powerpc_arch): Move to tail of bfd_powerpc_archs.
(bfd_powerpc_archs): Add default powerpc64 arch.
* gas/ppc/test1elf64.d: Tweak arch name.
|
|
targ64_selvecs for 32 bit powerpc targets.
* Makefile.am (BFD64_BACKENDS): Add elf64-ppc.lo.
(BFD64_BACKENDS_CFILES): Add elf64-ppc.c.
Run "make dep-am".
* Makefile.in: Regenerate.
* configure.in: Add elf64_powerpc vecs.
* configure: Regenerate.
* cpu-powerpc.c: Default to bfd_mach_ppc_620 entry for 64 bit.
* elf.c (prep_headers): EM_PPC64 for 64 bit ppc elf target.
* targets.c: Add bfd_elf64_powerpc_vec and bfd_elf64_powerpcle_vec.
* elf64-ppc.c: New file.
* reloc.c: Add powerpc64 relocs.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
|
|
|
|
* cpu-a29k.c: Fix formatting.
* cpu-alpha.c: Likewise.
* cpu-arm.c: Likewise.
* cpu-avr.c: Likewise.
* cpu-d10v.c: Likewise.
* cpu-h8500.c: Likewise.
* cpu-hppa.c: Likewise.
* cpu-i370.c: Likewise.
* cpu-i386.c: Likewise.
* cpu-i960.c: Likewise.
* cpu-ia64-opc.c: Likewise.
* cpu-ia64.c: Likewise.
* cpu-m32r.c: Likewise.
* cpu-m68hc11.c: Likewise.
* cpu-m68hc12.c: Likewise.
* cpu-m68k.c: Likewise.
* cpu-m88k.c: Likewise.
* cpu-mips.c: Likewise.
* cpu-ns32k.c: Likewise.
* cpu-pj.c: Likewise.
* cpu-powerpc.c: Likewise.
* cpu-sh.c: Likewise.
* cpu-sparc.c: Likewise.
* cpu-tic54x.c: Likewise.
* cpu-v850.c: Likewise.
* cpu-vax.c: Likewise.
* cpu-w65.c: Likewise.
* cpu-we32k.c: Likewise.
* cpu-z8k.c: Likewise.
|
|
* cpu-powerpc.c (arch_info_struct): Added MPC860 Family entry.
|
|
PowerPc and RS6000 machine numbers.
* bfd-in2.h: Regenerate.
* coffcode.h (coff_set_arch_mach_hook): #ifdef XCOFF64, set arch
to bfd_arch_powerpc instead of bfd_arch_rs6000. Refer to PowerPc
and RS6000 machine numbers using #defined constants from
archures.c.
* cpu-powerpc.c (arch_info_struct): Refer to PowerPc and RS6000
machine numbers using #defined constants from archures.c. Add
entries for EC603e, 630, A35, RS64II, RS64III, 7400. Specify
64-bit words in 620 entry.
* cpu-rs6000.c (arch_info_struct): Create with entries for RS1,
RSC, and RS2.
(bfd_rs6000_arch): Change default machine to 0 (bfd_mach_rs6k).
|
|
bfd:
* Makefile.am (coff64-rs6000.lo): New rule.
* Makefile.in: Regenerate.
* coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data,
xcoff_is_local_label_name, xcoff_rtype2howto,
xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p,
xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap,
xcoff_write_archive_contents): No longer static, and prefix with _bfd_.
(NO_COFF_SYMBOLS): Define.
(xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in,
xcoff64_swap_aux_out): New functions; handle xcoff symbol tables
internally.
(MINUS_ONE): New macro.
(xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS
relocation.
(coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in,
coff_SWAP_aux_out): Map to the new functions.
* coff64-rs6000.c: New file.
* libcoff.h (bfd_coff_backend_data): Add new fields
_bfd_coff_force_symnames_in_strings and
_bfd_coff_debug_string_prefix_length.
(bfd_coff_force_symnames_in_strings,
bfd_coff_debug_string_prefix_length): New macros for above fields.
* coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic.
Set machine to 620 for XCOFF64. Use bfd_coff_swap_sym_in instead
of using coff_swap_sym_in directly.
(FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64.
(coff_set_flags) Set magic for XCOFF64.
(coff_compute_section_file_positions): Add symbol name length to
string section length if bfd_coff_debug_string_prefix_length is
true.
(coff_write_object_contents): Don't do reloc overflow for XCOFF64.
(coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of
using coff_swap_lineno_in directly.
(bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings
and _bfd_coff_debug_string_prefix_length fields.
* coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force
symbol names into strings table when
bfd_coff_force_symnames_in_strings is true.
* coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR,
SET_RELOC_VADDR): New macros.
(coff_swap_reloc_in, coff_swap_reloc_out): Use above macros.
(coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C
code.
(coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64
changes within RS6000COFF_C specific code.
(coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC,
MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO.
* reloc.c (bfd_perform_relocation, bfd_install_relocation):
Extend existing hack on target name.
* xcofflink.c (XCOFF_XVECP): Extend existing hack on
target name.
* coff-tic54x.c (ticof): Keep up to date with new fields
in bfd_coff_backend_data.
* config.bfd: Add bfd_powerpc_64_arch to targ_arch and define
targ_selvecs to include rs6000coff64_vec for rs6000.
* configure.in: Add rs6000coff64_vec case.
* cpu-powerpc.c: New bfd_arch_info_type.
gas:
* as.c (parse_args): Allow md_parse_option to override -a listing
option.
* config/obj-coff.c (add_lineno): Change type of offset parameter
from "int" to "bfd_vma."
* config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine."
(ppc_mach, ppc_subseg_align, ppc_target_format): New.
(ppc_change_csect): Align correctly for XCOFF64.
(ppc_machine): New function, which discards "ppc_machine" line.
(ppc_tc): Cons for 8 when code is 64 bit.
(md_apply_fix3): Don't check operand->insert. Handle 64 bit
relocations.
(md_parse_option): Handle -a64 and -a32.
(ppc_xcoff64): New.
* config/tc-ppc.h (TARGET_MACH): Define.
(TARGET_FORMAT): Move to function.
(SUB_SEGMENT_ALIGN): Use ppc_subseg_align.
include:
* include/coff/rs6k64.h: New file.
opcodes:
* configure.in: Add bfd_powerpc_64_arch.
* disassemble.c (disassembler): Use print_insn_big_powerpc for
64 bit code.
|
|
|