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The general rule for bfd_arch_info_type->compatible (A, B) is that if A and B
are compatible, then this function should return architecture that is more
"feature-rich", that is, can run both A and B. ARCv2, EM and HS all has same
mach number, so bfd_default_compatible assumes they are the same, and returns
an A. That causes issues with GDB, because GDB assumes that if machines are
compatible, then "compatible ()" always returns same machine regardless of
argument order. As a result GDB gets confused because, for example,
compatible(ARCv2, EM) returns ARCv2, but compatible(EM, ARCv2) returns EM,
hence GDB is not sure if they are compatible and prints a warning.
bfd/ChangeLog:
yyyy-mm-dd Anton Kolesov Anton.Kolesov@synopsys.com
cpu-arc.c (arc_compatible): New function.
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ARC600 is already defined as the head of the bfd_arch_arc.
bfd/ChangeLog:
yyyy-mm-dd Anton Kolesov <anton.kolesov@synopsys.com>
* cpu-arc.c (arch_info_struct): Remove duplicate ARC600 entry.
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In the ARC assembler, when a cpu type is specified using the .cpu
directive, we rely on the bfd list of arc machine types in order to
validate the cpu name passed in.
This validation is only used in order to check that the cpu type passed
to the .cpu directive matches any machine type selected earlier on the
command line. Once that initial check has passed a full check is
performed using the assemblers internal list of know cpu types.
The problem is that the assembler knows about more cpu types than bfd,
some cpu types known by the assembler are actually aliases for a base
cpu type plus a specific set of assembler extensions. One such example
is NPS400, though more could be added later.
This commit removes the need for the assembler to use the bfd list of
machine types for validation. Instead the error checking, to ensure
that any value passed to a '.cpu' directive matches any earlier command
line selection, is moved into the function arc_select_cpu.
I have taken the opportunity to bundle the 4 separate static globals
that describe the currently selected machine type into a single
structure (called selected_cpu).
gas/ChangeLog:
* config/tc-arc.c (arc_target): Delete.
(arc_target_name): Delete.
(arc_features): Delete.
(arc_mach_type): Delete.
(mach_type_specified_p): Delete.
(enum mach_selection_type): New enum.
(mach_selection_mode): New static global.
(selected_cpu): New static global.
(arc_eflag): Rename to ...
(arc_initial_eflag): ...this, and make const.
(arc_select_cpu): Update comment, new parameter, check how
previous machine type selection was made, and record this
selection. Use selected_cpu instead of old globals.
(arc_option): Remove use of arc_get_mach, instead use
arc_select_cpu to validate machine type selection. Use
selected_cpu over old globals.
(allocate_tok): Use selected_cpu over old globals.
(find_opcode_match): Likewise.
(assemble_tokens): Likewise.
(arc_cons_fix_new): Likewise.
(arc_extinsn): Likewise.
(arc_extcorereg): Likewise.
(md_begin): Update default machine type selection, use
selected_cpu over old globals.
(md_parse_option): Update machine type selection option handling,
use selected_cpu over old globals.
* testsuite/gas/arc/nps400-0.s: Add .cpu directive.
bfd/ChangeLog:
* cpu-arc.c (arc_get_mach): Delete.
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gas * config/tc-arc.c (check_cpu_feature, md_parse_option):
Add nps400 option and feature. Add check for nps400
feature. Refactor existing checks to check subclass before
feature enablement.
(md_show_usage): Document flags for NPS-400 and add some other
undocumented flags.
(cpu_type): Remove nps400 CPU type entry
(check_zol): Remove bfd_mach_arc_nps400 case.
(md_show_usage): Add help on -mcpu=nps400.
(cpu_types): Add entry for nps400 as arc700 plus nps400 extension
set.
* doc/c-arc.texi: Document the -mnps400, -mspfp, -mdpfp, and
-fpuda flags. Document -mcpu=nps400.
* testsuite/gas/arc/nps-400-0.d: Use -mcpu=arc700 -mnps400. Change
expected flags to match ARC700 instead of NPS400.
* testsuite/gas/arc/nps-400-1.d: Use -mcpu=arc700 -mnps400.
* testsuite/gas/arc/nps-400-2.d: Likewise.
* testsuite/gas/arc/nps-400-3.d: Likewise.
* testsuite/gas/arc/nps-400-4.d: Likewise.
* testsuite/gas/arc/nps-400-5.d: Likewise.
* testsuite/gas/arc/nps-400-6.d: Likewise.
* testsuite/gas/arc/nps-400-7.d: Likewise.
* testsuite/gas/arc/textinsn2op01.s: Change opcode of myinsn to
avoid clash with cbba instruction.
* testsuite/gas/arc/textinsn2op01.d: Likewise.
* testsuite/gas/arc/textinsn3op.d: Likewise.
* testsuite/gas/arc/textinsn3op.s: Likewise.
* testsuite/gas/arc/nps-400-0.d: Test using NPS-400 using
-mcpu=nps400 as an alternative to -mcpu=arc700 -mnps400 flags.
binutils* readelf.c (decode_ARC_machine_flags): Remove E_ARC_MACH_NPS400
case.
ld * testsuite/ld-arc/nps-1a.d: Use -mcpu=arc700 -mnps400.
* testsuite/ld-arc/nps-1b.d: Likewise.
include * opcode/arc.h: Add nps400 extension and instruction
subclass.
Remove ARC_OPCODE_NPS400
* elf/arc.h: Remove E_ARC_MACH_NPS400
opcodes * arc-dis.c (arc_insn_length): Add comment on instruction length.
Use same method for determining instruction length on ARC700 and
NPS-400.
(arc_insn_length, print_insn_arc): Remove bfd_mach_arc_nps400.
* arc-nps400-tbl.h: Make all nps400 instructions ARC700 instructions
with the NPS400 subclass.
* arc-opc.c: Likewise.
bfd * archures.c: Remove bfd_mach_arc_nps400.
* bfd-in2.h: Likewise.
* cpu-arc.c (arch_info_struct): Likewise.
* elf32-arc.c (arc_elf_object_p, arc_elf_final_write_processing):
Likewise.
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This commit introduces the nps400 machine type as a variant of arc.
There's a new flag in the assembler to select this machine type. All
other changes are just adding handling of the new machine type into the
relevant places.
The nps400 is an arc700 variant with some vendor specific instructions
added into the instruction set. This commit does not add any of the new
instructions, this is just laying the groundwork for future commits.
However, in preparation for these new instructions a new opcode define for
nps400 has been added to include/opcode/arc.h, this new opcode define is
used in the assembler and disassembler along with the existing define
for arc700 such that when assembling and disassembling for nps400 the
user will have access to all arc700 instructions and all the nps400
vendor extension instructions.
bfd/ChangeLog:
* archures.c (bfd_mach_arc_nps400): Define.
* bfd-in2.h: Regenerate.
* cpu-arc.c (arch_info_struct): New entry for nps400, renumber
some existing entries to make space.
* elf32-arc.c (arc_elf_object_p): Add nps400 case.
(arc_elf_final_write_processing): Likewise.
binutils/ChangeLog:
* readelf.c (decode_ARC_machine_flags): Handle nps400.
gas/ChangeLog:
* config/tc-arc.c (cpu_types): Add nps400 entry.
(check_zol): Handle nps400.
include/ChangeLog:
* elf/arc.h (E_ARC_MACH_NPS400): Define.
* opcode/arc.h (ARC_OPCODE_NPS400): Define.
opcodes/ChangeLog:
* arc-dis.c (print_insn_arc): Handle nps400.
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lowest possible value, and hence can be merged with other ARC binaries wihtout changing their architecture value.
bfd * cpu-arc.c: Change default archure from bfd_mach_arc_arcv2
to bfd_mach_arc_arc600.
binutils * testsuite/binutils-all/objdump.exp: Update expected default
architecture value for ARC binaries.
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bfd * archures.c: Remove support for older ARC. Added support for new
ARC cpus (ARC600, ARC601, ARC700, ARCV2).
* bfd-in2.h: Likewise.
* config.bfd: Likewise.
* cpu-arc.c: Likewise.
* elf32-arc.c: Totally changed file with a refactored
inplementation of the ARC port.
* libbfd.h: Added ARC specific relocation types.
* reloc.c: Likewise.
gas * config/tc-arc.c: Revamped file for ARC support.
* config/tc-arc.h: Likewise.
* doc/as.texinfo: Add new ARC options.
* doc/c-arc.texi: Likewise.
ld * configure.tgt: Added target arc-*-elf* and arc*-*-linux-uclibc*.
* emulparams/arcebelf_prof.sh: New file
* emulparams/arcebelf.sh: Likewise.
* emulparams/arceblinux_prof.sh: Likewise.
* emulparams/arceblinux.sh: Likewise.
* emulparams/arcelf_prof.sh: Likewise.
* emulparams/arcelf.sh: Likewise.
* emulparams/arclinux_prof.sh: Likewise.
* emulparams/arclinux.sh: Likewise.
* emulparams/arcv2elfx.sh: Likewise.
* emulparams/arcv2elf.sh: Likewise.
* emultempl/arclinux.em: Likewise.
* scripttempl/arclinux.sc: Likewise.
* scripttempl/elfarc.sc: Likewise.
* scripttempl/elfarcv2.sc: Likewise
* Makefile.am: Add new ARC emulations.
* Makefile.in: Regenerate.
* NEWS: Mention the new feature.
opcodes * arc-dis.c: Revamped file for ARC support
* arc-dis.h: Likewise.
* arc-ext.c: Likewise.
* arc-ext.h: Likewise.
* arc-opc.c: Likewise.
* arc-fxi.h: New file.
* arc-regs.h: Likewise.
* arc-tbl.h: Likewise.
binutils * readelf.c (get_machine_name): Remove A5 reference. Add ARCompact
and ARCv2.
(get_machine_flags): Handle EM_ARCV2 and EM_ARCOMPACT.
(guess_is_rela): Likewise.
(dump_relocations): Likewise.
(is_32bit_abs_reloc): Likewise.
(is_16bit_abs_reloc): Likewise.
(is_none_reloc): Likewise.
* NEWS: Mention the new feature.
include * dis-asm.h (arc_get_disassembler): Correct declaration.
* arc-reloc.def: Macro file with definition of all relocation
types.
* arc.h: Changed macros for the newly supported ARC cpus. Altered
enum defining the supported relocations.
* common.h: Changed EM_ARC_A5 definition to EM_ARC_COMPACT. Added
macro for EM_ARC_COMPACT2.
* arc-func.h: New file.
* arc.h: Likewise.
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* archive.c: Likewise.
* cache.c: Likewise.
* cisco-core.c: Likewise.
* coff-alpha.c: Likewise.
* coff-apollo.c: Likewise.
* coff-aux.c: Likewise.
* coff-h8300.c: Likewise.
* coff-h8500.c: Likewise.
* coff-i386.c: Likewise.
* coff-i960.c: Likewise.
* coff-ia64.c: Likewise.
* coff-m68k.c: Likewise.
* coff-m88k.c: Likewise.
* coff-mcore.c: Likewise.
* coff-mips.c: Likewise.
* coff-or32.c: Likewise.
* coff-ppc.c: Likewise.
* coff-rs6000.c: Likewise.
* coff-sh.c: Likewise.
* coff-sparc.c: Likewise.
* coff-stgo32.c: Likewise.
* coff-tic30.c: Likewise.
* coff-tic4x.c: Likewise.
* coff-tic54x.c: Likewise.
* coff-tic80.c: Likewise.
* coff-w65.c: Likewise.
* cofflink.c: Likewise.
* cpu-arc.c: Likewise.
* cpu-cris.c: Likewise.
* cpu-h8500.c: Likewise.
* cpu-i960.c: Likewise.
* cpu-msp430.c: Likewise.
* cpu-ns32k.c: Likewise.
* cpu-powerpc.c: Likewise.
* cpu-rs6000.c: Likewise.
* cpu-tic4x.c: Likewise.
* cpu-w65.c: Likewise.
* ecoff.c: Likewise.
* ecofflink.c: Likewise.
* elf-m10200.c: Likewise.
* elf32-bfin.c: Likewise.
* elf32-cris.c: Likewise.
* elf32-crx.c: Likewise.
* elf32-fr30.c: Likewise.
* elf32-frv.c: Likewise.
* elf32-h8300.c: Likewise.
* elf32-i960.c: Likewise.
* elf32-m32c.c: Likewise.
* elf32-m68hc11.c: Likewise.
* elf32-m68hc12.c: Likewise.
* elf32-m68hc1x.c: Likewise.
* elf32-m68k.c: Likewise.
* elf32-mcore.c: Likewise.
* elf32-rl78.c: Likewise.
* elf32-rx.c: Likewise.
* elf32-s390.c: Likewise.
* elf32-vax.c: Likewise.
* elf64-alpha.c: Likewise.
* elf64-mmix.c: Likewise.
* elf64-s390.c: Likewise.
* elf64-sparc.c: Likewise.
* elfnn-ia64.c: Likewise.
* elfxx-mips.c: Likewise.
* elfxx-sparc.c: Likewise.
* hash.c: Likewise.
* hp300hpux.c: Likewise.
* hppabsd-core.c: Likewise.
* hpux-core.c: Likewise.
* i386dynix.c: Likewise.
* i386linux.c: Likewise.
* i386lynx.c: Likewise.
* i386mach3.c: Likewise.
* i386msdos.c: Likewise.
* i386os9k.c: Likewise.
* irix-core.c: Likewise.
* lynx-core.c: Likewise.
* m68klinux.c: Likewise.
* mach-o.h: Likewise.
* mipsbsd.c: Likewise.
* netbsd-core.c: Likewise.
* nlm32-i386.c: Likewise.
* osf-core.c: Likewise.
* pc532-mach.c: Likewise.
* pef.c: Likewise.
* ppcboot.c: Likewise.
* ptrace-core.c: Likewise.
* reloc16.c: Likewise.
* sco5-core.c: Likewise.
* som.h: Likewise.
* sparclinux.c: Likewise.
* sparclynx.c: Likewise.
* ticoff.h: Likewise.
* trad-core.c: Likewise.
* vms-lib.c: Likewise.
* xsym.h: Likewise.
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bfd/
2012-01-31 H.J. Lu <hongjiu.lu@intel.com>
PR ld/13616
* archures.c (bfd_arch_info): Add fill.
(bfd_default_arch_struct): Add bfd_arch_default_fill.
(bfd_arch_default_fill): New.
* configure.in: Set bfd version to 2.22.52.
* configure: Regenerated.
* cpu-alpha.c: Add bfd_arch_default_fill to bfd_arch_info
initializer.
* cpu-arc.c: Likewise.
* cpu-arm.c: Likewise.
* cpu-avr.c: Likewise.
* cpu-bfin.c: Likewise.
* cpu-cr16.c: Likewise.
* cpu-cr16c.c: Likewise.
* cpu-cris.c: Likewise.
* cpu-crx.c: Likewise.
* cpu-d10v.c: Likewise.
* cpu-d30v.c: Likewise.
* cpu-dlx.c: Likewise.
* cpu-epiphany.c: Likewise.
* cpu-fr30.c: Likewise.
* cpu-frv.c: Likewise.
* cpu-h8300.c: Likewise.
* cpu-h8500.c: Likewise.
* cpu-hppa.c: Likewise.
* cpu-i370.c: Likewise.
* cpu-i860.c: Likewise.
* cpu-i960.c: Likewise.
* cpu-ia64.c: Likewise.
* cpu-ip2k.c: Likewise.
* cpu-iq2000.c: Likewise.
* cpu-lm32.c: Likewise.
* cpu-m10200.c: Likewise.
* cpu-m10300.c: Likewise.
* cpu-m32c.c: Likewise.
* cpu-m32r.c: Likewise.
* cpu-m68hc11.c: Likewise.
* cpu-m68hc12.c: Likewise.
* cpu-m68k.c: Likewise.
* cpu-m88k.c: Likewise.
* cpu-mcore.c: Likewise.
* cpu-mep.c: Likewise.
* cpu-microblaze.c: Likewise.
* cpu-mips.c: Likewise.
* cpu-mmix.c: Likewise.
* cpu-moxie.c: Likewise.
* cpu-msp430.c: Likewise.
* cpu-mt.c: Likewise.
* cpu-ns32k.c: Likewise.
* cpu-openrisc.c: Likewise.
* cpu-or32.c: Likewise.
* cpu-pdp11.c: Likewise.
* cpu-pj.c: Likewise.
* cpu-plugin.c: Likewise.
* cpu-powerpc.c: Likewise.
* cpu-rl78.c: Likewise.
* cpu-rs6000.c: Likewise.
* cpu-rx.c: Likewise.
* cpu-s390.c: Likewise.
* cpu-score.c: Likewise.
* cpu-sh.c: Likewise.
* cpu-sparc.c: Likewise.
* cpu-spu.c: Likewise.
* cpu-tic30.c: Likewise.
* cpu-tic4x.c: Likewise.
* cpu-tic54x.c: Likewise.
* cpu-tic6x.c: Likewise.
* cpu-tic80.c: Likewise.
* cpu-tilegx.c: Likewise.
* cpu-tilepro.c: Likewise.
* cpu-v850.c: Likewise.
* cpu-vax.c: Likewise.
* cpu-w65.c: Likewise.
* cpu-we32k.c: Likewise.
* cpu-xc16x.c: Likewise.
* cpu-xstormy16.c: Likewise.
* cpu-xtensa.c: Likewise.
* cpu-z80.c: Likewise.
* cpu-z8k.c: Likewise.
* cpu-i386.c: Include "libiberty.h".
(bfd_arch_i386_fill): New.
Add bfd_arch_i386_fill to bfd_arch_info initializer.
* cpu-k1om.c: Add bfd_arch_i386_fill to bfd_arch_info initializer.
* cpu-l1om.c: Likewise.
* linker.c (default_data_link_order): Call abfd->arch_info->fill
if fill size is 0.
* bfd-in2.h: Regenerated.
include/
2012-01-31 H.J. Lu <hongjiu.lu@intel.com>
PR ld/13616
* bfdlink.h (bfd_link_order): Update comments on data size.
ld/
2012-01-31 H.J. Lu <hongjiu.lu@intel.com>
PR ld/13616
* emulparams/elf32_x86_64.sh: Remove NOP.
* emulparams/elf_i386.sh: Likewise.
* emulparams/elf_i386_be.sh: Likewise.
* emulparams/elf_i386_ldso.sh: Likewise.
* emulparams/elf_i386_vxworks.sh: Likewise.
* emulparams/elf_k1om.sh: Likewise.
* emulparams/elf_l1om.sh: Likewise.
* emulparams/elf_x86_64.sh: Likewise.
* ldlang.c (zero_fill): Initialized to 0.
* ldwrite.c (build_link_order): Set data size to linker odrder
size when they are the same.
* scripttempl/elf.sc: Don't specify fill if NOP is undefined.
ld/testsuite/
2012-01-31 H.J. Lu <hongjiu.lu@intel.com>
PR ld/13616
* ld-i386/tlsbindesc.dd: Update no-op padding.
* ld-i386/tlsnopic.dd: Likewise.
* ld-i386/tlspic.dd: Likewise.
* ld-x86-64/tlsbin.dd: Likewise.
* ld-x86-64/tlsbindesc.dd: Likewise.
* ld-x86-64/tlspic.dd: Likewise.
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Many files: Include sysdep.h before bfd.h.
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
binutils/
* bucumm.h: Split off host dependencies to..
* sysdep.h: ..here.
Many files: Include sysdep.h. Remove duplicate headers and reorder.
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
ld/
Many files: Include sysdep.h first. Remove duplicate headers.
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
opcodes/
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
* ns32k-dis.c: Include sysdep.h first.
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comparisons of bfd_boolean vars with TRUE/FALSE. Formatting.
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o bfd_read and bfd_write lose an unnecessary param and become
bfd_bread and bfd_bwrite.
o bfd_*alloc now all take a bfd_size_type arg, and will error if
size_t is too small. eg. 32 bit host, 64 bit bfd, verrry big files
or bugs in linker scripts etc.
o file_ptr becomes a bfd_signed_vma. Besides matching sizes with
various other types involved in handling sections, this should make
it easier for bfd to support a 64 bit off_t on 32 bit hosts that
provide it.
o I've made the H_GET_* and H_PUT_* macros (which invoke bfd_h_{get,put}_*)
generally available. They now cast their args to bfd_vma and
bfd_byte * as appropriate, which removes a swag of casts from the
source.
o Bug fixes to bfd_get8, aix386_core_vec, elf32_h8_relax_section, and
aout-encap.c.
o Zillions of formatting and -Wconversion fixes.
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