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path: root/bfd/bfd-in2.h
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2019-12-11Make bfd_get_8 return a bfd_vma like other bfd_get_* functionsAlan Modra1-2/+2
And similarly for bfd_get_signed_8. bfd/ * libbfd.c (bfd_get_8): Return a bfd_vma. (bfd_get_signed_8): Return a bfd_signed_vma. * bfd-in2.h: Regenerate. binutils/ * od-xcoff.c (dump_dumpx_core): Adjust for bfd_h_get_8 change.
2019-11-25Pass section when available to bfd_octets_per_byteAlan Modra1-1/+1
and other tidies. I think it's better to default to passing the section to bfd_octets_per_byte, even in cases where we know it won't make a difference. A number of the coff reloc functions used bfd_octets_per_byte wrongly, not factoring it into the offset into the data buffer. As it happens, the targets using those files always had bfd_octets_per_byte equal to one, so there wasn't any detectable wrong behaviour. However, it is wrong in the source and might cause trouble for anyone creating a new target. Besides fixing that, the patch also defines OCTETS_PER_BYTE as one in target files where that is appropriate. bfd/ * archures.c (bfd_octets_per_byte): Tail call bfd_arch_mach_octets_per_byte. * coff-arm.c (OCTETS_PER_BYTE): Define. (coff_arm_reloc): Introduce new "octets" temp. Use OCTETS_PER_BYTE with section. Correct "addr". Remove ATTRIBUTE_UNUSED. * coff-i386.c (coff_i386_reloc): Similarly. * coff-mips.c (mips_reflo_reloc): Similarly. * coff-x86_64.c (coff_amd64_reloc): Similarly. * elf32-msp430.c (OCTETS_PER_BYTE): Define. (rl78_sym_diff_handler): Use OCTETS_PER_BYTE, with section. * elf32-nds32.c (nds32_elf_get_relocated_section_contents): Similarly. * elf32-ppc.c (ppc_elf_addr16_ha_reloc): Similarly. * elf32-pru.c (pru_elf32_do_ldi32_relocate): Similarly. * elf32-s12z.c (opru18_reloc): Similarly. * elf32-sh.c (sh_elf_reloc): Similarly. * elf32-spu.c (spu_elf_rel9): Similarly. * elf32-xtensa.c (bfd_elf_xtensa_reloc): Similarly. * elf64-ppc.c (ppc64_elf_ha_reloc, ppc64_elf_brtaken_reloc), (ppc64_elf_toc64_reloc): Similarly. * bfd.c (bfd_get_section_limit): Pass section to bfd_octets_per_byte. * cofflink.c (_bfd_coff_link_input_bfd), (_bfd_coff_reloc_link_order): Likewise. * elf.c (_bfd_elf_section_offset): Likewise. * elflink.c (resolve_section, bfd_elf_perform_complex_relocation), (elf_link_input_bfd, elf_reloc_link_order, elf_fixup_link_order), (bfd_elf_final_link): Likewise. * elf.c (_bfd_elf_make_section_from_shdr): Don't strncmp twice to set SEC_ELF_OCTETS. * reloc.c (bfd_perform_relocation): Tidy SEC_ELF_OCTETS special case. (bfd_install_relocation): Likewise. (_bfd_final_link_relocate): Don't recalculate octets. * syms.c (_bfd_stab_section_find_nearest_line): Introduc new "octets" temp. * bfd-in2.h: Regenerate. ld/ * ldexp.c (fold_name): Pass section to bfd_octets_per_byte. * ldlang.c (init_opb): Don't call bfd_arch_mach_octets_per_byte unnecessarily.
2019-11-25Introduce new section flag: SEC_ELF_OCTETSChristian Eggers1-2/+9
All symbols, sizes and relocations in this section are octets instead of bytes. Required for DWARF debug sections as DWARF information is organized in octets, not bytes. bfd/ * section.c (struct bfd_section): New flag SEC_ELF_OCTETS. * archures.c (bfd_octets_per_byte): New parameter sec. If section is not NULL and SEC_ELF_OCTETS is set, one octet es returned [ELF targets only]. * bfd.c (bfd_get_section_limit): Provide section parameter to bfd_octets_per_byte. * bfd-in2.h: regenerate. * binary.c (binary_set_section_contents): Move call to bfd_octets_per_byte into section loop. Provide section parameter to bfd_octets_per_byte. * coff-arm.c (coff_arm_reloc): Provide section parameter to bfd_octets_per_byte. * coff-i386.c (coff_i386_reloc): likewise. * coff-mips.c (mips_reflo_reloc): likewise. * coff-x86_64.c (coff_amd64_reloc): likewise. * cofflink.c (_bfd_coff_link_input_bfd): likewise. (_bfd_coff_reloc_link_order): likewise. * elf.c (_bfd_elf_section_offset): likewise. (_bfd_elf_make_section_from_shdr): likewise. Set SEC_ELF_OCTETS for sections with names .gnu.build.attributes, .debug*, .zdebug* and .note.gnu*. * elf32-msp430.c (rl78_sym_diff_handler): Provide section parameter to bfd_octets_per_byte. * elf32-nds.c (nds32_elf_get_relocated_section_contents): likewise. * elf32-ppc.c (ppc_elf_addr16_ha_reloc): likewise. * elf32-pru.c (pru_elf32_do_ldi32_relocate): likewise. * elf32-s12z.c (opru18_reloc): likewise. * elf32-sh.c (sh_elf_reloc): likewise. * elf32-spu.c (spu_elf_rel9): likewise. * elf32-xtensa.c (bfd_elf_xtensa_reloc): likewise * elf64-ppc.c (ppc64_elf_brtaken_reloc): likewise. (ppc64_elf_addr16_ha_reloc): likewise. (ppc64_elf_toc64_reloc): likewise. * elflink.c (bfd_elf_final_link): likewise. (bfd_elf_perform_complex_relocation): likewise. (elf_fixup_link_order): likewise. (elf_link_input_bfd): likewise. (elf_link_sort_relocs): likewise. (elf_reloc_link_order): likewise. (resolve_section): likewise. * linker.c (_bfd_generic_reloc_link_order): likewise. (bfd_generic_define_common_symbol): likewise. (default_data_link_order): likewise. (default_indirect_link_order): likewise. * srec.c (srec_set_section_contents): likewise. (srec_write_section): likewise. * syms.c (_bfd_stab_section_find_nearest_line): likewise. * reloc.c (_bfd_final_link_relocate): likewise. (bfd_generic_get_relocated_section_contents): likewise. (bfd_install_relocation): likewise. For section which have SEC_ELF_OCTETS set, multiply output_base and output_offset with bfd_octets_per_byte. (bfd_perform_relocation): likewise. include/ * coff/ti.h (GET_SCNHDR_SIZE, PUT_SCNHDR_SIZE, GET_SCN_SCNLEN), (PUT_SCN_SCNLEN): Adjust bfd_octets_per_byte calls. binutils/ * objdump.c (disassemble_data): Provide section parameter to bfd_octets_per_byte. (dump_section): likewise (dump_section_header): likewise. Show SEC_ELF_OCTETS flag if set. gas/ * as.h: Define SEC_OCTETS as SEC_ELF_OCTETS if OBJ_ELF. * dwarf2dbg.c: (dwarf2_finish): Set section flag SEC_OCTETS for .debug_line, .debug_info, .debug_abbrev, .debug_aranges, .debug_str and .debug_ranges sections. * write.c (maybe_generate_build_notes): Set section flag SEC_OCTETS for .gnu.build.attributes section. * frags.c (frag_now_fix): Don't divide by OCTETS_PER_BYTE if SEC_OCTETS is set. * symbols.c (resolve_symbol_value): Likewise. ld/ * ldexp.c (fold_name): Provide section parameter to bfd_octets_per_byte. * ldlang (init_opb): New argument s. Set opb_shift to 0 if SEC_ELF_OCTETS for the current section is set. (print_input_section): Pass current section to init_opb. (print_data_statement,print_reloc_statement, print_padding_statement): Likewise. (lang_check_section_addresses): Call init_opb for each section. (lang_size_sections_1,lang_size_sections_1, lang_do_assignments_1): Likewise. (lang_process): Pass NULL to init_opb.
2019-11-18PR25196, abort in rewrite_elf_program_headerAlan Modra1-0/+1
This patch introduces a new "sorry, cannot handle this file" bfd error status. The idea is to use this error in cases where bfd hasn't found a bfd_bad_value error, ie. an input file or set of options that are invalid, but rather an input file that is simply too difficult to process. Typically this might happen with fuzzed object files such as the one in the PR, a wildly improbable core file. Some things are just not worth wasting time over to fix "properly". PR 25196 * bfd.c (bfd_error_type): Add bfd_error_sorry. (bfd_errmsgs): Likewise. * elf.c (rewrite_elf_program_header): Don't abort on confused lma/alignment. Replace bfd_error_bad_value with bfd_error_sorry. (_bfd_elf_validate_reloc): Use bfd_error_sorry. (_bfd_elf_final_write_processing): Likewise. * bfd-in2.h: Regenerate.
2019-11-07Remove CR16C supportAlan Modra1-44/+0
I think it is past time to remove CR16C support. CR16C was added in 2004, and only for ld. gas and binutils support is lacking, and there have been no commits to bfd/elf32-cr16c.c other than warning fixes or global maintainers making changes to all targets. I see no maintainer listed for CR16C, and no commits from anyone at NSC supporting the target. Furthermore, at the time the CR16 support was added in 2007, config.sub was changed upstream to no longer recognise cr16c as a valid cpu. That means the CR16C ld support is only available as a secondary target by configuring with, for example, --enable-targets=all or --enable-targets=cr16c-unknown-elf. No testing of the CR16C target is possible. include/ * elf/cr16c.h: Delete. bfd/ * cpu-cr16c.c: Delete. * elf32-cr16c.c: Delete. * Makefile.am, * archures.c, * config.bfd, * configure.ac, * reloc.c, * targets.c: Remove cr16c support. * Makefile.in, * bfd-in2.h, * configure, * libbfd.h, * po/SRC-POTFILES.in: Regenerate. ld/ * emulparams/elf32cr16c.sh: Delete. * scripttempl/elf32cr16c.sc: Delete. * Makefile.am, * configure.tgt: Remove cr16c support. * NEWS: Mention removal of cr16c. * Makefile.in, * po/BLD-POTFILES.in: Regenerate.
2019-10-21ar P supportAlan Modra1-1/+4
This patch extends "ar P" to allow creation of normal (as distinct from thin) archives with full path names. PR 452 PR 25104 bfd/ * archive.c (normalize): Return file unchanged when BFD_ARCHIVE_FULL_PATH. (_bfd_construct_extended_name_table): Pass abfd, the output bfd, to normalize. (_bfd_archive_bsd44_construct_extended_name_table): Likewise. * bfd.c (struct bfd): Make flags a full flagword. (BFD_ARCHIVE_FULL_PATH): Define. * bfd-in2.h: Regenerate. binutils/ * ar.c (write_archive): Set BFD_ARCHIVE_FULL_PATH. * doc/binutils.texi (extract from archive): Mention restrictions when extracting from archives with full paths. (ar P): Update to current P support. (ar -X32_64): Fix spelling.
2019-09-23linker bfd.h tidyAlan Modra1-43/+28
bfd/ * bfd-in.h (bfd_symbol, bfd_section_already_linked), (bfd_elf_version_tree): Delete forward declarations. Move other forward decls and remaining elf function decl later. (bfd_section_already_linked_table_init), (bfd_section_already_linked_table_free), (_bfd_handle_already_linked, _bfd_nearby_section), (_bfd_fix_excluded_sec_syms): Move to bfdlink.h. include/ * bfdlink.h (struct bfd_section_already_linked): Forward declare. (bfd_section_already_linked_table_init), (bfd_section_already_linked_table_free), (_bfd_handle_already_linked, _bfd_nearby_section), (_bfd_fix_excluded_sec_syms): Declare.
2019-09-23ecoff bfd.h tidyAlan Modra1-42/+0
bfd/ * bfd-in.h: Move ecoff function declarations.. * ecoff-bfd.h: ..to here, new file. * ecoff.c: Include ecoff-bfd.h. * ecofflink.c: Likewise. * elf64-alpha.c: Likewise. * elfxx-mips.c: Likewise. * bfd-in2.h: Regenerate. gas/ * config/obj-ecoff.c: Include ecoff-bfd.h. * config/obj-elf.c: Likewise.
2019-09-23elf bfd.h tidyAlan Modra1-69/+0
bfd/ * bfd-in.h (enum notice_asneeded_action): Move to bfdlink.h. Move most other elf declarations.. * elf-bfd.h: ..to here. * bfd-in2.h: Regenerate. include/ * bfdlink.h (enum notice_asneeded_action): Define. ld/ * deffilep.y: Include bfdlink.h. * ldelf.c: Likewise. * ldelfgen.c: Likewise. * ldver.c: Likewise. * mri.c: Likewise. * emultempl/irix.em: Don't include ld.h, ldmain.h, libiberty.h. Comment.
2019-09-23m68k bfd.h tidyAlan Modra1-10/+0
bfd/ * bfd-in.h: Move m68k function declaration.. * cpu-m68k.h: ..to here, new file.. * elf32-m68k.h: ..and here, new file. * elf32-m68k.c: Include cpu-m68k.h and elf32-m68k.h. * bfd-in2.h: Regenerate. ld/ * emultempl/m68kelf.em: Include elf32-m68k.h. opcodes/ * m68k-dis.c: Include cpu-m68k.h
2019-09-23bfin bfd.h tidyAlan Modra1-4/+0
bfd/ * bfd-in.h: Move bfin function declaration.. * elf32-bfin.h: ..to here, new file. * elf32-bfin.c: Include elf32-bfin.h. * bfd-in2.h: Regenerate. ld/ * emultempl/bfin.em: Include elf32-bfin.h.
2019-09-23cr16 bfd.h tidyAlan Modra1-4/+0
bfd/ * bfd-in.h: Move cr16 function declaration.. * elf32-cr16.h: ..to here, new file. * elf32-cr16.c: Include elf32-cr16.h. * bfd-in2.h: Regenerate. ld/ * emultempl/cr16elf.em: Include elf32-cr16.h.
2019-09-23obsoleted bfd.h tidyAlan Modra1-17/+0
* bfd-in.h (bfd_sunos_get_needed_list), (bfd_sunos_record_link_assignment), (bfd_sunos_size_dynamic_sections), (bfd_i386linux_size_dynamic_sections), (bfd_sparclinux_size_dynamic_sections): Delete obsolete decls. * bfd-in2.h: Regenerate.
2019-09-23xcoff bfd.h tidyAlan Modra1-28/+0
bfd/ * bfd-in.h: Move xcoff function declarations.. * xcofflink.h: ..to here, new file. * xcofflink.c: Include xcofflink.h. * coff-rs6000.c (bfd_xcoff_ar_archive_set_magic): Delete unused func. * bfd-in2.h: Regenerate. ld/ * emultempl/aix.em: Include xcofflink.h.
2019-09-23coff bfd.h tidyAlan Modra1-10/+0
bfd/ * bfd-in.h: Delete coff forward refs and move coff declaration.. * coff-bfd.h: ..to here. * bfd-in2.h: Regenerate. binutils/ * dlltool.c: Include coff-bfd.h.
2019-09-23arm bfd.h tidyAlan Modra1-140/+0
bfd/ * bfd-in.h: Move arm declaraions.. * cpu-arm.h: ..to here, new file.. * coff-arm.h: ..and here, new file.. * elf32-arm.h: ..and here, new file. * cpu-arm.c: Include cpu-arm.h. * coff-arm.c: Include cpu-arm.h and coff-arm.h. * elf32-arm.c: Include cpu-arm.h and elf32-arm.h. * pe-arm.c: Move function rename defines later. * pe-arm-wince.c: Likewise and include sysdep.h and bfd.h early. * bfd-in2.h: Regenerate. gas/ * config/tc-arm.c: Include cpu-arm.h. ld/ * emultempl/armelf.em: Include elf32-arm.h. * emultempl/pe.em: Move func defines later and include coff-arm.h.
2019-09-23tic6x bfd.h tidyAlan Modra1-4/+0
* bfd-in.h: Move tic6x function declaration.. * elf32-tic6x.h: ..to here. * bfd-in2.h: Regenerate.
2019-09-23aarch64 bfd.h tidyAlan Modra1-86/+0
bfd/ * bfd-in.h: Move aarch64 declarations and defines.. * cpu-aarch64.h: ..to here, new file.. * elfxx-aarch64.h: ..and here. * cpu-aarch64.c: Include cpu-aarch64.h. * elfnn-aarch64.c: Likewise. * bfd-in2.h: Regenerate. ld/ * emultempl/aarch64elf.em: Include elfxx-aarch64.h.
2019-09-23tic54x bfd.h tidyAlan Modra1-8/+0
* bfd-in.h: Delete ticoff function declarations. * coff-tic54x.c (bfd_ticoff_set_section_load_page), (bfd_ticoff_get_section_load_page): Make static. * bfd-in2.h: Regenerate.
2019-09-23h8300 bfd.h tidyAlan Modra1-4/+0
* bfd-in.h: Move h8300 function declaration to.. * cpu-h8300.h: ..here, new file. * cpu-h8300.c: Include cpu-h8300.h. * elf32-h8300.c: Likewise. * bfd-in2.h: Regenerate.
2019-09-23ia64 bfd.h tidyAlan Modra1-7/+0
bfd/ * bfd-in.h: Move ia64 function declarations.. * elfxx-ia64.h: ..to here. * bfd-in2.h: Regenerate. ld/ * emultempl/ia64elf.em: Include elfxx-ia64.h.
2019-09-23v850 bfd.h tidyAlan Modra1-7/+0
bfd/ * bfd-in.h: Move v850 function declarations.. * elf32-v850.h: ..to here, new file. * elf32-v850.c: Include elf32-v850.h. * bfd-in2.h: Regenerate. ld/ * emultempl/v850elf.em: Include elf32-v850.h.
2019-09-23mips bfd.h tidyAlan Modra1-4/+0
bfd/ * bfd-in.h: Move mips function declaration to.. * elfxx-mips.h: ..here. * bfd-in2.h: Regenerate. opcodes/ * mips-dis.c: Include elfxx-mips.h. Move "elf-bfd.h" and "elf/mips.h" earlier.
2019-09-23csky bfd.h tidyAlan Modra1-12/+0
bfd/ * bfd-in.h: Move csky function declarations to.. * elf32-csky.h: ..here, new file. * elf32-csky.c: Include elf32-csky.h. * bfd-in2.h: Regenerate. ld/ * emultempl/cskyelf.em: Include elf32-csky.h.
2019-09-20bfd macro conversion to inline functions, sectionAlan Modra1-122/+177
This one exposed a bug in tic6x gas, found with inline function parameter type checking. struct bfd_section and struct bfd_symbol both have a flags field, so bfd_is_com_section (symbol) compiled OK when bfd_is_com_section was a macro but didn't special case common symbols. bfd/ * bfd-in.h (bfd_section_name, bfd_section_size, bfd_section_vma), (bfd_section_lma, bfd_section_alignment, bfd_section_flags), (bfd_section_userdata, bfd_is_com_section, discarded_section), (bfd_get_section_limit_octets, bfd_get_section_limit): Delete macros. * bfd.c (bfd_get_section_limit_octets, bfd_get_section_limit), (bfd_section_list_remove, bfd_section_list_append), (bfd_section_list_prepend, bfd_section_list_insert_after), (bfd_section_list_insert_before, bfd_section_removed_from_list): New inline functions. * section.c (bfd_is_und_section, bfd_is_abs_section), (bfd_is_ind_section, bfd_is_const_section, bfd_section_list_remove), (bfd_section_list_append, bfd_section_list_prepend), (bfd_section_list_insert_after, bfd_section_list_insert_before), (bfd_section_removed_from_list): Delete macros. (bfd_section_name, bfd_section_size, bfd_section_vma), (bfd_section_lma, bfd_section_alignment, bfd_section_flags), (bfd_section_userdata, bfd_is_com_section, bfd_is_und_section), (bfd_is_abs_section, bfd_is_ind_section, bfd_is_const_section), (discarded_section): New inline functions. * bfd-in2.h: Regenerate. gas/ * config/tc-tic6x.c (tc_gen_reloc): Correct common symbol check. ld/ * emultempl/xtensaelf.em (xtensa_get_section_deps): Comment. Use bfd_section_userdata. (xtensa_set_section_deps): Use bfd_set_section_userdata. * ldlang.c (lang_output_section_get): Use bfd_section_userdata. (sort_def_symbol): Likewise, and bfd_set_section_userdata. (init_os): Use bfd_set_section_userdata. (print_all_symbols): Use bfd_section_userdata. * ldlang.h (get_userdata): Delete.
2019-09-20bfd macro conversion to inline functions, asymbolAlan Modra1-13/+38
* bfd-in.h (bfd_asymbol_section, bfd_asymbol_value, bfd_asymbol_name), (bfd_asymbol_bfd, bfd_asymbol_flavour, bfd_set_asymbol_name): Delete. * bfd.c (bfd_asymbol_section, bfd_asymbol_value, bfd_asymbol_name), (bfd_asymbol_bfd, bfd_set_asymbol_name): New inline functions. * targets.c (bfd_asymbol_flavour): Likewise. * bfd-in2.h: Regenerate.
2019-09-20bfd macro conversion to inline functionsAlan Modra1-32/+144
This converts some of the macros that access struct bfd fields to inline functions. bfd/ * archive.c (bfd_generic_archive_p): Use bfd_set_thin_archive. * bfd-in.h (bfd_get_filename, bfd_get_cacheable, bfd_get_format), (bfd_get_target, bfd_get_flavour, bfd_family_coff, bfd_big_endian), (bfd_little_endian, bfd_header_big_endian, bfd_header_little_endian), (bfd_get_file_flags, bfd_applicable_file_flags), (bfd_applicable_section_flags, bfd_has_map, bfd_is_thin_archive), (bfd_valid_reloc_types, bfd_usrdata, bfd_get_start_address), (bfd_get_symcount, bfd_get_outsymbols, bfd_count_sections), (bfd_get_dynamic_symcount, bfd_get_symbol_leading_char): Delete. * bfd/bfd.c (bfd_get_filename, bfd_get_cacheable, bfd_get_format), (bfd_get_file_flags, bfd_get_start_address, bfd_get_symcount), (bfd_get_dynamic_symcount, bfd_get_outsymbols, bfd_count_sections), (bfd_has_map, bfd_is_thin_archive, bfd_set_thin_archive), (bfd_usrdata, bfd_set_usrdata): New inline functions. * targets.c (bfd_get_target, bfd_get_flavour), (bfd_applicable_file_flags, bfd_family_coff, bfd_big_endian), (bfd_little_endian, bfd_header_big_endian), (bfd_header_little_endian, bfd_applicable_section_flags), (bfd_get_symbol_leading_char): New inline functions. * bfd-in2.h: Regenerate. binutils/ * ar.c (write_archive): Use bfd_set_thin_archive. gdb/ * gdb_bfd.c (gdb_bfd_ref, gdb_bfd_unref): Use bfd_set_usrdata. * dwarf2read.c (dwarf2_read_gdb_index, dwarf2_read_debug_names), (read_indirect_string_from_dwz): Use bfd accessor. * dwarf2read.h (struct dwz_file <filename>): Likewise. * machoread.c (macho_symfile_read_all_oso): Likewise. * solib.c (solib_bfd_open): Likewise. ld/ * ldelf.c (ldelf_after_open, ldelf_place_orphan * ldlang.c (walk_wild_file, lang_process): Use bfd_usrdata. (load_symbols, ldlang_add_file): Use bfd_set_usrdata. * ldmain.c (add_archive_element): Use bfd_usrdata. * ldlang.h (bfd_input_just_syms): New inline function. * emultempl/aarch64elf.em (build_section_lists): Use it. * emultempl/mmo.em (mmo_place_orphan): Likewise. * emultempl/pe.em (gld_${EMULATION_NAME}_place_orphan): Likewise. * emultempl/pep.em (gld_${EMULATION_NAME}_place_orphan): Likewise. * emultempl/ppc64elf.em (build_section_lists): Likewise. sim/ * ppc/emul_generic.c (emul_add_tree_options): Delete old bfd code.
2019-09-19bfd_section_* macrosAlan Modra1-29/+26
This large patch removes the unnecessary bfd parameter from various bfd section macros and functions. The bfd is hardly ever used and if needed for the bfd_set_section_* or bfd_rename_section functions can be found via section->owner except for the com, und, abs, and ind std_section special sections. Those sections shouldn't be modified anyway. The patch also removes various bfd_get_section_<field> macros, replacing their use with bfd_section_<field>, and adds bfd_set_section_lma. I've also fixed a minor bug in gas where compressed section renaming was done directly rather than calling bfd_rename_section. This would have broken bfd_get_section_by_name and similar functions, but that hardly mattered at such a late stage in gas processing. bfd/ * bfd-in.h (bfd_get_section_name, bfd_get_section_vma), (bfd_get_section_lma, bfd_get_section_alignment), (bfd_get_section_size, bfd_get_section_flags), (bfd_get_section_userdata): Delete. (bfd_section_name, bfd_section_size, bfd_section_vma), (bfd_section_lma, bfd_section_alignment): Lose bfd parameter. (bfd_section_flags, bfd_section_userdata): New. (bfd_is_com_section): Rename parameter. * section.c (bfd_set_section_userdata, bfd_set_section_vma), (bfd_set_section_alignment, bfd_set_section_flags, bfd_rename_section), (bfd_set_section_size): Delete bfd parameter, rename section parameter. (bfd_set_section_lma): New. * bfd-in2.h: Regenerate. * mach-o.c (bfd_mach_o_init_section_from_mach_o): Delete bfd param, update callers. * aoutx.h, * bfd.c, * coff-alpha.c, * coff-arm.c, * coff-mips.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * compress.c, * ecoff.c, * elf-eh-frame.c, * elf-hppa.h, * elf-ifunc.c, * elf-m10200.c, * elf-m10300.c, * elf-properties.c, * elf-s390-common.c, * elf-vxworks.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-csky.c, * elf32-d10v.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-ppc.c, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-bpf.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c, * elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * i386msdos.c, * linker.c, * mach-o.c, * mmo.c, * opncls.c, * pdp11.c, * pei-x86_64.c, * peicode.h, * reloc.c, * section.c, * syms.c, * vms-alpha.c, * xcofflink.c: Update throughout for bfd section macro and function changes. binutils/ * addr2line.c, * bucomm.c, * coffgrok.c, * dlltool.c, * nm.c, * objcopy.c, * objdump.c, * od-elf32_avr.c, * od-macho.c, * od-xcoff.c, * prdbg.c, * rdcoff.c, * rddbg.c, * rescoff.c, * resres.c, * size.c, * srconv.c, * strings.c, * windmc.c: Update throughout for bfd section macro and function changes. gas/ * as.c, * as.h, * dw2gencfi.c, * dwarf2dbg.c, * ecoff.c, * read.c, * stabs.c, * subsegs.c, * subsegs.h, * write.c, * config/obj-coff-seh.c, * config/obj-coff.c, * config/obj-ecoff.c, * config/obj-elf.c, * config/obj-macho.c, * config/obj-som.c, * config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c, * config/tc-arm.c, * config/tc-avr.c, * config/tc-bfin.c, * config/tc-bpf.c, * config/tc-d10v.c, * config/tc-d30v.c, * config/tc-epiphany.c, * config/tc-fr30.c, * config/tc-frv.c, * config/tc-h8300.c, * config/tc-hppa.c, * config/tc-i386.c, * config/tc-ia64.c, * config/tc-ip2k.c, * config/tc-iq2000.c, * config/tc-lm32.c, * config/tc-m32c.c, * config/tc-m32r.c, * config/tc-m68hc11.c, * config/tc-mep.c, * config/tc-microblaze.c, * config/tc-mips.c, * config/tc-mmix.c, * config/tc-mn10200.c, * config/tc-mn10300.c, * config/tc-msp430.c, * config/tc-mt.c, * config/tc-nds32.c, * config/tc-or1k.c, * config/tc-ppc.c, * config/tc-pru.c, * config/tc-rl78.c, * config/tc-rx.c, * config/tc-s12z.c, * config/tc-s390.c, * config/tc-score.c, * config/tc-score7.c, * config/tc-sh.c, * config/tc-sparc.c, * config/tc-spu.c, * config/tc-tic4x.c, * config/tc-tic54x.c, * config/tc-tic6x.c, * config/tc-tilegx.c, * config/tc-tilepro.c, * config/tc-v850.c, * config/tc-visium.c, * config/tc-wasm32.c, * config/tc-xc16x.c, * config/tc-xgate.c, * config/tc-xstormy16.c, * config/tc-xtensa.c, * config/tc-z8k.c: Update throughout for bfd section macro and function changes. * write.c (compress_debug): Use bfd_rename_section. gdb/ * aarch64-linux-tdep.c, * arm-tdep.c, * auto-load.c, * coff-pe-read.c, * coffread.c, * corelow.c, * dbxread.c, * dicos-tdep.c, * dwarf2-frame.c, * dwarf2read.c, * elfread.c, * exec.c, * fbsd-tdep.c, * gcore.c, * gdb_bfd.c, * gdb_bfd.h, * hppa-tdep.c, * i386-cygwin-tdep.c, * i386-fbsd-tdep.c, * i386-linux-tdep.c, * jit.c, * linux-tdep.c, * machoread.c, * maint.c, * mdebugread.c, * minidebug.c, * mips-linux-tdep.c, * mips-sde-tdep.c, * mips-tdep.c, * mipsread.c, * nto-tdep.c, * objfiles.c, * objfiles.h, * osabi.c, * ppc-linux-tdep.c, * ppc64-tdep.c, * record-btrace.c, * record-full.c, * remote.c, * rs6000-aix-tdep.c, * rs6000-tdep.c, * s390-linux-tdep.c, * s390-tdep.c, * solib-aix.c, * solib-dsbt.c, * solib-frv.c, * solib-spu.c, * solib-svr4.c, * solib-target.c, * spu-linux-nat.c, * spu-tdep.c, * symfile-mem.c, * symfile.c, * symmisc.c, * symtab.c, * target.c, * windows-nat.c, * xcoffread.c, * cli/cli-dump.c, * compile/compile-object-load.c, * mi/mi-interp.c: Update throughout for bfd section macro and function changes. * gcore (gcore_create_callback): Use bfd_set_section_lma. * spu-tdep.c (spu_overlay_new_objfile): Likewise. gprof/ * corefile.c, * symtab.c: Update throughout for bfd section macro and function changes. ld/ * ldcref.c, * ldctor.c, * ldelf.c, * ldlang.c, * pe-dll.c, * emultempl/aarch64elf.em, * emultempl/aix.em, * emultempl/armcoff.em, * emultempl/armelf.em, * emultempl/cr16elf.em, * emultempl/cskyelf.em, * emultempl/m68hc1xelf.em, * emultempl/m68kelf.em, * emultempl/mipself.em, * emultempl/mmix-elfnmmo.em, * emultempl/mmo.em, * emultempl/msp430.em, * emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em, * emultempl/ppc64elf.em, * emultempl/xtensaelf.em: Update throughout for bfd section macro and function changes. libctf/ * ctf-open-bfd.c: Update throughout for bfd section macro changes. opcodes/ * arc-ext.c: Update throughout for bfd section macro changes. sim/ * common/sim-load.c, * common/sim-utils.c, * cris/sim-if.c, * erc32/func.c, * lm32/sim-if.c, * m32c/load.c, * m32c/trace.c, * m68hc11/interp.c, * ppc/hw_htab.c, * ppc/hw_init.c, * rl78/load.c, * rl78/trace.c, * rx/gdb-if.c, * rx/load.c, * rx/trace.c: Update throughout for bfd section macro changes.
2019-09-18bfd_asymbol_* macrosAlan Modra1-11/+8
The main point of this patch is to give bfd_get_section a better name, bfd_asymbol_section. bfd/ * bfd-in.h (bfd_asymbol_section): Rename from bfd_get_section. (bfd_get_output_section): Delete. (bfd_asymbol_base): Delete. (bfd_asymbol_section, bfd_asymbol_value, bfd_asymbol_name), (bfd_asymbol_bfd, bfd_asymbol_flavour): Tidy. (bfd_set_asymbol_name): New macro. * bfd-in2.h: Regenerate. * aout-cris.c: Update throughout to use bfd_asymbol_section. * aoutx.h: Likewise. * cofflink.c: Likewise. * dwarf2.c: Likewise. * ecoff.c: Likewise. * elf.c: Likewise. * elf32-arm.c: Likewise. * elf32-mips.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elfn32-mips.c: Likewise. * elfnn-aarch64.c: Likewise. * elfxx-mips.c: Likewise. * linker.c: Likewise. * pdp11.c: Likewise. * elf64-mmix.c (mmix_elf_reloc): Expand bfd_get_output_section. binutils/ * nm.c: Update bfd_get_section to bfd_asymbol_section throughout. * objcopy.c: Likewise. * objdump.c: Likewise. * rdcoff.c: Likewise. * objcopy.c (create_new_symbol): Use bfd_set_asymbol_name. (filter_symbols): Likewise. gas/ * symbols.c (S_IS_LOCAL): Update bfd_get_section to bfd_asymbol_section. gdb/ * arm-tdep.c (arm_record_special_symbol): Update bfd_get_section to bfd_asymbol_section. ld/ * ldcref.c (check_reloc_refs): Update bfd_get_section to bfd_asymbol_section.
2019-09-18Constify bfd_octets_per_byte and related functionsAlan Modra1-5/+5
* archures.c (bfd_get_arch): Make param const. (bfd_get_mach, bfd_arch_bits_per_byte): Likewise. (bfd_arch_bits_per_address, bfd_octets_per_byte): Likewise. * bfd-in2.h: Regenerate.
2019-09-18Constify target name, reloc name, and carsym nameAlan Modra1-3/+3
bfd/ * bfd-in.h (carsym.name): Make const. * reloc.c (struct reloc_howto_struct.name): Likewise. * targets.c (bfd_target.name): Likewise.! * bfd.c (bfd_get_sign_extend_vma): Make variable const. * som.c (som_bfd_fill_in_ar_symbols): Use an intermediary variable when setting carsym.name. * bfd-in2.h: Regenerate. gdb/ * amd64-dicos-tdep.c (amd64_dicos_osabi_sniffer): Constify target. * i386-cygwin-tdep.c (i386_cygwin_init_abi): Likewise. * i386-dicos-tdep.c (i386_dicos_osabi_sniffer): Likewise. ld/ * ldlang.c (stricpy, strcut, name_compare): Constify params. (get_first_input_target): Make return and "target" const.
2019-09-11Introduce bfd_set_filenameTom Tromey1-0/+2
This introduces a new bfd_set_filename function, which is then used in various spots in gdb. This allows for the removal of some casts. bfd/ChangeLog 2019-09-11 Tom Tromey <tom@tromey.com> * opncls.c (bfd_set_filename): New function. * bfd-in2.h: Regenerate. gdb/ChangeLog 2019-09-11 Tom Tromey <tom@tromey.com> * symfile-mem.c (symbol_file_add_from_memory): Use bfd_set_filename. * solib-darwin.c (darwin_bfd_open): Use bfd_set_filename. * solib-aix.c (solib_aix_bfd_open): Use bfd_set_filename.
2019-09-11Tidy ld/ldmisc.cAlan Modra1-0/+9
The idea here is to not use elf-bfd.h and coff-bfd.h in generic linker code. bfd/ * targets.c (struct bfd_target): Add _bfd_group_name. (BFD_JUMP_TABLE): Likewise. * coffgen.c (bfd_coff_group_name): New function. * elf.c (bfd_elf_group_name): New function. * linker.c (_bfd_nolink_bfd_group_name): New function. * section.c (bfd_generic_group_name): New function. * elf-bfd.h (bfd_elf_group_name): Declare. * libbfd-in.h (_bfd_nolink_bfd_group_name): Declare. * libcoff-in.h (bfd_coff_group_name): Declare. * aout-target.h (MY_bfd_group_name): Define. * aout-tic30.c (MY_bfd_group_name): Define. * bfd.c (bfd_group_name): Define. * binary.c (binary_bfd_group_name): Define. * coff-alpha.c (_bfd_ecoff_bfd_group_name): Define. * coff-mips.c (_bfd_ecoff_bfd_group_name): Define. * coff-rs6000.c (_bfd_xcoff_bfd_group_name): Define. * coffcode.h (coff_bfd_group_name): Define. * elfxx-target.h (bfd_elfNN_bfd_group_name): Define. * i386msdos.c (msdos_bfd_group_name): Define. * ihex.c (ihex_bfd_group_name): Define. * mach-o-target.c (bfd_mach_o_bfd_group_name): Define. * mmo.c (mmo_bfd_group_name): Define. * pef.c (bfd_pef_bfd_group_name): Define. * plugin.c (bfd_plugin_bfd_group_name): Define. * ppcboot.c (ppcboot_bfd_group_name): Define. * som.c (som_bfd_group_name): Define. * srec.c (srec_bfd_group_name): Define. * tekhex.c (tekhex_bfd_group_name): Define. * verilog.c (verilog_bfd_group_name): Define. * vms-alpha.c (vms_bfd_group_name, alpha_vms_bfd_group_name): Define. * xsym.c (bfd_sym_bfd_group_name): Define. * coff64-rs6000.c (rs6000_xcoff64_vec): Init new field. (rs6000_xcoff64_aix_vec): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * libcoff.h: Regenerate. ld/ * ldmisc.c: Don't #include elf-bfd.h or coff-bfd.h. (vfinfo): Use bfd_group_name.
2019-09-10Enhance the disassembler so that it will reliably determine whether a reloc ↵Nick Clifton1-0/+10
applies to the middle of the next insn. PR 24907 binutils* objdump.c (null_print): New function. (disassemble_bytes): Delete previous_octets local and replace with a test of the max_reloc_offset_into_insn field of the bfd_arch_info structure. If a reloc is a potential match for the next insn, then perform a dummy disassembly in order to calculate its real length. bfd * archures.c (bfd_arch_info_type): Add max_reloc_offset_into_insn field. (bfd_default_arch_struct): Initialise the new field. * bfd-in2.h: Regenerate. * cpu-aarch64.c: Initialise the new field. * cpu-alpha.c: Likewise. * cpu-arc.c: Likewise. * cpu-arm.c: Likewise. * cpu-avr.c: Likewise. * cpu-bfin.c: Likewise. * cpu-bpf.c: Likewise. * cpu-cr16.c: Likewise. * cpu-cr16c.c: Likewise. * cpu-cris.c: Likewise. * cpu-crx.c: Likewise. * cpu-csky.c: Likewise. * cpu-d10v.c: Likewise. * cpu-d30v.c: Likewise. * cpu-dlx.c: Likewise. * cpu-epiphany.c: Likewise. * cpu-fr30.c: Likewise. * cpu-frv.c: Likewise. * cpu-ft32.c: Likewise. * cpu-h8300.c: Likewise. * cpu-hppa.c: Likewise. * cpu-i386.c: Likewise. * cpu-ia64.c: Likewise. * cpu-iamcu.c: Likewise. * cpu-ip2k.c: Likewise. * cpu-iq2000.c: Likewise. * cpu-k1om.c: Likewise. * cpu-l1om.c: Likewise. * cpu-lm32.c: Likewise. * cpu-m10200.c: Likewise. * cpu-m10300.c: Likewise. * cpu-m32c.c: Likewise. * cpu-m32r.c: Likewise. * cpu-m68hc11.c: Likewise. * cpu-m68hc12.c: Likewise. * cpu-m68k.c: Likewise. * cpu-m9s12x.c: Likewise. * cpu-m9s12xg.c: Likewise. * cpu-mcore.c: Likewise. * cpu-mep.c: Likewise. * cpu-metag.c: Likewise. * cpu-microblaze.c: Likewise. * cpu-mips.c: Likewise. * cpu-mmix.c: Likewise. * cpu-moxie.c: Likewise. * cpu-msp430.c: Likewise. * cpu-mt.c: Likewise. * cpu-nds32.c: Likewise. * cpu-nfp.c: Likewise. * cpu-nios2.c: Likewise. * cpu-ns32k.c: Likewise. * cpu-or1k.c: Likewise. * cpu-pdp11.c: Likewise. * cpu-pj.c: Likewise. * cpu-plugin.c: Likewise. * cpu-powerpc.c: Likewise. * cpu-pru.c: Likewise. * cpu-riscv.c: Likewise. * cpu-rl78.c: Likewise. * cpu-rs6000.c: Likewise. * cpu-rx.c: Likewise. * cpu-s12z.c: Likewise. * cpu-s390.c: Likewise. * cpu-score.c: Likewise. * cpu-sh.c: Likewise. * cpu-sparc.c: Likewise. * cpu-spu.c: Likewise. * cpu-tic30.c: Likewise. * cpu-tic4x.c: Likewise. * cpu-tic54x.c: Likewise. * cpu-tic6x.c: Likewise. * cpu-tic80.c: Likewise. * cpu-tilegx.c: Likewise. * cpu-tilepro.c: Likewise. * cpu-v850.c: Likewise. * cpu-v850_rh850.c: Likewise. * cpu-vax.c: Likewise. * cpu-visium.c: Likewise. * cpu-wasm32.c: Likewise. * cpu-xc16x.c: Likewise. * cpu-xgate.c: Likewise. * cpu-xstormy16.c: Likewise. * cpu-xtensa.c: Likewise. * cpu-z80.c: Likewise. * cpu-z8k.c: Likewise. gas * testsuite/gas/arm/pr24907.s: New test. * testsuite/gas/arm/pr24907.d: Expected disassembly.
2019-09-06bfd_get_filenameAlan Modra1-3/+1
This macro says: /* Cast from const char * to char * so that caller can assign to a char * without a warning. */ I reckon that isn't such a good idea since it can result in char* variables where const char* is appropriate. Not very many places need the char* cast. bfd/ * aout-target.h (object_p): Formatting. * bfd-in.h (bfd_get_filename): Don't cast to char*. * corefile.c (generic_core_file_matches_executable_p): Constify variables and remove cast. * bfd-in2.h: Regenerate. binutils/ * nm.c (print_object_filename_bsd, print_object_filename_sysv), (print_object_filename_posix, print_archive_filename_bsd), (print_archive_filename_sysv, print_archive_filename_posix), (print_archive_member_bsd, print_archive_member_sysv), (print_archive_member_posix): Constify parameter. (struct output_fns <print_object_filename, print_archive_filename>), (<print_archive_member>): Likewise. * objcopy.c (copy_archive): Add cast for make_tempdir. ld/ * emultempl/elf32.em (gld${EMULATION_NAME}_search_needed): Constify variable. * emultempl/pe.em (gld_${EMULATION_NAME}_after_open): Likewise. * emultempl/pep.em (gld_${EMULATION_NAME}_after_open): Likewise. gdb/ * coffread.c (coff_symfile_read): Constify filename variable. * dbxread.c (dbx_symfile_init, coffstab_build_psymtabs), (elfstab_build_psymtabs, stabsect_build_psymtabs): Likewise. * gdb_bfd.c (gdb_bfd_close_or_warn): Likewise. * solib.c (reload_shared_libraries_1): Likewise. * symfile.c (reread_symbols): Likewise. * solib-aix.c (solib_aix_bfd_open): Add cast for xfree of filename. * solib-darwin.c (darwin_bfd_open): Likewise. * symfile-mem.c (symbol_file_add_from_memory): Likewise. sim/cris/ * sim-if.c (sim_open): Constify filename variable.
2019-08-29PR24891, objdump memory leaks when parsing malformed archiveAlan Modra1-0/+3
BFD was leaking memory in bfd_check_format_matches. As part of deciding the proper format of an archive, BFD looks at the format of the first file stored. That file's bfd was left open for reasons given in a comment removed in git commit 0e71e4955cd1 that said: /* We ought to close `first' here, but we can't, because we have no way to remove it from the archive cache. It's close to impossible to figure out when we can release bfd_ardata. FIXME. */ Well, things have changed since that comment was true and we now can remove files from the archive cache. Closing the first file is good and cures some of the leaks. Other leaks are caused by bfd_check_format_matches throwing away bfd tdata before trying a new match. That lost the element cache set up when format checking the first element in the archive. The easiest and cleanest fix is to simply disable the caching when checking the first element. PR 24891 * bfd.c (struct bfd): Add no_element_cache. * archive.c (_bfd_get_elt_at_filepos): Don't add element to archive cache when no_element_cache. (bfd_generic_archive_p): Set no_element_cache when opening first element to check format. Close first element too. (do_slurp_bsd_armap): Don't zero ardata->cache here. * bfd-in2.h: Regenerate.
2019-07-30Re: Support .gnu.lto_.lto section in ELF filesAlan Modra1-1/+1
PR 24768 * bfd.c (struct bfd): Add lto_slim_object flag. * bfd-in2.h: Regenerate.
2019-07-29Support .gnu.lto_.lto section in ELF files (PR 24768).Martin Liska1-0/+3
bfd/ChangeLog: 2019-07-22 Martin Liska <mliska@suse.cz> PR 24768 * archive.c (_bfd_compute_and_write_armap): Come up with report_plugin_err variable. * bfd-in2.h (struct bfd): Add lto_slim_object flag. * elf.c (struct lto_section): New. (_bfd_elf_make_section_from_shdr): Parse content of .gnu_lto_.lto section. * elflink.c: Report error for a missing LTO plugin. * linker.c (_bfd_generic_link_add_one_symbol): Likewise. binutils/ChangeLog: 2019-07-22 Martin Liska <mliska@suse.cz> PR 24768 * nm.c (filter_symbols): Set report_plugin_err if error is reported. (display_rel_file): Report error for a missing LTO plugin. gold/ChangeLog: 2019-07-22 Martin Liska <mliska@suse.cz> PR 24768 * layout.h (class Layout): Add is_lto_slim_object and set_lto_slim_object. * object.cc (struct lto_section): Add lto_slim_object_. (big_endian>::do_layout): Parse content of .gnu_lto_.lto section. (big_endian>::do_add_symbols): Report error for a missing LTO plugin.
2019-07-19[PowerPC64] pc-relative TLS relocationsAlan Modra1-0/+7
This patch supports using pcrel instructions in TLS code sequences. A number of new relocations are needed, gas operand modifiers to generate those relocations, and new TLS optimisation. For optimisation it turns out that the new pcrel GD and LD sequences can be distinguished from the non-pcrel GD and LD sequences by there being different relocations on the new sequence. The final "add ra,rb,13" on IE sequences similarly needs a new relocation, or as I chose, a modification of R_PPC64_TLS. On pcrel IE code, the R_PPC64_TLS points one byte into the "add" instruction rather than being on the instruction boundary. GD: pla 3,z@got@tlsgd@pcrel # R_PPC64_GOT_TLSGD34 bl __tls_get_addr@notoc(z@tlsgd) # R_PPC64_TLSGD and R_PPC64_REL24_NOTOC edited to IE pld 3,z@got@tprel@pcrel add 3,3,13 edited to LE paddi 3,13,z@tprel nop LD: pla 3,z@got@tlsld@pcrel # R_PPC64_GOT_TLSLD34 bl __tls_get_addr@notoc(z@tlsld) # R_PPC64_TLSLD and R_PPC64_REL24_NOTOC .. paddi 9,3,z2@dtprel pld 10,z3@got@dtprel@pcrel add 10,10,3 edited to LE paddi 3,13,0x1000 nop IE: pld 9,z@got@tprel@pcrel # R_PPC64_GOT_TPREL34 add 3,9,z@tls@pcrel # R_PPC64_TLS at insn+1 ldx 4,9,z@tls@pcrel lwax 5,9,z@tls@pcrel stdx 5,9,z@tls@pcrel edited to LE paddi 9,13,z@tprel nop ld 4,0(9) lwa 5,0(9) std 5,0(9) LE: paddi 10,13,z@tprel include/ * elf/ppc64.h (R_PPC64_TPREL34, R_PPC64_DTPREL34), (R_PPC64_GOT_TLSGD34, R_PPC64_GOT_TLSLD34), (R_PPC64_GOT_TPREL34, R_PPC64_GOT_DTPREL34): Define. (IS_PPC64_TLS_RELOC): Include new tls relocs. bfd/ * reloc.c (BFD_RELOC_PPC64_TPREL34, BFD_RELOC_PPC64_DTPREL34), (BFD_RELOC_PPC64_GOT_TLSGD34, BFD_RELOC_PPC64_GOT_TLSLD34), (BFD_RELOC_PPC64_GOT_TPREL34, BFD_RELOC_PPC64_GOT_DTPREL34), (BFD_RELOC_PPC64_TLS_PCREL): New pcrel tls relocs. * elf64-ppc.c (ppc64_elf_howto_raw): Add howtos for pcrel tls relocs. (ppc64_elf_reloc_type_lookup): Translate pcrel tls relocs. (must_be_dyn_reloc, dec_dynrel_count): Add R_PPC64_TPREL64. (ppc64_elf_check_relocs): Support pcrel tls relocs. (ppc64_elf_tls_optimize, ppc64_elf_relocate_section): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/ * config/tc-ppc.c (ppc_elf_suffix): Map "tls@pcrel", "got@tlsgd@pcrel", "got@tlsld@pcrel", "got@tprel@pcrel", and "got@dtprel@pcrel". (fixup_size, md_assemble): Handle pcrel tls relocs. (ppc_force_relocation, ppc_fix_adjustable): Likewise. (md_apply_fix, tc_gen_reloc): Likewise. ld/ * testsuite/ld-powerpc/tlsgd.d, * testsuite/ld-powerpc/tlsgd.s, * testsuite/ld-powerpc/tlsie.d, * testsuite/ld-powerpc/tlsie.s, * testsuite/ld-powerpc/tlsld.d, * testsuite/ld-powerpc/tlsld.s: New tests. * testsuite/ld-powerpc/powerpc.exp: Run them.
2019-06-06[LD, AArch64] Move ELF options behind -zSudakshina Das1-1/+1
This patch moves the current AArch64 ld options of --force-bti and --pac-plt to -z force-bti and -z pac-plt since these are ELF specific options. *** bfd/ChangeLog *** 2019-06-06 Sudakshina Das <sudi.das@arm.com> * bfd-in.h: Change comment. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (elfNN_aarch64_merge_gnu_properties): Update warning. * elfxx-aarch64.c (_bfd_aarch64_elf_link_setup_gnu_properties): Likwise. *** ld/ChangeLog *** 2019-06-06 Sudakshina Das <sudi.das@arm.com> * NEWS: Update options names. * emultempl/aarch64elf.em (OPTION_FORCE_BTI, OPTION_PAC_PLT): Remove. (PARSE_AND_LIST_LONGOPTS): Remove force-bti and pac-plt. (PARSE_AND_LIST_OPTIONS): Update to -z. (PARSE_AND_LIST_ARGS_CASE_Z_AARCH64): New. (PARSE_AND_LIST_ARGS_CASE_Z): Add PARSE_AND_LIST_ARGS_CASE_Z_AARCH64. (PARSE_AND_LIST_ARGS_CASES): Move cases for these options. * testsuite/ld-aarch64/bti-pac-plt-1.d: Update option. * testsuite/ld-aarch64/bti-pac-plt-2.d: Likewise. * testsuite/ld-aarch64/bti-plt-1.d: Likewise. * testsuite/ld-aarch64/bti-plt-2.d: Likewise. * testsuite/ld-aarch64/bti-plt-3.d: Likewise. * testsuite/ld-aarch64/bti-plt-4.d: Likewise. * testsuite/ld-aarch64/bti-plt-6.d: Likewise. * testsuite/ld-aarch64/bti-plt-7.d: Likewise. * testsuite/ld-aarch64/bti-warn.d: Likewise. * testsuite/ld-aarch64/pac-plt-1.d: Likewise. * testsuite/ld-aarch64/pac-plt-2.d: Likewise.
2019-05-24PowerPC relocations for prefix insnsAlan Modra1-0/+17
include/ * elf/ppc64.h (R_PPC64_PLTSEQ_NOTOC, R_PPC64_PLTCALL_NOTOC), (R_PPC64_PCREL_OPT, R_PPC64_D34, R_PPC64_D34_LO, R_PPC64_D34_HI30), (R_PPC64_D34_HA30, R_PPC64_PCREL34, R_PPC64_GOT_PCREL34), (R_PPC64_PLT_PCREL34, R_PPC64_PLT_PCREL34_NOTOC), (R_PPC64_ADDR16_HIGHER34, R_PPC64_ADDR16_HIGHERA34), (R_PPC64_ADDR16_HIGHEST34, R_PPC64_ADDR16_HIGHESTA34), (R_PPC64_REL16_HIGHER34, R_PPC64_REL16_HIGHERA34), (R_PPC64_REL16_HIGHEST34, R_PPC64_REL16_HIGHESTA34), (R_PPC64_D28, R_PPC64_PCREL28): Define. bfd/ * reloc.c (BFD_RELOC_PPC64_D34, BFD_RELOC_PPC64_D34_LO), (BFD_RELOC_PPC64_D34_HI30, BFD_RELOC_PPC64_D34_HA30), (BFD_RELOC_PPC64_PCREL34, BFD_RELOC_PPC64_GOT_PCREL34), (BFD_RELOC_PPC64_PLT_PCREL34), (BFD_RELOC_PPC64_ADDR16_HIGHER34, BFD_RELOC_PPC64_ADDR16_HIGHERA34), (BFD_RELOC_PPC64_ADDR16_HIGHEST34, BFD_RELOC_PPC64_ADDR16_HIGHESTA34), (BFD_RELOC_PPC64_REL16_HIGHER34, BFD_RELOC_PPC64_REL16_HIGHERA34), (BFD_RELOC_PPC64_REL16_HIGHEST34, BFD_RELOC_PPC64_REL16_HIGHESTA34), (BFD_RELOC_PPC64_D28, BFD_RELOC_PPC64_PCREL28): New reloc enums. * elf64-ppc.c (PNOP): Define. (ppc64_elf_howto_raw): Add reloc howtos for new relocations. (ppc64_elf_reloc_type_lookup): Translate new bfd reloc numbers. (ppc64_elf_ha_reloc): Adjust addend for highera34 and highesta34 relocs. (ppc64_elf_prefix_reloc): New function. (struct ppc_link_hash_table): Add notoc_plt. (is_branch_reloc): Add R_PPC64_PLTCALL_NOTOC. (is_plt_seq_reloc): Add R_PPC64_PLT_PCREL34, R_PPC64_PLT_PCREL34_NOTOC, and R_PPC64_PLTSEQ_NOTOC. (ppc64_elf_check_relocs): Handle pcrel got and plt relocs. Set has_pltcall for section on seeing R_PPC64_PLTCALL_NOTOC. Handle possible need for dynamic relocs on non-pcrel powerxx relocs. (dec_dynrel_count): Handle non-pcrel powerxx relocs. (ppc64_elf_inline_plt): Handle R_PPC64_PLTCALL_NOTOC. (toc_adjusting_stub_needed): Likewise. (ppc64_elf_tls_optimize): Handle R_PPC64_PLTSEQ_NOTOC. (ppc64_elf_relocate_section): Handle new powerxx relocs. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/ * config/tc-ppc.c (ppc_elf_suffix): Support @pcrel, @got@pcrel, @plt@pcrel, @higher34, @highera34, @highest34, and @highesta34. (fixup_size): Handle new powerxx relocs. (md_assemble): Warn for @pcrel on non-prefix insns. Accept @l, @h and @ha on prefix insns, and infer reloc without any @ suffix. Translate powerxx relocs to suit DQ and DS field instructions. Include operand tests as well as opcode test to translate BFD_RELOC_HI16_S to BFD_RELOC_PPC_16DX_HA. (ppc_fix_adjustable): Return false for pcrel GOT and PLT relocs. (md_apply_fix): Handle new powerxx relocs. * config/tc-ppc.h (TC_FORCE_RELOCATION_SUB_LOCAL): Accept BFD_RELOC_PPC64_ADDR16_HIGHER34, BFD_RELOC_PPC64_ADDR16_HIGHERA34, BFD_RELOC_PPC64_ADDR16_HIGHEST34, BFD_RELOC_PPC64_ADDR16_HIGHESTA34, BFD_RELOC_PPC64_D34, and BFD_RELOC_PPC64_D28. * testsuite/gas/ppc/prefix-reloc.d, * testsuite/gas/ppc/prefix-reloc.s: New test. * testsuite/gas/ppc/ppc.exp: Run it.
2019-05-23bfd: add support for eBPFJose E. Marchesi1-0/+9
This patch adds support to BFD for elf64-bpf, in both little-endian and big-endian variants. bfd/ChangeLog: 2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com> * configure.ac: Add bpf_elf64_le_vec and bpf_elf64_be_vec. * configure: Regenerated. * Makefile.am (ALL_MACHINES): Add cpu-bpf.lo. (ALL_MACHINES_CFILES): Add cpu-bpf.c. (BFD64_BACKENDS): Add elf64-bpf.lo. (BFD64_BACKENDS_CFILES): Add elf64-bpf.c. * Makefile.in (SOURCE_HFILES): Regenerate. * config.bfd (targ_cpu): Handle bpf-*-* targets. * cpu-bpf.c: New file. * elf64-bpf.c: Likewise. * targets.c (_bfd_target_vector): Add bpf_elf64_be_vec and bpf_elf64_le_vec. * archures.c: Define architecture bfd_arch_bpf and machine bfd_arch_bpf. * reloc.c: Define BFD relocations used by the BPF target. * bfd-in2.h: Regenerated. * libbfd.h: Likewise.
2019-05-21AArch64: Implement choice between Cortex-A53 erratum workarounds. (PR ld/24373)Tamar Christina1-2/+11
The Cortex-A53 erratum currently has two ways it can resolve the erratum when using the flag --fix-cortex-a53-843419: 1) If the address is within the range of an ADR instruction it rewrites the ADRP into an ADR, and those doesn't need the use of a veneer. 2) If the address is not within range, it adds a branch to a veneer which will execute the final bit of the erratum workaround and branch back to the call site. When we do this we always generate the veneers and we always align the size of the text section to 4KB. This is because we only know which workaround we can use after all linking has finished and all addresses are known. This means even though the veneers are not used, we still generate the section and we still change the size of the input section. This is problematic for small memory devices as this would require the user to take about a ~4KB hit in memory even though it's not even used. Since there's no real way to restart the linking process from the final write phase this patch solves the issue by allowing the user more control over which erratum workaround gets used. Concretely this changes the option --fix-cortex-a53-843419 to take optional arguments --fix-cortex-a53-843419[=full|adr|adrp] - full (default): Use both ADRP and ADR workaround. This is equivalent to not specifying any options and is the default behavior before this patch. - adr: Only use the ADR workaround, this will not cause any increase in binary size but linking will fail if the referenced address is out of range of an ADR instruction. - adrp: Use only the ADRP workaround, this will never rewrite your ADRP. In the cases where the user knows how big their binaries are the `adr` option would prevent the unneeded overhead. bfd/ChangeLog: PR ld/24373 * bfd-in.h (enum erratum_84319_opts): New (bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change int to enum erratum_84319_opts. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr. (_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub. (aarch64_size_one_stub): Conditionally size erratum 843419 stubs. (_bfd_aarch64_resize_stubs): Amend comment. (elfNN_aarch64_size_stubs): Don't generate stubs when no workaround requested. (bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum. (_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of erratum workaround. (clear_erratum_843419_entry): Update erratum conditional. ld/ChangeLog: PR ld/24373 * emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args to flags. * NEWS: Add changes to flag. (PARSE_AND_LIST_OPTIONS): Update help descriptions. (PARSE_AND_LIST_ARGS_CASES): Add new options to parser. * testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests. * testsuite/ld-aarch64/erratum843419-adr.d: New test. * testsuite/ld-aarch64/erratum843419-adrp.d: New test. * testsuite/ld-aarch64/erratum843419-far-adr.d: New test. * testsuite/ld-aarch64/erratum843419-far-full.d: New test. * testsuite/ld-aarch64/erratum843419-far.s: New test. * testsuite/ld-aarch64/erratum843419-full.d: New test. * testsuite/ld-aarch64/erratum843419-near.s: New test. * testsuite/ld-aarch64/erratum843419-no-args.d: New test.
2019-05-06PowerPC reloc symbols that shouldn't be adjustedAlan Modra1-4/+4
GOT and PLT relocs shouldn't have their symbols replaced with a section symbol plus added. Nor should the HIGHA TLS relocations, which failed to be caught by the range test in ppc_fix_adjustable. bfd/ * reloc.c (BFD_RELOC_PPC64_TPREL16_HIGH, BFD_RELOC_PPC64_TPREL16_HIGHA), (BFD_RELOC_PPC64_DTPREL16_HIGH, BFD_RELOC_PPC64_DTPREL16_HIGHA): Sort before BFD_RELOC_PPC64_DTPREL16_HIGHESTA entry. gas/ * config/tc-ppc.c (ppc_fix_adjustable): Exclude all GOT and PLT relocs, and VLE sdarel relocs. * testsuite/gas/ppc/power4.d: Adjust.
2019-04-15[binutils, ARM, 16/16] Add support to VLDR and VSTR of system registersAndre Vieira1-0/+1
GNU as' Arm backend assumes each mnemonic has a single entry in the instruction table but VLDR (system register) and VSTR (system register) are different instructions than VLDR and VSTR. It is thus necessary to add some form of demultiplexing in the parser. It starts by creating a new operand type OP_VLDR which indicate that the operand is either the existing OP_RVSD operand or a system register. The function parse_operands () then tries these two cases in order, calling the new parse_sys_vldr_vstr for the second case. Since the encoding function is specified in the instruction table entry, it also need to have some sort of demultiplexing. This is done in do_vldr_vstr which either calls the existing do_neon_ldr_str () or calls the new do_t_vldr_vstr_sysreg (). A new internal relocation is needed as well since the offset has a shorter range than in other Thumb coprocessor instructions. Disassembly also requires special care since VSTR (system register) reuse the STC encoding with the coprocessor number 15. Armv8.1-M Mainline ARM manual states that coprocessor 8, 14 and 15 are reserved for floating-point and MVE instructions a feature bit check is added if the coprocessor number is one of this value and we are trying to match a coprocessor instruction (eg. STC) to forbid the match. ChangeLog entries are as follows: *** bfd/ChangeLog *** 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * reloc.c (BFD_RELOC_ARM_T32_VLDR_VSTR_OFF_IMM): New internal relocation. * bfd-in2.h: Regenerate. * libbfd.h: Likewise. *** gas/ChangeLog *** 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * config/tc-arm.c (parse_sys_vldr_vstr): New function. (OP_VLDR): New enum operand_parse_code enumerator. (parse_operands): Add logic for OP_VLDR. (do_t_vldr_vstr_sysreg): New function. (do_vldr_vstr): Likewise. (insns): Guard VLDR and VSTR by arm_ext_v4t for Thumb mode. (md_apply_fix): Add bound check for VLDR and VSTR co-processor offset. Add masking logic for BFD_RELOC_ARM_T32_VLDR_VSTR_OFF_IMM relocation. * testsuite/gas/arm/archv8m_1m-cmse-main-bad.s: Add examples of bad uses of VLDR and VSTR. * testsuite/gas/arm/archv8m_1m-cmse-main-bad.l: Add error messages for above bad uses. * testsuite/gas/arm/archv8m_1m-cmse-main.s: Add examples of VLDR and VSTR valid uses. * testsuite/gas/arm/archv8m_1m-cmse-main.d: Add disassembly for the above examples. *** opcodes/ChangeLog *** 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * arm-dis.c (coprocessor_opcodes): Document new %J and %K format specifier. Add entries for VLDR and VSTR of system registers. (print_insn_coprocessor): Forbid coprocessor numbers 8, 14 and 15 in coprocessor instructions on Armv8.1-M Mainline targets. Add handling of %J and %K format specifier.
2019-04-15[binutils, ARM, 12/16] Scalar Low Overhead loop instructions for Armv8.1-M ↵Andre Vieira1-0/+3
Mainline s patch is part of a series of patches to add support for Armv8.1-M Mainline instructions to binutils. This patch adds support to the Scalar low overhead loop instructions: LE WLS DLS We also add a new assembler resolvable relocation bfd_reloc_code_real enum for the 12-bit branch offset used in these instructions. ChangeLog entries are as follows: *** bfd/ChnageLog *** 2019-04-12 Sudakshina Das <sudi.das@arm.com> * reloc.c (BFD_RELOC_ARM_THUMB_LOOP12): New. * bfd-in2.h: Regenerated. * libbfd.h: Regenerated. *** gas/ChangeLog *** 2019-04-12 Sudakshina Das <sudi.das@arm.com> Andre Vieira <andre.simoesdiasvieira@arm.com> * config/tc-arm.c (operand_parse_code): Add OP_LR and OP_oLR for the LR operand and optional LR operand. (parse_operands): Add switch cases for OP_LR and OP_oLR for both type checking and value checking. (encode_thumb32_addr_mode): New entries for DLS, WLS and LE. (v8_1_loop_reloc): New helper function for handling labels for the low overhead loop instructions. (do_t_loloop): New function to encode DLS, WLS and LE. (insns): New entries for WLS, DLS and LE. (md_pcrel_from_section): New switch case for BFD_RELOC_ARM_THUMB_LOOP12. (md_appdy_fix): Likewise. (tc_gen_reloc): Likewise. * testsuite/gas/arm/armv8_1-m-tloop.s: New. * testsuite/gas/arm/armv8_1-m-tloop.d: New. * testsuite/gas/arm/armv8_1-m-tloop-bad.s: New. * testsuite/gas/arm/armv8_1-m-tloop-bad.d: New. * testsuite/gas/arm/armv8_1-m-tloop-bad.l: New. *** opcodes/ChangeLog *** 2019-04-12 Sudakshina Das <sudi.das@arm.com> * arm-dis.c (print_insn_thumb32): Updated to accept new %P and %Q patterns.
2019-04-15[binutils, ARM, 11/16] New BFCSEL instruction for Armv8.1-M MainlineAndre Vieira1-0/+3
s patch is part of a series of patches to add support for Armv8.1-M Mainline instructions to binutils. This patch adds the BFCSEL instruction. It also adds a local relocation with a new bfd_reloc_code_real enum. ChangeLog entries are as follows: 2019-04-15 Sudakshina Das <sudi.das@arm.com> * reloc.c (BFD_RELOC_THUMB_PCREL_BFCSEL): New relocation. * bfd-in2.h: Regenerated. * libbfd.h: Likewise. *** gas/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> Andre Vieira <andre.simoesdiasvieira@arm.com> * config/tc-arm.c (T16_32_TAB): New entriy for bfcsel. (do_t_v8_1_branch): New switch case for bfcsel. (toU): Define. (insns): New instruction for bfcsel. (md_pcrel_from_section): New switch case for BFD_RELOC_THUMB_PCREL_BFCSEL. (md_appdy_fix): Likewise (tc_gen_reloc): Likewise. * testsuite/gas/arm/armv8_1-m-bfcsel.d: New. * testsuite/gas/arm/armv8_1-m-bfcsel.s: New. *** ld/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * testsuite/ld-arm/bfcsel.s: New. * testsuite/ld-arm/bfcsel.d: New. * testsuite/ld-arm/arm-elf.exp: Add above test. *** opcodes/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * arm-dis.c (thumb32_opcodes): New instruction bfcsel. (print_insn_thumb32): Edit the switch case for %Z.
2019-04-15[binutils, ARM, 10/16] BFCSEL infrastructure with new global reloc ↵Andre Vieira1-0/+3
R_ARM_THM_BF12 This patch is part of a series of patches to add support for Armv8.1-M Mainline instructions to binutils. This adds infrastructure for the BFCSEL instructions which is one of the first instructions in Arm that have more than one relocations in them. This adds a new relocation R_ARM_THM_BF12. The inconsistency between external R_ARM_THM_BF12 and internal BFD_RELOC_ARM_THUMB_BF13 is because internally we count the static bit-0 of the immediate and we don't externally. ChangeLog entries are as follows : ChangeLog entries are as follows : *** bfd/ChnageLog *** 2019-04-04 Sudakshina Das <sudi.das@arm.com> * reloc.c (BFD_RELOC_ARM_THUMB_BF13): New. * bfd-in2.h: Regenerated. * libbfd.h: Regenerated. * elf32-arm.c (elf32_arm_howto_table_1): New entry for R_ARM_THM_BF13. (elf32_arm_reloc_map elf32_arm_reloc_map): Map BFD_RELOC_ARM_THUMB_BF13 and R_ARM_THM_BF12 together. (elf32_arm_final_link_relocate): New switch case for R_ARM_THM_BF13. *** elfcpp/ChangeLog *** 2019-04-04 Sudakshina Das <sudi.das@arm.com> * arm.h (R_ARM_THM_BF12): New relocation code. *** gas/ChangeLog *** 2019-04-04 Sudakshina Das <sudi.das@arm.com> * config/tc-arm.c (md_pcrel_from_section): New switch case for BFD_RELOC_ARM_THUMB_BF13. (md_appdy_fix): Likewise. (tc_gen_reloc): Likewise. *** include/ChangeLog *** 2019-04-04 Sudakshina Das <sudi.das@arm.com> * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF12. *** opcodes/ChangeLog *** 2019-04-04 Sudakshina Das <sudi.das@arm.com> * arm-dis.c (print_insn_thumb32): Updated to accept new %Z pattern.
2019-04-15[binutils, ARM, 8/16] BFL infrastructure with new global reloc R_ARM_THM_BF18Andre Vieira1-0/+3
This patch is part of a series of patches to add support for Armv8.1-M Mainline instructions to binutils. This adds infrastructure for the BFL instructions which is one of the first instructions in Arm that have more than one relocations in them. This adds a new relocation R_ARM_THM_BF18. The inconsistency between external R_ARM_THM_BF18 and internal BFD_RELOC_ARM_THUMB_BF19 is because internally we count the static bit-0 of the immediate and we don't externally. ChangeLog entries are as follows : *** bfd/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * reloc.c (BFD_RELOC_ARM_THUMB_BF19): New * libbfd.h: Regenerated. * bfd-in2.h: Regenerated. * bfd-elf32-arm.c (elf32_arm_howto_table_1): New entry for R_ARM_THM_BF18. (elf32_arm_reloc_map elf32_arm_reloc_map): Map BFD_RELOC_ARM_THUMB_BF19 and R_ARM_THM_BF18 together. (elf32_arm_final_link_relocate): New switch case for R_ARM_THM_BF19. *** elfcpp/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * arm.h (R_ARM_THM_BF18): New relocation code. *** gas/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * config/tc-arm.c (md_pcrel_from_section): New switch case for BFD_RELOC_ARM_THUMB_BF19. (md_appdy_fix): Likewise. (tc_gen_reloc): Likewise. *** include/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF18. *** opcodes/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * arm-dis.c (print_insn_thumb32): Updated to accept new %Y pattern.
2019-04-15[binutils, ARM, 5/16] BF insns infrastructure with new global reloc ↵Andre Vieira1-0/+3
R_ARM_THM_BF16 This patch is part of a series of patches to add support for Armv8.1-M Mainline instructions to binutils. This adds infrastructure for the BF instructions which is one of the first instructions in Arm that have more than one relocations in them. This is the third infrastructure patch that adds a new relocation R_ARM_THM_BF16. The inconsistency between external R_ARM_THM_BF16 and internal BFD_RELOC_ARM_THUMB_BF17 is because internally we count the static bit-0 of the immediate and we don't externally. ChangeLog entries are as follows : *** bfd/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * reloc.c (BFD_RELOC_ARM_THUMB_BF17): New enum. * bfd-in2.h: Regenerated. * libbfd.h: Regenerated. * bfd-elf32-arm.c (elf32_arm_howto_table_1): New entry for R_ARM_THM_BF16. (elf32_arm_reloc_map elf32_arm_reloc_map): Map BFD_RELOC_ARM_THUMB_BF17 and R_ARM_THM_BF16 together. (get_value_helper): New reloc helper. (elf32_arm_final_link_relocate): New switch case for R_ARM_THM_BF16. *** elfcpp/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * arm.h (R_ARM_THM_BF16): New relocation code. *** gas/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * config/tc-arm.c (md_pcrel_from_section): New switch case for BFD_RELOC_ARM_THUMB_BF17. (md_appdy_fix): Likewise. (tc_gen_reloc): Likewise. *** include/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF16. *** opcodes/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * arm-dis.c (print_insn_thumb32): Updated to accept new %W pattern.
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